ELECTRIC ENGINEERING

Program: ENERGY Program

Course: Microprocessor-Based Automated Systems (ELE335)

4(2-2-3) Hrs.

Lecture: Lecture # 6

Assoc. Professor: R. A. Mahmoud Date: 20/ 3 / 2024

 By the end of this chapter
2- Digital/Numerical Protective Relay:
In this chapter, you will be able to:
• Describe the main components of a numerical/digital Relay, and their functions.
• Draw Block Diagram of a numerical/digital Relay.
• Draw Connection Circuit Diagram for only one numerical/digital Relay.
• Distinguish between a digital Relay and a traditional relay.
• List the main advantages of the digital Relay.
• Mention the limitations/drawbacks of the digital Relay.
• Design Algorithm, Hardware, and Connected Power System for only one numerical Relay (i.e.
relay based on the microprocessor system( using ATP/EMTP/MATLAB/LABVIEW Programs.

.
2- Microprocessor-Based Relay
(Continued)
 THE OPERATION OF a Simple DIGITAL RELAY
• A digital relay consists of the following main parts: processor, analogue input system, digital
output system and independent power supply.
• Figure 1 presents a simplified block diagram of a digital relay.
• Digital relaying involves digital processing of one or more analog signals in three steps:
1. Conversion of analogue signal to digital form,
2. Processing of digital form,
3. Boolean decision to trip or not to trip.

Fig. 1. Block diagram of a digital relay

 The Main Advantages and Drawbacks of DIGITAL RELAY
• The main difference between digital and conventional relays pertains to ‫يتعلق األمر‬the method
of input signal processing. In the case of digital relays, input signals are converted into digital
form within the analogue input system before being analyzed by the processor.
• Digital relays possess advanced programmable functionality providing high performance level,
flexibility as well as additional monitoring capabilities.
• At present, their application is mainly in transmission system and generation unit protection.
• The main advantages and drawbacks of the digital relays are listed below.

.
 The Main Advantages and Drawbacks of DIGITAL RELAY
• ADVANTAGES OF DIGITAL RELAY
1. High level of functionality integration
2. Additional monitoring functions
3. Functional flexibility
4. Capable of working under a wide range of temperatures
5. They can implement more complex function and are generally more accurate
6. Self-checking and self-adaptability
7. Able to communicate with other digital equipment
8. Less sensitive to temperature, aging
9. Economical
10. More Accurate
11. Plane for distance relaying is possible
12. Signal storage is possible
 The Main Advantages and Drawbacks of DIGITAL RELAY
• LIMITATIONS OF DIGITAL RELAY
1. Short lifetime due to the continuous development of new technologies.
2. The devices become obsolete‫ تتقادم‬rapidly.
3. Susceptibility ‫ قابلية تتأثر‬to power system transients.
4. As digital systems become increasingly more complex they require specially trained staff for
Operation.
5. Proper maintenance of the settings and monitoring data.

.
 THE OPERATION OF THE Complex DIGITAL/Numerical RELAY
• Numerical Relay is the relay in which the measured AC quantities are sequentially
sampled and converted into numerical data that is mathematically and/or logically
processed to make trip decisions.
• Numerical relay is the latest development in the area of power system protection.
• The design and operation method of these relays are different from the conventional
electromechanical relays.
• Numerical relays are based on numerical devices such as microprocessors, microcontrollers and
digital signal processors etc.

Figure 4.1 Block diagram of Numerical relay

 THE OPERATION OF THE Complex DIGITAL/Numerical RELAY
• A relay using digital device like microprocessor for decision making based on digital numbers
representing instantaneous values of the signals is called numerical relay, digital relay,
microprocessor-based relay or computer-based relay.
• The voltage and current signals in the power system are brought down to ‫ انزل الى‬suitable
level using C.T and P.T.
• The signals from C.T and P.T are given to the antialiasing filters which are low pass filters. This
removes the unwanted frequency components.
• The signals from the signal conditioning circuits are sampled using sample and hold circuit.
With the help of analog multiplexer and ADC, the equivalent digital form of analog input signal
is achieved.
• The analog multiplexer gives the facility to accommodate ‫ يستوعب‬a larger number of input
signals.
• The digital output of ADC is given to microprocessor where it is stored in the memory.
• This signal is processed with the help of numerical relaying algorithm and accordingly trip
decision is made.
• The trip signal is digital signal hence converted to analog using digital to analog converter
(DAC). This tripping analog signal is given to the trip coil of a relay.
 THE OPERATION OF THE Complex DIGITAL/Numerical RELAY
• Characteristics OF DIGITAL RELAY
• Compact design and lower cost due to integration of many functions into one relay
• High availability even with less maintenance due to integral self-monitoring
• No drift (aging) of measuring characteristics due to fully numerical processing
• High measuring accuracy due to digital filtering and optimized measuring algorithms
• Many integrated add-on functions, for example, for load monitoring and event/fault recording
• Local operation keypad and display designed to modern ergonomic ‫ مريح‬criteria (Menu-driven
human interfaces ‫)واجهات بشرية تعتمد على القائمة‬

.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
• Computer relay architecture

Figure 1.1 Subsystems of a relaying computer. The dashed line at the top indicates the boundary of the out-
door switchyard. All other equipment is inside the control house
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture
• Computer relays consist of subsystems with well defined functions. Although a specific relay may be
different in some of its details, these subsystems are most likely to be incorporated in its design in some
form.
• The block diagram in Figure 1.1 shows the principal subsystems of a computer relay. The processor is central
to its organization. It is responsible for the execution of relay programs, maintenance of various timing
functions, and communicating with its peripheral equipment. Several types of memories are shown in the
figure. each of them serves a specific need.
• The Random Access Memory (RAM) (1) holds the input sample data as they are brought in and processed.
(2) It may also be used to buffer data for later storage in a more permanent medium. (3) In addition, RAM is
needed as a scratch pad to be used during relay algorithm execution.
• The Read Only Memory (ROM) or Programmable Read Only Memory (PROM) is used (1) to store the
programs permanently. In some cases the programs may execute directly from the ROM, if its read time is
short enough. If this is not the case, the programs must be copied from the ROM into the RAM during an
initialization stage, and then the real-time execution would take place from the RAM. The Erasable PROM
(EPROM) is needed (1) for storing certain parameters (such as the relay settings) which may be changed
from time to time, but once set must remain fixed, even if the power supply to the computer is interrupted.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture
• A large capacity EPROM is likely to become a desirable feature of a computer relay. Such a memory would
(2) be useful as an archival data storage medium, for storing fault related data tables, time-tagged event
logs, and audit trails of interrogations and setting changes made in the relay. The main consideration here
is the cost of such a memory. The memory costs have dropped sufficiently by now so that archival storage
of oscillography and sequence-of-event data on a large scale within the relays has become possible.
• Consider the Analog Input (AI) system next. At the outset it should be pointed out that Figure 1.1 is based
upon using conventional transducers. If electronic CTs and CVTs are used, the input circuits may be
significantly different and data are likely to be entered directly in the processor memory. The relay inputs
are currents and voltages and digital signals indicating contact status.
• The (1) analog signals must be converted to voltage signals suitable for conversion to digital form. This is
done by the Analog to Digital Converter (ADC). Usually (2) the input to an ADC is restricted to a full scale
value of ±10 volts. The current and voltage signals obtained from current and voltage transformer
secondary windings must be scaled accordingly. The largest possible signal levels must be anticipated, and
the relation between the rms (root mean square) value of the signal and its peak must be reckoned with
‫يحسب لها‬.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture
• It is not necessary (1) to allow for high frequency transients in most cases, as these are removed by anti-
aliasing filters which have a low cut-off frequency. An exception to this is a wave relay, which does use the
high frequency (traveling wave) components. For such relays, the scaling of signals must be such that the
entire input signal with its largest anticipated high frequency component must not exceed the ADC input
range.
• The (1) current inputs must be converted to voltages– for example by resistive shunts. As the normal
current transformer secondary currents may be as high as hundreds of amperes, (2) shunts of resistance
of a few milliohms are needed to produce the desired voltage (±10 volts) for the ADCs. An alternative
arrangement would be to use an auxiliary current transformer (Interposing CT‫( )توسط‬3) to reduce the
current to a lower level. However, any inaccuracies in the auxiliary current transformer would contribute
to the total error of the conversion process, and must be kept as low as possible. An auxiliary current
transformer serves another function: (4) that of providing electrical isolation between the main CT
secondary and the computer input system. In this case, the shunt may be grounded at its midpoint in
order to provide a balanced input to following amplifier and filter stages (as shown in Figure 1.2(a) and
(b)).
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture

Figure 1.2 Scaling of current and voltage signals for input to the relay. (a) Direct connection in the main CT
secondary. (b) Use of auxiliary CT. (c) Voltage transformer (VT) and potential divider
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture
• Figure 1.2(c) shows connections to the voltage transformer (VT). A fused circuit is provided for each
instrument or relay, and a similar circuit may be provided for the computer relay as well. (1) The normal
voltage at the secondary of a voltage transformer (VT) is 67 Volts rms for a phase to neutral connection. It
(2) can be reduced to the desired level (±10 volts) by a resistive potential divider sized to provide
adequate source impedance to drive the following stages of filters and amplifiers.
• Although an auxiliary voltage transformer may be used in this case to provide additional isolation, it is not
a necessity.
• Digital inputs (DIs) to the computer relay are usually (1) contact status, obtained from other relays or
subsystems from within the substation. (2) If the other subsystems are computer based, then these
signals can be input to the computer relay without any special processing. An exception to this may be an
opto-isolation circuit provided to maintain isolation between the two systems. (3) When the digital inputs
are derived from contacts within the switchyard (or control house), it is necessary to apply surge filtering
and (or) optical isolation in order to isolate the computer relay from the harsh substation environment.

.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture
• Suppression of surges from wiring connected to any protection system is a specialized subject with
considerable literature of its own. High voltage and high energy content surges are coupled into the
wiring which connects current, voltage, and digital inputs to the protection system. The surges are
created by faults and switching operations on the power system, or by certain types of switching
operations within the control house. For example, sparking contacts in inductive protection and control
circuits within the control house have been found to be a source of very significant disturbances.
• Suppression of these surges requires very (1) careful grounding and (2) shielding of leads and equipment,
(3) as well as low-pass filtering. (4) Nonlinear energy absorbing Metal Oxide Varistors (MOVs) may also be
used. Surge suppression ‫ اخماد الموجه‬filters are necessary for input and output wiring, as well as for the
power supply leads.
• At this stage it is sufficient to be aware of their function in the overall relaying process. The anti-aliasing
filters (1) are low-pass analog filters designed to suit a specific choice of sampling rate used.
• The sampling instants are determined by the sampling clock, which must produce pulses at a fixed rate.
.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture
• At each instant defined by the clock, (1) a conversion from the instantaneous value of an analog input
signal (voltage or current) to a digital form is performed by the ADC, and (2) made available to the
processor. Since the relay in general requires several inputs, (1) several conversions are performed at each
sampling instant. (2) It is desirable (although not essential) that all signal samples be simultaneous, which
means that either the conversion and transmission to the processor of each sample be very fast, or all the
signals be sampled and held at the same instant for processing by a relatively slow conversion-
transmission cycle for each sample. This is typical of a multiplexed analog input system. A third option,
technically feasible but expensive, is to use individual ADCs for each input channel. Trends in the ADC
development and their reduced costs seem to point to the use of individual ADCs for each signal to be the
preferred system.
• It is well to consider this need for simultaneity in a little more detail at this point. Most relay functions
require simultaneous measurement of two or more phasor quantities.
• As shown in Figure 1.1, Digital Output (DO) from the processor is (1) used to provide relay output in the
form of open or close contacts. A parallel output port of the processor provides one word (typically two
bytes) for these outputs. Each bit can be used as a source for one contact. The computer output bit is a
Transistor to Transistor Logic (TTL) level signal, and would be optically isolated before driving a high speed
multi-contact relay, or thyristors, which in turn can be (2) used to activate external devices such as
alarms, breaker trip coils, carrier control etc.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY

Figure 1.3 Multiple signal sampling process and its organization. (a) Single ADC with multiplexed input. (b) Sample
and hold (S/H) added to each channel. (c) Separate ADC for each channel
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Computer relay architecture
• Finally, the power supply is usually a single DC input, multiple DC output converter, powered by the
station battery. The input is generally 125 Volts DC, and the output could be 5 Volts DC and ±15 Volts DC.
Typically the 5 Volt supply is needed to power the logic circuits, while the 15 Volt supply is needed for the
analog circuits. The station battery is of course continuously charged from the station AC service.
Anti-aliasing filters
• anti-aliasing filters are (1) low-pass filters with a cut-off frequency equal to one-half the sampling rate
used by the ADC. An ideal anti-aliasing filter characteristic with a cut-off frequency fc is shown in Figure
1.8. A practical filter can only approximate this ‘brick-wall’ shape, as shown by the dotted line in Figure
1.8. Design aspects of practical anti-aliasing filters will be presented.
• Anti-aliasing filters could be (2) passive, consisting of resistors and capacitors exclusively; or active,
utilizing operational amplifiers. As some buffering between the filters and the ADC is generally necessary,
an operational amplifier is needed in any case, and one could use the active filter design which leads to
smaller component sizes. An active filter may also be designed using the monolithic hybrid
microelectronic technology providing compact packaging. The transfer function for the filter in any case is
determined from considerations of sharpness of cut-off in the stop band, and the transient response of
the filter.
.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Anti-aliasing filters
• In general, if filters with very sharp cut-off are employed, they produce longer time delays in their step
function response. In most applications of computer relaying, two-stage RC filters are found to provide an
acceptable compromise between sharpness of the cut-off characteristic in the stop band, and the time
delay in their step input response. A second order Butterworth, Chebyshev, or maximally flat (Bessel)
filter may be used to satisfy computer relaying requirements. However, these filters have a significant
overshoot in their step input response.
• As an example, we will consider the design of a two-stage RC filter suitable for a sampling process using a
sampling rate of 720 Hz (12 times the fundamental frequency for a 60Hz power system). The filter must
have a cut-off frequency of 360 Hz. We may further specify a DC gain of unity– which makes either an
active or a passive design possible. An active filter can of course be designed to provide any other
reasonable gain.
• Two-stage RC filters are quite popular because of their simplicity, passive components, and a reasonable
frequency response. They suffer from the disadvantage that they produce a rounded characteristic at the
beginning of the stop band. A two-stage RC filter achieves a 12db per octave attenuation rate when it is
well into its stop band. Indeed, this is a property of an all-pole second order filter.
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY

Figure 1.8 Ideal anti-aliasing filter

characteristic for a cut-off frequency of fc.
Approximate realizable characteristic shown
by the dotted line

Figure 1.9 Two-stage RC filter with a cut-off frequency of 360Hz.

(a) RC ladder realization.
(b) Frequency response.
(c) Step wave input response
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Anti-aliasing filters
• The transfer function of a two-stage RC filter is given by:

• R1,C1,R2,C2 being the components of two stages. These components must be adjusted to provide the
necessary attenuation at a desired cut-off frequency fc. Figure 1.9(a) shows a two-stage RC circuit with
this transfer function and a cut-off frequency of 360 Hz. The frequency response and step wave response
of this filter are shown in Figures 1.9(b) and (c).
Digital Relay Connection Diagram
Digital Relay
Connection
Diagram
Main Components of Protection
System
Protection System Components

Figure 1.4 Illustration of lamps used for monitoring C.B. Figure 1.3 Principle of trip circuit in case of fault protection
position and DC voltage of trip circuit.
Trip circuit illustration showing connection of seal-in coil and associated
contacts
Typical arrangement of a DC supply using feeders tapped through
MCBs
D.C. Voltage Supply & A.C. Voltage Supply
Monitoring of D.C. Voltage Supply & A.C. Voltage Supply
LOCK OUT RELAY
LOCK OUT RELAY
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
LOCK OUT RELAY
• The Trip command contact remains closed and the CB closing circuit remains open until reset
• It is used to:
(1) output the Trip command continuously
(2) disable the CLOSE command
• Latching takes place:
- in the SW of the protection device ( SIPROTEC 4)
- via separated lock-out relays which are mechanically linked.
• Reset: electrically or hand reset
Disconnecting Switch (DS) Control Circuits (Trip Circuit & Close Circuit) Using
Classic Control

D.S. Operation by DC Series Motor

Disconnecting Switch (DS) Control Circuits (Trip Circuit & Close Circuit) Using
Binary Output
Trip Circuit Supervision (TCS)
Condition of power C.B Trip K1 K2 K3
system position contact
1. Fault 0 1 0 1 1
2. Normal operation 1 0 1 0 1
(on)

3. Normal operation 0 1 0 1 1
(off)

4. TCS 1 1 0 0 0
 THE Architecture OF THE Complex DIGITAL/Numerical RELAY
Trip Circuit Supervision (TCS)
• The trip circuit is monitored as to:
- Presence of the control voltage
- Interruption in the wiring
- Interruption in the trip coil of the CB
- Monitoring C.B. positions
• Supervision takes place:
- in the digital protection device via BI ( advantage of self-monitoring and oscillographic record with time
stamp)
- with separated special monitoring relays, The trip-circuit supervision is possible for phase-selective
tripping and / or three-phase tripping
Bus coupler with two VTs for the two busbars
Synchronizer

Automatic synchronization test instrument

when paralleling conditions have been met,
the contact is closed, the networks can be
synchronized Automatic synchronizer unit
Automatic Switching Control
Digital Overcurrent Relay
 Digital Overcurrent Relay
1. Conventional overcurrent relay
1.1 Phase overcurrent relay
• Phase overcurrent relay is provided with definite and inverse time characteristics. Definite time
characteristic checks whether current exceeds the pre-determined pickup value or not. A tripping signal is
issued after pickup operation after a certain time delay. Inverse time characteristic uses different
formulas, incorporated in various Standards. For example, the operating characteristic curve of the phase
overcurrent relay, with different constant values based on inverse degree and slope level, as defined by
the IEC Standard:

• where, Top is the calculated tripping time of relay, Sec,

Ke is the selected Time Multiplier Setting (TMS) and it is the relevant set point for relay coordination (value
from 0.05 to 1 with step 0.01),
β is the selected slope (value from 0 to 15 with step 0.01),
α is the selected slope (value from 0 to 2 with step 0.01),
In is the nominal secondary current of the protected power system element,
 Digital Overcurrent Relay
1. Conventional overcurrent relay
1.1 Phase overcurrent relay
Ipu is the selected relay pickup current (value from 1.05 In to 1.20 In), and
If is the measured secondary fault current, A.
• The above formula ensures that the relay located at the nearest point from the source is tripped in the
shortest time, whereas the consecutive relays in the direction of load trip with greater time delays regarding
the general selectivity concept.
• In the traditional phase OC relay, it is noted that the pickup currents are normally set above the maximum load
current (In) and below the minimum fault current, where In is the nominal current of the protected element.
The constants of α and β are used to control the inverse degree and slope value. The operation of the low-set
current stage I> of the conventional overcurrent module is selected either definite time or inverse time
characteristic. When an inverse definite minimum time (I.D.M.T.) characteristic is chosen, the operation time of
the low-set overcurrent stage I> will be a function of the current; the higher the current, the shorter the
operation time. The module includes many characteristics with different slopes. The slope of the operating
time-current curves is determined by the values of the constants α and β. According to the Standard, a fault
current range is defined between 2 and 20 times the setting (Ipu). Additionally, the relay must pick up when
the measured current exceeds the set start current. The operating time-current characteristics are equipped
with standard, I.D.M.T., normal inverse, extremely inverse, long inverse, very inverse, very inverse along with
definite time characteristics, and instantaneous stage for better coordination with the rest of the network.
 Digital Overcurrent Relay
1. Conventional overcurrent relay
1.1 Phase overcurrent relay
. 2

Operating time(Sec)
1.5

0.5

2 4 6 8 10 12 14 16 18 20
Phase current(I)
Fig. 1(a) Tripping time characteristics of the conventional phase
overcurrent relay.
 Digital Overcurrent Relay
1. Conventional overcurrent relay
1.2 Earth fault relay
• Another type of tripping characteristic curves of the earth fault relay are defined in the IEC standard as:

• where, Top is the calculated tripping time of relay, Sec,

β is the selected constant from 0 to 15 with step 0.01,
α is the selected constant from 0 to 2 with step 0.01,
Ke is the selected time dial from 0.05 to 1 with step 0.01, and
Ipu is the selected relay pickup current (its value is from 0.05 In to 0.20 In)
.
 Digital Overcurrent Relay
1. Conventional overcurrent relay
1.2 Earth fault relay
• Earth fault relay is used to protect feeder against faults involving ground. Typically, earth faults are SLG and
DLG faults. To provide sensitive protection, earth fault relays use zero-sequence current rather than phase
current for fault detection. It is known that the zero-sequence component is absent in normal load current and
phase faults. This means the earth fault relay will not respond to the 3-LG and DL faults. Hence, the pickup
with zero-sequence current can be much below the load current value, thereby providing sensitive earth fault
protection. In practice, power systems are inherently unbalanced. Thus, load current would also have a small
percentage of zero-sequence due to unbalance of three-phase currents. Hence, it is mandatory to set the
pickup current above the maximum unbalance expected under normal conditions. In fact, the maximum
acceptable unbalance factor lies between 5 to 10%. One earth fault relay is adequate to provide protection
against all six types of earth faults (A-G, B-G, C-G, A-B-G, B-C-G and C-A-G). Nevertheless, three phase current
relays are required to provide protection against phase faults (A-B-C, A-B, B-C, C-A). Thus, four relays are
required to provide a complete overcurrent protection for each feeder..
 Digital Overcurrent Relay
1. Conventional overcurrent relay
1.2 Earth fault relay
.

Fig. 1(b) Tripping time characteristics of the conventional earth

fault relay.
 Digital Overcurrent Relay
1. Conventional overcurrent relay
1.3 Adaptive overcurrent relay
• Conventionally, the relay settings are computed conservatively. For example, in a traditional overcurrent relay,
pick-up current is selected to be above the maximum possible full load current and below the minimum
possible fault current. Sometimes, it may be quite difficult to obtain such comfort zones for relay settings. If
load currents vary significantly from light to peak loads, increasing sensitivity of the overcurrent relay under
light load conditions is executed by safely reducing the corresponding pick-up value. Such adjustments make
the relay tripping characteristic adaptive. In the present era, generating plants (especially DGs) are being
added to the power system directly, resulting in the change of fault level in the system. The presence or
absence of the DGs of the grid will alter fault current levels drastically, and it would be impossible to achieve a
single acceptable setting for protective relay. However, if overcurrent protection could be made aware through
communication facility that grid and DGs is connected, it could choose the appropriate settings from a set of
values; and the adaptation principle can be applied to a new load condition.
• Adaptive relay is a protection device in which its settings can be automatically changed to the power system
conditions. Adaptive protection has not yet realized its full potential.
 Digital Overcurrent Relay
1. The connection circuit diagram of the
overcurrent relay with the power system
 Digital Overcurrent Relay
1. The connection circuit diagram of the
overcurrent relay with the power system
 Digital Overcurrent Relay
1. The connection circuit
diagram of the OCR with
the power system
 Digital Overcurrent Relay Algorithm
clear all
clc
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Q6_(a)Case 1 (phase OCRA)
Ke=0.6;
Al=1;
Be=2;
Ir=1;
If=5*Ir;
Im=If; % Measured fault current= Im= If/CTR
Ipu=1.1*Ir; % Pick up current= Ipu= Isetting*IrCT
PSM=Im/Ipu % Plug Setting Multiplier (PSM)= Measured fault current/Pick up current= Im/Ipu= (If/CTR)/(Isetting*IrCT)
Topa1=(Ke.*Be).*((PSM).^Al-1).^-1 % Top1= Operating time (in Sec) of phase OCR
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Q6_(b)Case 1 (phase OCRB)
Ke=0.6;
Al=1;
Be=2;
Ir=1;
If=1.5*Ir;
Im=If; % Measured fault current= Im= If/CTR
Ipu=1.1*Ir; % Pick up current= Ipu= Isetting*IrCT
PSM=Im/Ipu % Plug Setting Multiplier (PSM)= Measured fault current/Pick up current= Im/Ipu= (If/CTR)/(Isetting*IrCT)
Topb1=(Ke.*Be).*((PSM).^Al-1).^-1 % Top1= Operating time (in Sec) of phase OCR

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 Digital Overcurrent Relay Algorithm
% Q6_(c)Case 1 (phase OCRC)
Ke=0.6;
Al=1;
Be=2;
Ir=1;
If=1.1*Ir;
Im=If; % Measured fault current= Im= If/CTR
Ipu=1.1*Ir; % Pick up current= Ipu= Isetting*IrCT
PSM=Im/Ipu % Plug Setting Multiplier (PSM)= Measured fault current/Pick up current= Im/Ipu= (If/CTR)/(Isetting*IrCT)
Topc1=(Ke.*Be).*((PSM).^Al-1).^-1 % Top1= Operating time (in Sec) of phase OCR
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Q6_(d)Case 2 (ground OCR)
Ia= 5*(cos(130*(pi/180))+ sin(130*(pi/180)))
Ib= 1.5*(cos(-70*(pi/180))+ sin(-70*(pi/180)))
Ic= 1.1*(cos(80*(pi/180))+ sin(80*(pi/180)))
Ig1= Ia+ Ib +Ic
Ke=0.6;
Al=1;
Be=2;
Ir=1;
If=Ig1*Ir;
Im=If; % Measured fault current= Im= If/CTR
Ipu=0.1*Ir; % Pick up current= Ipu= Isetting*IrCT
PSM=Im/Ipu % Plug Setting Multiplier (PSM)= Measured fault current/Pick up current= Im/Ipu= (If/CTR)/(Isetting*IrCT)
Topg1=(Ke.*Be).*((PSM).^Al).^-1 % Top1= Operating time (in Sec) of ground OCR
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%