Internal components and

Processor instruction Set

Learn in go b jecti ves

✔Explain the internal computer components

✔Explain how buses are used to communicate between the components
✔Explain the difference between the Harvard and Von Neumann architecture
✔Describe the stored program concept
✔Describe addressable memory
✔Describe the processor instruction set
✔Recognise that the processor instruction set is processor dependent
✔Recognise that instructions are made up of an opcode and operand
✔Explain immediate and direct addressing modes
In tern alC o m p u terC o m p o n en ts

✔Processor
✔Main memory (RAM)
✔Read Only Memory (ROM)
✔Address bus
✔Data bus
✔Control bus
✔I/O Controllers
P ro ceso r

A processor fetches, decodes and executes instructions and performs

logical and arithmetic operations.
M ain m em o ry(P rim arysto rage)

The purpose of main memory is:

✔ to store the instructions from the programs currently running on a
computer system
✔ to temporarily hold the data needed by those programs.
M ain m em o ry(P rim arysto rage)

✔RAM (Random Access Memory) memory is volatile.

✔When the computer is turned off the contents of volatile memory is lost.
✔For instance, when you create a document that you do not save, if the
computer crashes, the document will be lost because it is only stored in RAM
✔If you have saved the document to non-volatile secondary storage then you
will be able to retrieve the document once power has returned.
✔Every time the computer is powered up the operating system needs to be
copied into the RAM from secondary storage. This is what happens during
the boot sequence.
 V irtu alm em o ry

✔Additional memory on the secondary storage device called swap

space is allocated as volatile primary storage and appears as
additional RAM
✔Virtual memory is used when the limits of RAM memory are reached
✔Virtual memory is slow because the secondary storage device is
slower than RAM
✔Segmentation and paging are two methods of managing virtual
memory
Segm en tati o n

✔Dividing RAM into sections that stores different

components of the instructions and hardware so that
they are fragmented across memory.
✔The segments are not the same size
✔Segmentation means the code and data are split up
in a sensible way along individual routines and
modules and data allowing the components to be
shared by other processes.
agin g
P

✔Paging divides the memory into equally sized sections, whereas for
segmentation the sizes are uneven.
✔On the primary storage these are called frames, but on the secondary
storage these sections are called pages.
 R O M –R ead o n lym em o ry

✔ROM is non-volatile memory

✔Data can only be read from ROM and cannot be edited or deleted.
✔ROM is only used for situations where you can be sure that updates will
not be needed
✔A computer has a ROM chip on the motherboard that stores the BIOS
(basic input output system)
✔The BIOS gets copied into RAM when the computer boots up
✔The purpose of the BIOS is to test the hardware and then to load the
operating system
In p u t/O u tp u tco n tro ler

✔The input and output controller manages hardware devices such as hard
disk, monitor and keyboard.
✔This is helpful for the processor because the processor does no need to
control each device.
✔Each device will have different control signals, so the processor can
delegate the task of managing the input and output devices to the input /
output controller.
✔Input controller manages mouse, keyboard
✔Output controller manages monitor, printer
✔Input / Output disk controller manages the secondary storage devices.
B u sco m m u n icati o n

✔Buses are wires that connect the internal component of a computer.

✔The internal components are connected by buses following the schematic below.
B u se

✔There are three types of buses:

✔ Address Bus
✔ Data Bus
✔ Control Bus

Data Bus
✔The data bus is a set of wires that allows the transfer of data between different
computer components including the main memory, processor and input/output
controllers.
✔The data bus sends data in both directions for the processor, and memory, but input
controllers send data only and output controllers receive data only.
B u se

Address Bus
✔The address bus specifies the physical memory address that we wish to write data to
or read from.
✔The processor sends address requests,
✔All the other components receive requests.

Control Bus
✔The control bus is used to send commands from the processor to other components
and to receive status signals from the components.
✔The control bus sends signals in both directions for all components.
W riti n gfro m m em o ryto p ro ceso r

✔Signal to write is placed on control bus

✔control bus carries the clock signal to synchronise the memory and
processor
✔The data to write are placed on the data bus,
✔The address location in memory where the data is to be stored is
placed on the address bus
R ead in gfro m m em o ryto p ro ceso r

✔Signal to read is placed on control bus,

✔control bus carries the clock signal to synchronise the memory and
processor,
✔The address location in memory where the data is be stored is placed
on the address bus by the processor
✔The data to read at the memory location specified in the address bus
are placed on the data bus by the memory and sent to the processor
Th esto red P ro gram co n cep t

✔The instructions are stored in main memory.

✔The instructions are fetched, decoded and executed in the processor.
vo n N eu m an n A rch itecu re

✔For systems using von Neumann architecture the program

instructions and the data to be processed are stored in the same
memory.
✔Instructions and data have to be retrieved one at a time.
✔General purpose computers are based on von Neumann architecture.
vo n N eu m an n b o tt len eck

✔The von Neumann bottleneck refers to the latency for transferring

data and instructions between memory and the processor.
✔Even if the speed of memory and the processor are improved, in the
von Neumann architecture we are still limited by the speed of transfer
of data and instructions between the two components.
✔This is because both the data and instructions use the same buses.
H arvd arch itecu re

✔With Harvard architecture there are separate memory storage for the
instructions and the data.
✔This allows simultaneous retrieval both data and instructions on each
processor cycle therefore speeding up the throughput of instructions
and data and reducing latency.
✔ Harvard Architecture is typically used in embedded systems and used
for signal processing. The programs are stored onboard the processor
in ROM.
 A d d resab lem em o ry

✔ Each location in memory has an address associated with

it. The data refers to the content at each location.
✔ We can access the data in memory by referencing to the
Memory Data/
memory location and writing to or reading the values in
location Instructions
these memory locations.
1 01100100
✔ With word addressing The typical size of each memory
2 00001011
location is the word length of the system (typically 32 or
64 bits) 3 00011101
✔ With byte addressing each memory location can hold 4 01111001
one byte. 5 10010011
✔ The number of memory addresses is determined by the
address bus width. For instance, if the bus address bus
width is 32 bits then 232 address locations can be
accessed.
In stru cti o n set

✔The instruction set is a set of machine language commands for the processor.
✔Each processor architecture will have its own unique instruction set. Thus any code
written in machine code or assembly language will be processor specific.
✔Nevertheless all processor architectures will have a common set of operations that
include:
✔ Data transfer between internal components
✔ arithmetic operations
✔ Logical operations
✔ Shift operations
✔ Branching
✔ Comparison
In stru cti o n s

✔Instructions are made up of two parts: the opcode and the operand.
✔The opcode determines the operation that is to be carried out (eg.
Add, load).
✔The operand is the value or memory address that that instruction is
to be operated on.
✔The opcode in turn is split into two parts: The basic machine
operation and the addressing mode.
A d d resin gm o d e

The addressing mode determines how the operand is interpreted.

There are many addressing modes but we are only interested in two:
The immediate addressing mode and the direct addressing mode.
✔Immediate addressing mode – The data value in the operand is part
of the instruction. In other words this is the actual value we apply the
operation to.
✔Direct addressing mode – The operand specifies the address of the
data in its memory location
O p co d ean d o p eran d

✔In the example below we have allocates 8 bits to each instruction.

✔Four bits are allocated to the operand thus 16 (24) possible addresses
in memory are accessible or data values.
✔Four bits are allocated to the opcode 1 of which is 1 given over to the
addressing mode. Thus we have 2 (21) addressing modes, and 8 (23)
machine operations

Opcode Operand
Basic Machine Addressin
operation g mode
0 1 0 0 0 0 1 1
 M ach in eco d ean d asem b lyan gu age

Opcode Assembler Description

instruction
010 0 LOAD #5 Load the value 5 into accumulator register (# on the operand
0101 LDR R1, #5 refers to direct addressing mode, its absence implies
immediate addressing mode
100 1 ADD 4 Add 4 to value already in accumulator register
0100
101 1 STORE 15 Copy the contents of the accumulator register to memory
1111 location 15

Memory 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
location
value - - - - 3 - - - - - - - - - - -

What value is stored in memory location 15 once all three instructions have been completed?
astp ers–In stru cti o n set
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