Unit : 1

Subject: COA
Branch – Computer Science & Information Technology
Semester- IV
Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Course outcomes
CO Blooms
No. Course Out Come Skills
Level

Ability to Understand and Explain the concept of

CO1 basic architecture and its working of computer Understand/ L1/L2
system organization Explain
Ability to Apply the various algorithm/techniques of
CO2 computer system architecture Apply L3
Ability to Analyze some of the design issues in terms
CO3 of speed, technology, cost, performance of computer Analyse L4
system architecture
Ability to evaluate various techniques of memory Evaluate,
management, multi processing Team Work,
CO4 Communicati L5
on

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology
 Unit-I
Basic Structure of Computer: Structure of Desktop Computers,
CPU: General Register Organization-Memory Register, Instruction Register,
Control Word, Stack Organization, Instruction Format, ALU, I/O System,
Bus, CPU and Memory Program Counter, Bus Structure,
Register Transfer Language-Bus and Memory Transfer, addressing modes.

Control Unit Organization: Basic Concept of Instruction, Instruction Types,

Micro Instruction Formats, Fetch and Execution cycle, Hardwired control unit,

Micro-programmed Control unit micro program sequencer Control Memory,

Sequencing and Execution of Micro Instruction.

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology
 Introduction

• Just as buildings, each computer has a visible

structure, referred to as its architecture.
• In computer science and engineering computer
architecture is the practical art of selecting and
interconnecting hardware components to create
computers that meet functional, performance and cost
goals and the formal modeling of those systems.
• The functional blocks in a computer are of four types:
1. Central Processing Unit
2. Memory
3. Input Unit
4. Output Unit
 Basic Structure of Computer: Structure of Desktop Computers

The desktop computers are the computers which are usually found on a
home or office desk. They consist of processing unit, storage unit, visual
display and audio as output units, and keyboard and mouse as input units.
Usually storage unit of such computer consists of hard disks, CD-ROMs, and
diskettes. Desktop computers are basically digital computers. They consist of
five functionally independent units: input, memory, arithmetic and logic,
output and control units. Memory unit is also known as storage unit, and
arithmetic and logic unit (ALU) and control unit are combine as processing
unit. Fig. shows these five functional
Input Unit - The input unit accepts the digital information from user with the
help of input devices such as keyboard, mouse, microphone etc. The
information received from the input unit is either stored in the memory for
later use or immediately used by the arithmetic and logic unit to perform
the desired operations.

Memory Unit - The memory unit is used to store programs and data.
Usually, two types of memory devices are used to form a memory unit:
primary storage memory device and secondary storage memory device.

Arithmetic and Logic Unit - The Arithmetic and Logic Unit (ALU) is
responsible for performing arithmetic operations such as add, subtract,
division and multiplication and logical operations such as ANDing, ORing,
Inverting etc.

Output Unit - The output unit sends the processed results to the user using
output devices such as video monitor, printer, plotter, etc.

Control Unit - The control unit co—ordinates and controls the- activities
amongst the functional. The basic function, of control unit is to fetch the
instructions stored in the main memory, identify .
 Central Processing Unit (CPU)

• The CPU or the microprocessor (or simply processor) is

referred as the brain of a computer system.
• CPU consists of three main subsystems, the Control Unit
(CU), the Arithmetic Logic Unit (ALU), and the Registers.
• Speed of the computer system is defined by the architecture of
the processor being used.
Central Processing Unit (CPU) (Condt…)
Communication inside a computer..
• A computer program consists of both instructions and data.
The program is fed into the computer through the input
unit and stored in the memory.
• In order to execute the program, the instructions have to be
fetched from memory one by one.
• This fetching of instructions is done by the control unit.
• After an instruction is fetched, the control unit decodes the
instruction.
• According to the instruction, the control unit issues control
signals to other units.
Communication inside a computer..
o After an instruction is executed, the result of the instruction is
stored in memory or stored temporarily in the control unit or
ALU, so that this can be used by the next instruction.
o The results of a program are taken out of the computer through
the output unit.
o The control unit, ALU and registers are collectively known as
Central Processing Unit (CPU)
Communication inside a computer
 Registers
• It is a special temporary storage location within the CPU.
• Registers quickly accept, store and transfer data and
instructions that are being used immediately.
• To execute an instruction, the control unit of the CPU
retrieves it from main memory and places it onto a register.
• The typical operations that take place in the processing of
instruction are part of the instruction cycle or execution cycle.
• The instruction cycle refers to the retrieval of the instruction
from main memory and its sub sequence at decoding.
• The time it takes to go through the instruction cycle is
referred to as I-time.
 CPU: General Register
The CPU is the brain of the Computer system. It works as an administrator of a
system. All the operations within the system are supervised and controlled by CPU. It
interprets and co-ordinates the instructions. The data and instructions are
temporarily stored in its memory unit. After performing Operation, the result of
operation can be stored in this memory unit.
 CPU Registers
Register is a group of flip-flops which can be used to store a word. It is a high speed
temporary storage space for holding data, addresses and instructions during processing
the instruction. Registers are not referenced by their addresses; they are directly
accessed. To perform execution of instruction, the processor contains a number of
registers used for temporary storage of data and some special function registers
Program Counter (PC):- A program is a series of instructions stored in the
memory. These instructions tell the CPU exactly how to get the desired
result.

Instruction Register (IR):- It is used to hold the instruction that is currently

being executed. The contents of IR are available to the control unit, which
generate the timing signals that control the various processing elements
involved in executing the instruction.

Memory Address Register [MAR] and Memory Data Register (MDR): -

These registers are used to handle the data transfer between the main
memory and the processor. The MAR holds the address of the main
memory to or from which data is to be transferred.
 Organization-Memory Register

The MAR holds the address of the main memory to or from which data is to be
transferred. The MDR sometimes also called MBR (Memory Buffer Register)
contains the data to be written into or read from the addressed word of the main
memory.
 Organization-Memory Register

General purpose registers - These are used to hold the operands for arithmetic and logic
operations and/or used to store the result of the operation. Since the access time of
these registers is lowest, these are used to store frequently used data.

Arithmetic logic unit uses CPU registers to accept data for processing. After processing
data ALU Stores result again in the CPU register. A'LU also stores the status of the result
in. the CPU register.

This result includes information whether result is positive/negative, zero, having

even/odd parity, any carry/borrow resulted during arithmetic operation and so on. This
register is commonly known as flag register or program status register. Supervisory
control unit of a CPU uses flag register to execute conditional branch/jump instructions.
Let us, first discuss few typical registers, some of which are commonly available in of
machines. These registers are:-

• Memory Address Register (MAR):- Connected to the address lines of the system
bus. It specifies the address of memory location from which data or instruction is
to be accessed (for read operation) or to which the data is to be stored (for
write operation).

• Memory Data Register (MDR):- Connected to the data lines of the system bus. It
specifies which data is to be accessed (for read operation) or to which data is to be
stored (for write operation).

• Program Counter (PC):- Holds address of next instruction to be fetched, after the
execution of an on-going instruction.

• Instruction Register (IR):- Here the instructions are loaded before their execution
or holds last instruction fetched.
General bus organization for CPU registers.
Data flow between CPU, memory and I/O devices

Data Path
Control Signals
Auxilliary Storage
(Backing Storage)
To Supplement main storage

Memory
Output
Input
Unit
Unit

Control Unit ALU

Registers

Processor
 Control Word/Unit
• It is responsible for directing and coordinating most of the
computer system activities.
• It does not execute instructions by itself. It tells other parts of
the computer system what to do.
• It determines the movement of electronic signals between the
main memory and arithmetic logic unit as well as the control
signals between the CPU and input/output devices.
 Control Unit
The control unit initiates a series of sequential steps of micro
operation During any given time, certain microoperations are to be
initiated, while others remain idle.
The control variables at any given time can be represented by a
string of 1's and O's called a control word.
As such, control words can be programmed to perform various
operations on the components of the system control unit whose
binary control variables are stored in memory is called
microprogrammed control unit
Each word in control memory contains within a microinstruction.
The microinstruction specifies one or more micro-operat for the
system.
 Control Unit(Condt…)
• To complete an event i.e. processing, control unit repeats a set
of four basic operations:
• Fetching is the process of obtaining a program instruction or
data item from the memory
• Decoding is the process of translating the instruction into
commands the computer can execute.
• Executing is the process of carrying out the commands.
• Storing is the process of writing the result to memory.
 Control Unit
• The internal communication inside a computer that transforms raw
data into useful information is called processing.
• To perform this transformation, the computer uses two
components- processor and memory
• The program is fed into the computer through the input unit and
stored in the memory
• To execute the program, the instructions have to be fetched from
memory one by one which is done by control unit
• Then the control unit decodes the instruction.
 Control Unit
• According to instruction, control unit issues signals to other
units.
• After instruction is executed, the result of the instruction is
stored in memory or stored temporarily in the registry, so that
this can be used by the next instruction.
• The results of a program are taken out of the computer
through the output unit.
 Stack Organization,
A useful feature that is included in the CPU of most computers is a stack or last-in,
first-out (LIFO) list. A stack is a storage device that stores information in such a
manner that the item stored last is the first item retrieved.

The operation of a stack can be compared to a stack of trays The last tray placed
on top of the stack is the first to be taken off The stack in digital computers is
essentially a memory unit with an address register that can count only (after an
initial value is loaded into it)

The register that holds the address for the stack is called a stack pointer (SP)
because its value always points at the top item in the stack. Contrary to a stack of
trays where the tray itself may be taken out or inserted, the physical registers of a
stack are always available for reading or writing. It is the content of the word that
is inserted or deleted.
 Stack Organization,

The operation of insertion is called push (or push down) because it can be
thought of as the result of pushing a new item on top.

The operation of deletion is called pop (or pop-up) because it can be thought
of as the result of removing one item so that the stack pops up However,
nothing is pushed or popped in a computer stack' These operations are
simulated by incrementing or decrementing the stack pointer register
 Stack Organization,
Register Stack

A stack can be placed in a

portion of a large memory or it
can be organized as a collection
of a finite number of memory
words or registers. Figure the
organization of a 64 word
register stack. The stack pointer
register SP con tains a binary
number whose value is equal to
the address of the word that is
currently on top of the stack.
 Stack Organization,

Memory Stack
A stack can exist as a stand-alone unit as
it can be implemented in a random-
access memory attached to a CPU. The
implementation of a stack in the CPU is
done by assigning a portion of memory
to a stack operation and using a
processor register as a stack pointer.
Figure 8-4 shows a portion of computer
memory partitioned into three segments:
program, data, and stack. The program
counter PC points at the address of the
next instruction in the program.
 Interconnection Of Units
• A computer program consists of both instructions and data.
• The program is fed into the computer through the input unit
and stored in the memory.
• In order to execute the program, the instructions have to be
fetched from memory one by one and store it into registers
(working memory) for processing.
• This fetching of instructions is done by the control unit.
 Instruction cycle
A program residing in the memory unit of the computer consists of a
sequence of instructions. The program is executed in the computer by going
through a cycle for each instruction.
Each instruction cycle in turn is subdivided into a sequence of subcycles or
phases.

In the basic computer each instruction cycle consists of the following

phases:

1. Fetch an instruction from memory.

2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect
address.
4. Execute the instruction.
 Instruction cycle
Upon the completion of step 4, the control goes back to step 1 to fetch,
decode, and execute the next instruction. This process continues
indefinitely unless a HALT instruction is encountered.
 Instruction cycle

The format of an instruction is usually depicted in a rectangular box symbolizing

the bits of the instruction as they appear in memory words or in a control register.

The bits of the instruction are divided into groups called fields.

The most common fields found in instruction formats are:

1. An operation code field that specifies the operation to be performed.
2. An address field that designates a memory address or a processor register.
3. A mode field that specifies the way the operand or the effective address is
determined. Other special fields are sometimes employed under certain
circumstances,
as for example a field that gives the number of shifts in a shift-type instruction. The
operation code field of an instruction is a group of bits.
Instruction Cycle
Instruction Cycle Steps
 Arithmetic Logic unit
• The ALU contains electronic circuits necessary to perform arithmetic and
logical operations.
• The arithmetic operations are ADD, SUBSTRACT, MULTIPLY, DIVIDE,
etc.
• The logical operations include COMPARE, SHIFT, ROTATE, AND, OR,
etc
• The control unit analyses each instruction in the program and sends the
relevant signals to all other units – ALU, Memory, Input unit and Output
unit
 INTERCONNECTIONS of UNITS..
• Set of wires used for interconnection is known as system bus
which carry group of bits (information) in a controlled manner.
• It is further divided into three logical units, namely the address
bus, the data bus, and the control bus.
 System Buses Types
• Data Bus: The data bus is used when any unit is sending data,
instruction or command code to some other units.
• Address Bus: The address bus is used when one unit is sending
an address information i.e. location of the data residing in the
memory to another unit.
 Control Bus
• Control Bus: The control bus is responsible for making CPU,
memory and I/O devices work together as a functional
system, carrying signals that report the status (ready, not
ready) of various units.
• The function of a control bus is to determine and instruct
according to the operation type (Read or Write). For example,
if the processor or an I/O device wants to read or write a
value from memory, the control bus will specify it.
 Processing of Information
• The bus is common to all the units in the computer. Before
sending some information on the bus, an unit should verify
whether the bus is free or occupied with some communication
started by some other unit.
• CPU is the bus master in a computer which decides who
should control the bus when more than one unit wants the bus
at the same time.
• An unit who needs the bus makes a request to the CPU and
waits sanction. Till the CPU issues sanction, the requesting
unit does not attempt to use the bus.
 Interconnection of Computers Units via
System Bus

Input and
Memory
CPU Output(I/O)
Unit
Units

Data Bus
Address Bus
Control Bus

System
Bus
Interconnection of Computers Units via Bus

• Shows how the system bus interconnects the processor,

memory and I/O devices.
• Both processor and memory units hold a bi-directional
relationship with the control and data bus.
Interconnection of Computers Units via Bus
• In case of an address bus, the communication with processor
and memory is unidirectional.
• Processor provides location of data (stored in the register) to
be fetched from the memory to the address bus and the data
carries the required data to the processor.
Interconnection of Computer Units via BUS

• I/O devices have a bi-directional relationship with

the system bus.
 Arithmetic Logic Unit (ALU)
• ALU performs all the arithmetic and logical functions.
• It performs arithmetic as well as logical functions.
• The speed of the computer system is defined by the
architecture of the processor being used.
 Memory
• Memory is the computer's electronic scratchpad or
local store in computer terminology.
• Used for temporary storage of calculations, data, and
other work in progress.
• Two types: Primary and Secondary
• Primary memory or the main memory is part of the
main computer system. The primary memory itself is
of two types.
• The first is called random access memory (RAM) and
the other is read only memory (ROM).
 Random Access Memory (RAM)
• The processor directly stores and retrieves
information from it.
• Memory is organized into locations. Each
memory location is identified by a unique
address. The access time is same for all
location.
• It is volatile: when turned off, everything in
RAM disappears.
• Two types:
 Types of RAM
• Dynamic Random Access Memory (DRAM):
This type RAM retain the content of any location only for
a few milliseconds. Within that period, each location
must be written again with the same contents. This is
known as refreshing.

• Static Random Access Memory (SRAM):

This type of RAM preserves the contents of all the
locations as long as the power supply is present. SRAM is
generally included in a computer system by the name of
cache.
 Read Only Memory (ROM)
• Data stored in ROM cannot be modified, or
can be modified only slowly or with difficulty,
so it is mainly used to distribute.
• The instructions in ROM are built into the
electronic circuits of the chip which is called
firmware.
• Random access in nature and non-volatile.
 Types of ROM
• Programmable read-only memory (PROM), or one-time
programmable ROM can be written to or programmed via a special
device called a PROM programmer.
• Erasable programmable read-only memory (EPROM) can be erased
by exposure to strong ultraviolet light then rewritten with a process
that again needs higher than usual voltage applied.
• Electrically erasable programmable read-only memory (EEPROM) is
based on a similar semiconductor structure to EPROM, but allows
its entire contents (or selected banks) to be electrically erased, then
rewritten electrically, so that they need not be removed from the
computer
 Flash Memory
• Modern type of EEPROM invented in 1984.
• Random access memories and are non-volatile.
• Use one transistor per memory cell and come
in capacities ranging from 1 MB to 32 GB by the
year 2007.
• The read time is much smaller (tens of
nanoseconds) compared write time (tens of
microseconds).
Varieties of Semiconductor Random Access
Memories

Main memory of Read Only Memory

computers (ROM)

Read/Write
memory Factory User Erasable PROM
Programmed Programmable
PROM
SRAM DRAM
Permanent
non-erasable (Non-erasable)
UVEPROM EEPROM
 Cache Memory
• High speed memory kept in between processor and
RAM to increase the data execution speed.
• Kept near to the processor.
• Major reason for incorporating cache in the system
is that the CPU is much faster than the DRAM and
needs a place to store information that can be
accessed quickly.
• Cache fetches the frequently used data from the
DRAM and buffers (stores) it for further processor
usage.
Cache Memory
 Different Levels of Cache
• L1-cache is the fastest cache and it usually comes within
the processor chip itself. L1 cache typically ranges in size
from 8KB to 64KB and uses the high-speed SRAM
instead of the slower and cheaper DRAM used for main
memory.
• L2 cache comes between L1 and RAM and is bigger than
the primary cache.
• L3 cache is not found nowadays as its function is
replaced by L2 cache. L3 caches are found on the
motherboard rather than the processor. It is kept
between RAM and L2 cache.
Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Processor Speed
• Speed of a computer system is determined by several
factors, clock speed of the processor and the speed and
size of the data bus.
• Clock speed is the rate at which the processor processes
information and this is measured in millions of cycles per
second(Megahertz)
• The more the number of hertz, the faster is the
processing speed
• The larger the bus width and the faster the bus speed,
the greater the amount of data can travel on it in a given
amount of time.
Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Input Devices
• Any peripheral used to provide data and
control signals to an information processing
system such as a computer or other
information appliance.
• Common input devices: Keyboard, Mouse
• Other devices: microphone, digital camera,
scanner.

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology
 Output Devices
• Any piece of computer hardware equipment
used to communicate the results of processed
data to the user.
• Examples: Monitors, Printers, Speakers, etc.

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology
 Register Transfer Language-Bus and Memory Transfer,

The digital system can be constructed with flip flops and gates using
sequential logic design.

However, it is difficult redesign large digital systems using this approach. To

overcome this difficulty, large digital systems are designed using modular
approach.

In the modular approach, system is partitioned into subsystems such that

each subsystem performs some functional task. Such modules are
constructed from registers, counters, decoders, multiplexers, arithmetic
and logic elements and control Logic. The modules are then
interconnected with common data and control paths to form a digital
system
 Register Transfer Language-Bus and Memory Transfer,

The features of register transfer logic

• Uses registers as a primitive component in the digital system instead of
flip-flops and gates.
• The information flow and processing tasks among the data stored in
the registers is described in a concise and precise manner.
• Uses a set of expressions and statements which resemble the
statements used in programming languages.
• The presentation of digital functions in register transfer logic is very
user friendly.
 Register Transfer Language-Bus and Memory Transfer,

Basic Components of Register Transfer Logic

The register transfer logic method uses four basic components to describe
digital systems. These are as follows:

Registers and their functions: The total number of registers in the system and
their functions includes all its counterparts such as shift registers, counters
and memory unit. Counter is register, which increments the information
stored in it
A memory unit is a set of storage registers where information can be stored.

Information: The information is stored in the registers may be binary

numbers, BCD numbers, alphanumeric characters, control information or any
other binary coded information.
 Register Transfer Language-Bus and Memory Transfer,

Operations: The operations performed on the information stored in the registers.

The operations performed on the data stored in registers are called micro-
operations and it is performed in one clock cycle. The operation may be
arithmetic operation or logical, operation. A statement that requires a sequence
of micro-operations for its implementation is called a macro-operation.

Control function: The control functions that activate operations and central the
sequence of operations. They consists of timing signals that sequence the
operations one at a time the control function is basically a binary variable, when
it is logic 1 it initiates the operation otherwise it inhibits the operation.
 Register Transfer Language-Bus and Memory Transfer,

Definition of Register Transfer Language

A micro operation is an elementary operation performed on the
information stored in one or more registers. The result of the operation may
replace the previous binary information of a register or may by transfer to another
register. The symbolic notation used to describe the micro operation transfer
among registers is called a register transfer language.

Examples of micro operation are lead, store, clear, shift, and count and so on.
Sequences of micro- operations are performed to perform one complete
operation.

For example, to add two numbers following micro operation sequence has to be
performed. 1. Load first number in register 1
2. Load second number in register 2.
3. Perform add micro-operation.
4. Store the result in the destination register
1.Arithmetic Micro-operations
These micro-operations perform some basic arithmetic operations on the numeric data
stored in the registers. These basic operations may be addition, subtraction,
incrementing a number, decrementing a number and arithmetic shift operation. An ‘add’
micro-operation can be specified as: R3 R1+R2
It implies: add the contents of registers R1 and R2 and store the sum in register R3.

2. LOGIC MICRO OPERATION

These operations are performed on the binary data stored in the register. For a logic
micro-operation each bit of a register is treated as a separate variable. For example, if
R1 and R2 are 8 bits registers and
R1 contains 10010011 and
R2 contains 01010101
R1 AND R2 00010001
We can perform arithmetic operations on the numeric data which is stored
inside the registers.
Example :
R3 <- R1 + R2
The value in register R1 is added to the value in the register R2 and then the
sum is transferred into register R3. Similarly, other arithmetic micro-
operations are performed on the registers.
•Addition –
In addition micro-operation, the value in register R1 is added to the value in
the register R2 and then the sum is transferred into register R3.
R3 R1 + R2

Subtraction –
In subtraction micro-operation, the contents of register R2 are subtracted from
contents of the register R1, and then the result is transferred into R3.
R3 R1 - R2
There is another way of doing the subtraction. In this, 2’s
complement of R2 is added to R1, which is equivalent to R1 – R2,
and then the result is transferred into register R3.

•Increment –
In Increment micro-operation, the value inside the R1 register
is increased by 1.
•R3 R1 + 1

Decrement –
In Decrement micro-operation, the value inside the R1 register is
decreased by 1.
R3 R1 - 1
•1’s Complement –
In this micro-operation, the complement of the value inside
the register R1 is taken.

2’s Complement –
In this micro-operation, the complement of the value inside the
register R2 is taken and then 1 is added to the value and then
the final result is transferred into the register R2. This process is
also called Negation. It is equivalent to -R2.
Logic operations
these are binary micro-operations implemented on the bits saved in the registers.
These operations treated each bit independently and create them as binary
variables.
For example, the exclusive-OR micro-operation with the contents of two registers
R1 and R2 is denoted by the statement
P: R1←R1⊕R2

It determines a logic micro-operation to be implemented on the single bits of the

registers supported that the control variable P = 1. Consider that each register has
four bits. Let the content of R1 be 1010 and the content of R2 be 1100.
The exclusive-OR micro-operation stated above represent the following logic
computation −
1010 Content of R1 1100 Content of R2 0110 Content of R1 after P = 1
The content of R1, after the implementation of the micro-operation, is similar to
the bit-by-bit exclusive-OR operation on pairs of bits in R2 and previous values
of R1.
 Bus Transfer
Bus Transfer A digital computer has many registers and it is necessary to
provide data path between them to transfer information from one register
to another.
If separate lines are used between each register, there will be excess
number of wires and controlling of those wires make circuit complex.
Therefore, in multiple-register configuration a common bus system is used
to transfer information between two registers.
A common bus consists of a set of common lines, one for each bit of a
register, through which binary information is transferred one at a time
control signals are used to determine which is the source register and which
is a destination register for that particular transfer.
The common bus scheme can be implemented in two ways
1. Using multiplexers.
2. Using tri-state bus buffers.
common bus system will have n multiplexers and n line common bus where n
represents the number of bits in each register and k number of inputs to each
multiplexer where it represents the total number of registers. Therefore, the size of
each multiplexer will be k x 1. The data transfer from a bus to any destination
register can be accomplished by connecting the bus lines to the inputs. of all
destination registers and activating the load control input of the particular (selected)
destination register.
 Answer in Brief
• Write a note on computer architecture
• What is a system bus? Name the various units
of the system bus.
• What is the significance of main memory in
proper functioning of a processor.
• What is an Instruction cycle?
 Answer in Detail
• What do you understand by Central
Processing Unit? Describe in details various
units of the CPU.
• Write a detailed note on Instruction Cycle
describing the various steps involved.
• Describe in details:
• a. Processor to Memory Communication
• b. Processor to I/O Devices Communication
Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Addressing modes.
The address of the memory can be specified directly within the instruction.
For example, MOV [2000H], R1.

In this instruction the memory address is fix, it can not be dynamically

changed in the program itself.

There are some situations where we need to change the memory address
dynamically.
For example program of array, to add the data and get the total sum of all
array elements. In this we have to repeat the add instruction number of times
equal to the array elements and each time we have to add a number from a
new successive memory location.
The operation to be performed is specified by the operation field of the
instruction. The execution of the operation is performed on some data
stored in computer registers or memory words and the
way the operands are chosen during program.
Selection of operands during program execution depends on the addressing
mode of the instruction. The purpose of using address mode techniques by
the computer is to accommodate one or both of the following provisions:

1. To give programming flexibility to the user by providing such

facilities as pointers to memory, counters for loop control, indexing of
data, and program relocation.
2. To reduce the number of bits in the addressing field of the instruction.
 Usage of addressing modes lends programming versatility to the
user and helps to write program data mode affection in terms of
instruction and implementation. The basic operation cycle of the
computer must be understood to have a thorough knowledge of
addressing modes. The instruction cycle is executive in the control
unit of the computer and is divided into three principal phases:
1. Fetch the instruction from memory.
2. Decode the instruction.
3. Execute the instruction.
The program counter or PC register in the computer hold the instruction in the
program stored memory. Each time when instruction is fetched from memory
the PC is incremented, for it holds the address of the instruction to be executed
next. Decoding involves determination of the operation to be performed, the
addressing mode of the instruction, and the returns of the operands. The
computer then executes the instruction and returns to step 1 to fetch the next
instruction in sequence. Figure show the distinct addressing mode field of in
instruction format.
 The operation code (opcode) specifies the operation to be performed.
The mode field issue to locate the operands needed for the operation.
An address field in an instruction may or may not be present.

• Implied Mode: This mode specify the operands implicitly in the definition of the
instruction. For example, the instruction ‘‘complement accumulator’’ is an implied
mode instruction because the operand in the accumulator register is implied in the
definition of the instruction. In fact, all register references instructions that use an
accumulator are implied mode instructions. Zero-address introductions are implied
mode instructions.
•
• Immediate Mode: The operand is specified in the instruction itself in this mode i.e. the
immediate mode instruction has an operand field rather than an address field. The
actual operand to be used in conjunction with the operation specified in the
instruction is contained in the operand field.
• Example : MOVE A, #20
•
• Register Mode: In this mode the operands are in registers that reside within the CPU.
The register required is chosen from a register field in the instruction. Example:
MOV R1, R2

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology
 Register Indirect Mode: In this mode the instruction specifies a register
in the CPU that contains the address of the operand and not the operand itself.
Usage of register indirect mode instruction necessitates the placing of memory
address of the operand in the processor register with a previous instruction. EA=R
Example: MOVE A, (R0)
Auto increment or Auto decrement Mode: After execution of every
instruction from the data in memory it is necessary to increment or decrement the
register. This is done by using the increment or decrement instruction. Given upon
its sheer necessity some computers use special mode that increments or decrements
the content of the registers automatically.
Example: MOVE (R2), + R0
MOVE (R2), - R0
Direct Address Mode: In this mode the operand resides in memory and its
address is given directly by the address field of the instruction such that the
affective address is equal to the address part of the instruction. Example: MOVE A,
2000

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology
 Mode Assembly Convention Register Transfer

Direct Address LD ADR AC<-M[ADR]

Indirect Address LD @ADR AC<-M[M[ADR]]

Relative Address LD $ADR AC<-M[PC+ADR]

Immediate Operand LD #NBR AC<-NBR

Index Addressing LD ADR(X) AC<-M[ADR+XR]

Register LD R1 AC<-R1

Register Indirect LD(R1) AC<-M[R1]

Auto increment LD (R1) AC<-M[R1],R1<-R1+1

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology
 Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
 Faculty Name : Prof. Vivek Rawat,
Dept of CSIT, Sagar Institute of Research & Technology
Thanking You…

Faculty Name : Prof. Vivek Rawat,

Dept of CSIT, Sagar Institute of Research & Technology