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    Mod 12

    Uploaded by

    Usha Gonal
    Mod12

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    © All Rights Reserved
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    Mod 12

    Uploaded by

    Usha Gonal
    4 views9 pages
    Mod12

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    mod12

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    Mod12

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    © All Rights Reserved
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    Download as pptx, pdf, or txt
    4 views9 pages

    Mod 12

    Uploaded by

    Usha Gonal
    Mod12

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    of 9

    Memory Locations, Addresses,

    and Operations
    Memory Location, Addresses, and
    Operation
    n bits
    first word
     Memory consists of many
    second word
    millions of storage cells,
    each of which can store 1
    bit. •
    •
     Data is usually accessed •
    in n-bit groups called as i th word
    word. n is called word
    length.
    •
    •
    •
    last word

    Figure 2.5. Memory words.


    Memory Location, Addresses, and
    Operation
     32-bit word length example
    32 bits

    b 31 b 30 b1 b0

    •
    •
    •
    Sign bit: b 31= 0 for positive numbers
    b 31= 1 for negative numbers

    (a) A signed integer

    8 bits 8 bits 8 bits 8 bits

    ASCII ASCII ASCII ASCII


    character character character character

    (b) Four characters


    Memory Location, Addresses, and
    Operation
     To retrieve information from memory, either for one word or one byte
    (8-bit), addresses for each location are needed.
     A k-bit address memory has 2k memory locations, namely 0 – 2k-1,
    called memory space.
     24-bit memory: 224 = 16,777,216 = 16M (1M=220)
     32-bit memory: 232 = 4G (1G=230)
     1K(kilo)=210
     1T(tera)=240
    Memory Location, Addresses, and
    Operation
    BYTE ADDRESSABILITY
     It is impractical to assign distinct addresses to individual bit

    locations in the memory.


     The most practical assignment is to have successive

    addresses refer to successive byte locations in the memory –


    i.e. byte-addressable memory.
     Byte locations have addresses 0, 1, 2, … If word length is 32

    bits, they successive words are located at addresses 0, 4, 8,


    …
    Big-Endian and Little-Endian
    Assignments
    Big-Endian: lower byte addresses are used for the most significant bytes of the word
    Little-Endian: opposite ordering. lower byte addresses are used for the less significant
    bytes of the word
    Word
    address Byte address Byte address

    0 0 1 2 3 0 3 2 1 0

    4 4 5 6 7 4 7 6 5 4

    • •
    • •
    • •

    k k k k k k k k k k
    2 -4 2 -4 2 -3 2- 2 2 - 1 2 - 4 2- 1 2 - 2 2 -3 2 -4

    (a) Big-endian assignment (b) Little-endian assignment

    Figure 2.7. Byte and word addressing.


    EX: If num=12345678

    Big Endian Little Endian


    0
    12 0 78
    1 34 56
    1
    2 56 34
    2
    3 78 12
    3
    Memory Location, Addresses, and
    Operation
     Address ordering of bytes
     Word alignment
     Words are said to be aligned in memory if they begin at a byte addr.
    that is a multiple of the num of bytes in a word.
     16-bit word: word addresses: 0, 2, 4,….
     32-bit word: word addresses: 0, 4, 8,….
     64-bit word: word addresses: 0, 8,16,….
     Access numbers, characters, and character strings
    Memory Operation
     Load (or Read or Fetch)
     Copy the content. The memory content doesn’t change.
     Address – Load
     Registers can be used
     Store (or Write)
     Overwrite the content in memory
     Address and Data – Store
     Registers can be used

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