Basic Gates
Basic Gates
Logic Levels
Basic Gates : AND, OR and NOT
Universal Gates
• NAND ( AND followed by NOT)
NOR gate
• NOR ( OR followed by NOT)
Basic Theorems and Properties
of
Boolean Algebra
Write the Truth table and timing
diagram
a b c f g
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Write the Truth table and timing
diagram
Write the timing diagram
0 1 0 1 0 1 0 1
0 0 1 1 0 0 1 1
0 0 0 0 1 1 1 1
1 1 1 1 1 1 1
Write the timing diagram
Postulates and Theorems of
Boolean Algebra
Draw the logic diagram
Simplify the following Boolean expressions to a minimum number of
literals:
• xy + xy'
• (x + y) (x + y')
• xyz + x'y + xyz'
• (A + B) ' (A' + B') '
• (a+ b + c')(a' b' +c)
• a'bc + abc' + abc + a'bc'
Simply the boolean expression using
K map
• Simply the boolean expression using K map
• F(x,y,z) = Σ m(3,4,6,7)
• F(x,y,z) = Σ m(0,2,4,5,6)
• F(x,y,z) = Σ m(1,2,3,5,7)
• F(w,x,y,z) = Σ m(0,1,2,4,5,6,8,9,12,13,14)
Partial K - map
Prime implicants : CD, B’C, AD and AB’
F = ( (AB)' (CD)' )’ = AB + CD
Implement f(x, y, z) = m(1,2,3,4,5,7) using
NANG gates only
F(x,y,z)= m(1,2,3,4,5,7)
Implement f(x, y, z) = m(1,2,3,4,5,7) using
NANG gates only
F(x,y,z)= m(1,2,3,4,5,7)
Truth Table
S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3
4 to 1 Mux
4 to 1 multiplexer 8 to 1 multiplexer
Implement using Mux
F (A, B, C) = (1,2,4,7)
Implement using Mux
F (A, B, C) = (1,2,4,7)
S2 S1 S0 F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
Implement using Mux
F (A, B, C, D) = (1, 3, 4, 11, 12, 13, 14, 15)
Using two 8 to 1 mux and basic gates
Implement using Mux
F (A, B, C, D) = (1, 3, 4, 11, 12, 13, 14, 15)
Using two 8 to 1 mux and basic gates
F (A, B, C, D) = (1, 3, 4, 11, 12, 13, 14, 15)
using single 4 to 1 mux
F (A, B, C, D) = (1, 3, 4, 11, 12, 13, 14, 15)
using single 4 to 1 mux
Decoder