Quick Review

• Kirchhoff’s Current Law (KCL)

i in  iout

• Kirchhoff’s Voltage Law (KVL)

Procedure: v n 0
1. Choose either a clockwise or counterclockwise trip around a loop.
2. Assign +ve & -ve signs to the elements of the circuit
3. Apply KVL & write voltage equation for each loop
4. The sign on each voltage is the polarity of the terminal encountered first as we travel around the loop.
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 Quick Review
• Branch-Current Analysis

• Steps required for Branch-Current

Analysis: -
1. Assign a distinct current of arbitrary direction
to each branch of the circuit.
2. Add the polarities for each voltage drop
across resistor.
3. Apply KVL for each mesh.
4. Apply KCL to a node that includes all the
branch currents.
5. Solve the equations for branch currents.
n branches, n equations
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 Quick Review
• Mesh Analysis
– defines a unique array of currents (Mesh
or Loop current) to the network.

• Steps required for Mesh Analysis: -

1. Assign current in clockwise direction to
each closed loop of network.
2. Insert polarities for each resistor.
3. Apply KVL to each closed loop.
4. Solve the resulting equations.
n meshes, n equations

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 Quick Review
• Nodal Analysis
– provides nodal voltages by using i4
KCL.
i5 i6
• Steps required for Nodal
i3
Analysis:
1. Determine the no. of nodes i1 i2
(junction of 2 or more
branches).
2. Select a reference node
(Ground), and label all other
nodes.
3. Apply KCL at each node (except n nodes, (n-1) equations
the reference node).
4. Solve the resulting equations.
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 Quick Review
• Mesh with Current Sources

5
 Quick Review
• Nodal with Voltage Sources

6
Q1. Determine the voltage vx and power absorbed by 12  resistor for the circuit given in
Figure Q1.

I4
I2
I1
I3

3 6 2 8 12 4.8
Figure Q 1
(4  2) (1.2  4.8) 3

I1 I2 By using current divider rule,

2
I2  6 2 A Vx I 2 1 2 1 2V
2  (1  3)
 A A

I4 + +
I2 VAB VAB
I1
I3 _
_

B B

By using current divider rule,

42
I4  2 1A
(4  2)  (1.2  4.8)

 P12 
2
VAB

I 4 R4.8  14.8
2

2
1.92W
R12 R12 12
 Q2. For the circuit shown in Figure Q2, determine:
(a) current I. Is
(b) voltage Va, Vb and Vab.
(a) I3
E E
Is  
RT R1  R2 ( R3  R4  R5 )
24
Is  4.615mA
4k  2k (1k  0.5k  1.5k )
Figure Q2

By using current divider rule,

R3  R4  R5
I  I s
R2  ( R3  R4  R5 )
1k  0.5k  1.5k
I 4.615mA 2.769mA
2k  (1k  0.5k  1.5k )
 Q2. For the circuit shown in Figure Q2, determine:
(a) current I. Is
(b) voltage Va, Vb and Vab.
(b) I3
By using KCL,
I 3 I s  I 4.615mA  2.769mA 1.846mA

VR 3 I 3 R3 0  Vb
Figure Q2
Vb  I 3 R3  1.846mA 1k  1.846V

VR 2  I R2 0  Va
Va  I R2  2.769mA 2k  5.538V

Vab Va  Vb  5.538  ( 1.846)  3.692V

Q3. Find the current gain io/is in circuit shown in Figure Q3.
A B
Solve by using nodal analysis I2
I1
At node A,
is  I 1  I 2
VA  0 VA  VB Ground
is   At node B,
30 20 Figure Q3
VB io (10  40)
 VA vo , VB  5vo
 VB  5vo
vo  0 vo  ( 5vo ) 1
 is     5vo 50io  vo
30 20 io
1   10  0.3
1  io  vo   ( 2) is 1
 is  vo   (1) 10 vo
3 3
 Q4. Use the suitable circuit analysis to determine io and vo in circuit given in Figure Q4.

Solve by using mesh analysis + 

Remove the current source (open) i3
and form the supermesh network.
 +  +
At supermesh,
+  + 
V2   V1  V2   16 0
2i1  1(i1  i3 )  2(i2  i3 )  16 0 
i1 i2
3i1  2i2  3i3  16   (1)
At mesh 3,
V3  V2   V1 0 

3i3  2(i3  i2 )  1(i3  i1 ) 0

supermesh
 i1  2i2  6i3 0   (2) Figure Q4
At node A,  io  i1
i2 i1  2io  i2 i1  2( i1 ) + 
 i1  i2 0   (3)
i3

3i1  2i2  3i3  16   (1)  +  +

 i1  2i2  6i3 0   ( 2) +  + 
i1  i2 0   (3)

i1 i2
By solving the 3 linear equations,
32 32 16
i1  A, i2  A , i3  A 
3 3 9
32 A
 io  i1  A i1 i2
3 Figure Q4
 + 
V2  vo  16 2(i2  i3 ) i3
 v0 2(i2  i3 )  16  +  + 16 V
 32 16 
 v0 2    16 33.78V +  + (i2  i3)
 3 9

i1 i2

Figure Q4
Q5. Find the voltages across each resistor in the Figure Q5. supernode

Solve by using nodal analysis

Remove the voltage source (short) 1 1 2 2
and form the supernode network.

Node 1 and 2 has been shorted.

3 3 3 3
Figure Q5
Q5. Find the voltages across each resistor in the Figure Q5. supernode
1 V1 1 2 V2 2
Solve by using nodal analysis
Remove the voltage source (short)
and form the supernode network. i1 i2

Node 1 and 2 has been shorted.

At supernode 1 - 2, 3 3 3 3
2  i1  i2 1 Figure Q5

V1 V2
2   1
4 12
3V1  V2  12   (1)
From the circuit,
V2  V1 20   (2)

3V1  V2  12   (1) 1 V1 1 2 V2 2
V2  V1 20   (2)

By solving the 2 linear equation, i1 i2

V1  8V , V2 12V

3 3 3 3
V4  V1  0  8V
Figure Q5
V12  V2  0 12V
V10  V2  V1 20V
Q6. Determine the voltages across each resistive element in the Figure Q6.

Solve by using nodal analysis i4

By solving the 2 linear equation,

V1  2.556V , V2 4.03V i5
1 V1 1 2 V2 2

VR1 V1  0  2.556V i3 i6 i7

VR 2 V2  0 4.03V
VR 3 V1  V2  6.586V
VR 4 V1  V2  6.586V 3 3 3 3 3
At node 1, At node 2, Figure Q6
I1  i3  i4  i5 0 i6  i7 I 2  i5  i4
V1  0 V1  V2 V1  V2 V2  0 V2  0 V1  V2 V1  V2
6   0   (1)  7     (2)
5 2 3 4 8 3 2