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Memory Organization

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22 views24 pages

Memory Organization

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R
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Computer Organization

and Architecture (CS1306)

Introduction to Memory
System Architecture
What is memory?
 Computer memory is used to store information
which includes both program and data.
 The memory unit is essential component in any
digital computer since it is needed for storing
program and data.
 Not all accumulated information is needed by
the CPU at the same time
 Therefore it is economical to use low cost
storage devices to serve as a backup for storing
the information that is not currently used by
CPU.
Memory Characteristics

 Capacity- It characterizes the size of


memory.

 Speed- A useful parameter. Measured in


terms of access time t-a and cycle time t-c.

 Bandwidth- the maximum amount of


information that can be transferred to and
from the memory per unit time.
Memory Hierarchy

The memory hierarchy is given by


CPU Register
Cache Memory
Main Memory
Magnetic Disk Secondary Storage
or Auxiliary Memory
Removable media (Magnetic tape)
The memory hierarchy system consists of all storage
devices employed in a computer system from slow
speed with high capacity auxiliary memory to a
relatively faster main memory, to an even smaller and
faster cache memory.
Memory Hierarchy System
or Memory Pyramid
Memory Hierarchy Contd.

Register
 This is a part of Central Processor Unit
 Reside inside the CPU.
 The information from main memory is brought to CPU and keep the
information in register.
 Due to space and cost constraints, limited number of registers in a
CPU.
 Basically faster devices.
Main Memory
 The main memory occupies the central position by being able to
communicate directly with the CPU and with auxiliary memory
devices through an I/O processor
 CPU can work with the information available in main memory only.
Memory Hierarchy

Auxiliary Main
I/O Processor
Memory Memory

Cache
Memory

CPU
Memory Hierarchy
 CPU logic is usually faster than main
memory access time, with the result that
processing speed is primarily limited by
the speed of main memory.
 The cache is used for storing segments
of programs currently being executed in
the CPU and temporary data frequently
needed for present calculations.
 The typical access time ratio between
cache and main memory is about 1 to 7.
 Auxiliary memory access is usually 1000
times that of main memory.
Type of memory access

Sequential access
 Data access is done serially one by one.
 Data access is very slow, because the data
access is done sequentially
 Example: Magnetic Tape, Cartridge Back
Up.
Direct Access Method
 Data obtained from a storage device by
going directly to where it is physically
located rather than by having to sequentially
look for the data at one physical location
after another.
 Data-access relatively
quickly, compared Sequential Access.
 Example: Hard Disk, Floppy Disk (floppy).
Type of memory access
Random Access:
 Address Decoder will generate the
address data to be accessed.
 Fast Data Access, faster than
the Direct Access.
 Example: RAM.

Associative Access Method


 Data is accessed by its content not by
the address location
 Data-Access is very fast.
 Example: Content
Addressable Memory (CAM).
Memory classification

Memory

Secondar
Primary
y
Flash
Cach Magneti Magneti
Main Memor
e c Tape c disk
y
RAM ROM Optical
disk

EEPRO
SRAM DRAM PROM EPROM
M
Main Memory
Most of the main memory in general purpose
computer is made up of RAM integrated circuit
chips but a portion of the memory may be
constructed with ROM chips.
RAM(Random Access Memory)
i. Random Access Memories are volatile in
nature. As soon as the computer is switched
off , the contents of memory are also lost.
ii. Integrated RAM’s available in two categories
SRAM and DRAM
ROM (Read Only Memory)
iii. Read only memories are non volatile in
nature.
iv. The storage is permanent, but it is read only
memory. We can not store new information
in ROM.
RAM and ROM chip

9- bit address bus AD0-


AD8

Read
512 X 8 8 bit data
ROM bus

Chip
select lines

RAM CHIP ROM


CHIP
Static RAM (SRAM)

 Static memories(SRAM) are memories


that consist of circuits capable of
retaining their state as long as power
is on.
 this type of memories is called
volatile memories.
 A latch is formed by two inverters
connected as shown in the figure. Two
transistors T1 and T2 are used for
connecting the latch with two bit
lines.
 The purpose of these transistors is to
act as switches that can be opened or
closed under the control of the word
line, which is controlled by the
address decoder.
 When the word line is at 0-level, the
transistors are turned off and the
latch remains its information.
 For example, the cell is at state 1 if
the logic value at point A is 1 and at
point B is 0. This state is retained as
long as the word line is not activated.
Dynamic RAM (DRAM)
 Relatively less expensive RAM
is DRAM, due to the use of one
transistor and one capacitor in
each cell, as shown in the
below figure. where C is the
capacitor and T is the
transistor.
 Information is stored in a DRAM
cell in the form of a charge on
a capacitor and this charge
needs to be periodically
recharged.
 For storing information,
transistor T is turned on and an
appropriate voltage is applied
to the bit line.
 This causes a known amount of
charge to be stored in the
capacitor. After the transistor is
turned off, due to the property
SRAM vs DRAM
Read Only Memory(ROM)

 ROM stands for Read Only Memory.


 The memory from which we can only read but
cannot write on it.
 This type of memory is non-volatile. The
information is stored permanently in such
memories during manufacture.
 A ROM stores such instructions that are required
to start a computer. This operation is referred to
as bootstrap.
 ROM chips are not only used in the computer
but also in other electronic items like washing
machine and microwave oven.
Type of ROM’s
PROM (Programmable Read Only Memory)
 PROM is read-only memory that can be modified only once by a user.
 Inside the PROM chip, there are small fuses which are burnt open during
programming.
 It can be programmed only once and is not erasable.

EPROM (Erasable and Programmable Read Only Memory)


 EPROM can be erased by exposing it to ultra-violet light for a duration of up
to 40 minutes.
 During programming, an electrical charge is trapped in an insulated gate
region. The charge is retained for more than 10 years because the charge
has no leakage path.
 For erasing this charge, ultra-violet light is passed through a quartz crystal
window (lid). This exposure to ultra-violet light dissipates the charge.
EEPROM (Electrically Erasable and Programmable Read Only Memory)
 EEPROM is programmed and erased electrically.
 It can be erased and reprogrammed about ten thousand times. Both
erasing and programming take about 4 to 10 ms (millisecond).
 In EEPROM, any location can be selectively erased and programmed.
 EEPROMs can be erased one byte at a time, rather than erasing the entire
chip. Hence, the process of reprogramming is flexible but slow.
Construction of Large
memory using small
chips
 Large memory can be constructed expanding
small chips either horizontally or vertically.

 Horizontal expansion word size is increased


and in Vertical expansion number of locations
increased.

 Example: Two RAM chips of size 512 X 4 can


be horizontally placed to obtain a large
memory of size 512 X 8 and the same number
of 512 X 4 RAM chips connected vertically to
construct a large memory of size 1K X 4.
Memory Address Map

 Memory address map is a pictorial


representation of assigned address space for
each chip in the system.
 A RAM chip is better suited for communication
with the CPU if it has one or more control
inputs that select the chip when needed.
 To demonstrate with an example, assume that
a computer system needs 512 bytes of RAM
and 512 bytes of ROM.
 We have RAM chip each of size 128 X 8 and
ROM chip of 512 X 8
Memory connection to CPU
Memory Address Map

Compo Hexadec 1 9 8 7 6 5 4 3 2 1
nent imal 0
Address
RAM1 0000- 0 0 0 * * * * * * *
007F
RAM2 0080- 0 0 1 * * * * * * *
00FF
RAM3 0100- 0 1 0 * * * * * * *
017F
RAM4 0180- 0 1 1 * * * * * * *
01FF
ROM 0200- 1 * * * * * * * * *
03FF
Memory Address Map

 The hexadecimal addresses assigns a


range of hexadecimal addresses to each
chip.

 Line 8 and 9 represent four distinct


binary combinations to specify which
RAM will be selected.

 When line 10 is 0, CPU selects RAM, and


when it is 1, it selects the ROM.
THANK YOU

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