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Photonics in Communication System

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22 views15 pages

Photonics in Communication System

Uploaded by

donthishirisha246
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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COLLEGE OF ENGINEERING AND TECHNOLGY FOR STANLEY

WOMEN(Autonomous)
Abids, Hyderabad
Department of Electronics and Communication Engineering

Photonics in Communication System


Technical Seminar
2023-2024

Presented by
Internal Guide NAME : G. Angel
NAME : Dr.Kezia Joseph
professor, B.Tech, M.Tech. Ph. D.
Roll No :16062173501
Contents
Abstract
• .Photonics plays a pivotal role in modern communication systems, leveraging
the unique properties of light to enhance data transmission and processing
capabilities.
• .This paper explores the fundamental principles of photonic technologies,
including fiber optics, optical modulation, and wavelength-division
multiplexing (WDM).
• .We examine the advantages of photonic systems, such as high bandwidth, low
signal attenuation, and immunity to electromagnetic interference, which
collectively enable faster and more efficient communication networks.
• .Additionally, we discuss emerging trends, including integrated photonics and
quantum communication, highlighting their potential to revolutionize data
transfer and security
• .The integration of photonics into existing communication infrastructure
presents both challenges and opportunities for the future of global connectivity.
Introduction
Photonics is probably the outstanding candidate for the
principal enablingtechnology of the twenty-first
century. The term emerged around half a century ago
and is now slowly creeping into everyday vocabulary
just as ‘electronics’ did in the twentieth century. The
aim in this short book is to introduce the principal
concepts and ideas which underpin photonics and to
explore its current and evolving technological
significance.
Literature review
SNO METHOD Name of the author Title of the paper

1 A technique for D.Vasudevan IEEE


modular design international
of self-checking symposium on
carry –select defect and fault
adder tolerance in
VLSI Systems
2 Error tolerance P.Bose IEEE
in server class transactions on
processors computer-aided
design of
integrated
circuits and
systems
Block diagram

4 bit Carry select adder


Advantages/Disadvantages

• Fault tolerant adder • Less error tolerance adder


• High reliable • Less reliable
• Less area • High area
Flowchart
Working Model
• VLSI designs are easily face the errors in some cases, we can call them as
faults.
• an erroneous output caused by multiple faults is not guaranteed to be detected.
• If a second fault has occurred before the first fault is found through detection
of an erroneous output, the concurrent error delectability can be lost.
• For reliable adders, it is crucial that the first fault is observed before a second
fault occurs.
Results and Discussion

• We evaluated error detectability, test coverage of the proposed


adder, and its circuit area.
• We prepared the netlist of the proposed adder by instancing
each gate as the corre-sponding standard cell.
• The netlist prepared for the evaluations was a 32-bit design
of the proposed adder composed of four 8-bit blocks.
• We examined concurrent error detectability of the pro-posed
adder including the error detection unit shown fig.
Conclusion
Referencesss
[1] B. Kumar and P. Lala, “On-line detection of faults in
carry-select adders,” Proc. nternational Test Conference (ITC
’03), vol. 1, pp. 912– 918, Sep. 2003.
[2] D. Vasudevan and P. Lala, “A technique for modular
design of self-checking carry-select adder,” Proc. 20th IEEE
International Symposium on Defect and Fault Tolerance in
VLSI Systems (DFT ’05), pp. 325–333, Oct. 2005.
Acknowledgement

This is an acknowledgement of the intensive drive and competence of


everyone who has contributed to the success of our internship.
We are extremely grateful to our respected Principal
Dr.SatyaPrasadLanka, for fostering an excellent academic climate in
our institution and we also express our sincere gratitude to our
respected Head of the Department Dr. Kedar Nath Sahu, for his
encouragement, able guidance and effort in bringing out this
Internship.
We are deeply indebted to our internal guide Dr.K.Padmavathi for
her guidance, encouragement, co-operation and kindness during the
entire duration of the course and academics.
We would like to extend our thanks to Mr./Ms. G.Getha from SINANO
TECHVIZ PVT.LTD for his/her training and guidance during the Internship.
K.Indu
(160621735025)
ss

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