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Lecture 8

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0% found this document useful (0 votes)
11 views19 pages

Lecture 8

Uploaded by

aakif
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Lecture 8 Agenda:

 Combinational Circuits

 Design Procedure

 Half, Full and Parallel Adder

 Half and Full Subtractor


Introduction
• Logic circuits for digital systems may be….
Combinational
circuits Sequential circuits
 Consists of logic gates + storage
elements. Output depends on
 Consists of logic gates whose inputs and the state of the
output depends on only the storage elements or previous
present input. outputs.
 Example: Counter
 4+1 5
 Example: Adder
 3+14
1

+________

1
Sequential circuits are the building blocks of digital
systems and Logic
Combinational will be discussed in next chapter.
11/12/2024 2
Design Procedure
 Starts from the specification of the problem, which
leads to the truth table. Using the output values of
truth table, the logic equation and simplified using K
maps, or Algebraic manipulation. The equation of
the output functions, the corresponding circuit is
found. The process is shown in Figure:
Specification
Goal Functionality

Formulation
Truth Table Boolean Equation

Optimization
K-Map Boolean Algebra

Combinational Logic 11/12/2024 3


Logic Diagram
Verification Specification
Example 1
 Design a circuit that has a 3-bit input and
a single output (F) specified as follows:
• F = 0, when the input is less than (5)
• F = 1, otherwise
Solution:
 Step 1 (Specification):
• Label the inputs (3 bits) as X, Y, Z
• X is the most significant bit, Z is the least significant bit
• The output (1 bit) is F:
• F = 1  (101)2, (110)2, (111)2
• F = 0  other inputs

Combinational Logic 11/12/2024 4


Example 1 (cont.)

Step 2 Step 3
(Formulation) (Optimization)
YZ
Obtain
X Y Truth
Z table
F X 00 01 11
0 100 0 0 0 F = XZ +
0 0 0 0 0 1 XY
1
0 0 1 0 1 1

0 1 0 0
Step 4 (Logic
Diagram)
0 1 1 0
1 0 0 0
X
1 0 1 1 Z
1 1 0 1 F
X
1 1 1 1 Y

Combinational Logic 11/12/2024 5


Design Example 2:
BCD to Excess-3 Converter
Step 1 (Specification) Step 2

(Formulation)
4-bit BCD input (A,B,C,D) Obtain Truth table Excess 3 Output
BCD Input
 4-bit E-3 output (W,X,Y,Z)
Decimal A B C D W X Y Z
0 0 0 0 0 0 0 1 1
1 0 0 0 1 0 1 0 0
2 0 0 1 0 0 1 0 1
3 0 0 1 1 0 1 1 0
4 0 1 0 0 0 1 1 1
5 0 1 0 1 1 0 0 0
6 0 1 1 0 1 0 0 1
7 0 1 1 1 1 0 1 0
8 1 0 0 0 1 0 1 1
9 1 0 0 1 1 1 0 0
10-15 All other inputs X X X X
Combinational Logic 11/12/2024 6
Example 2 (cont.)
Step 3 Step 4 (Logic
(Optimization) Diagram)

Combinational Logic 11/12/2024 7


Exercise Problems
Problem 4.4
Design a combinational circuit with three inputs and one output.
(a) The output is 1 when the binary value of the inputs is less than 3. The output is 0
otherwise.
(b) The output is 1 when the binary value of the inputs is an even number.

Problem 4.5
Design a combinational circuit with three inputs, x , y , and z , and three outputs, A,
B , and C.
When the binary input is 0, 1, 2, or 3, the binary output is one greater than the input.
When the binary input is 4, 5, 6, or 7, the binary output is two less than the input.

Problem 4.6
A majority circuit is a combinational circuit whose output is equal to 1 if the input
variables
have more 1’s than 0’s. The output is 0 otherwise. Design a 3-input majority circuit by
finding the circuit’s truth table, Boolean equation, and a logic diagram.
Exercise Problems
Problem 4.7
Design a combinational circuit that converts a four-bit Gray code to a four bit
binary
number. Implement the circuit with exclusive-OR gates.
BINARY ADDER–SUBTRACTOR
0+0=0
0+1=1
1+0=1
1 + 1 = 10
 A combinational circuit that performs the addition of two bits is called
a half adder .
 One that performs the addition of three bits is a full adder .
 half adders + half adders = full adder.

Combinational Logic 11/12/2024 10


Half Adder
Step 1 Step 2
(Specification) (Formulation)

Step 3 Step 4 (Logic


(Optimization) Diagram)

Combinational Logic 11/12/2024 11


Full Adder

Step 1 Step 2
(Specification) (Formulation)

Combinational Logic 11/12/2024 12


Full Adder
Step 3 Step 4 (Logic
(Optimization) Diagram)

Combinational Logic 11/12/2024 13


Full Adder = Two Half Adder

Combinational Logic 11/12/2024 14


Half Sub tractor
Step 1 Step 2
(Specification) (Formulation)

Step 3
(Optimization) Step 4 (Logic
Diagram)

Combinational Logic 11/12/2024 15


Full Sub tractor

Step 1 Step 2
(Specification) (Formulation)

Combinational Logic X-Y-Z


11/12/2024 16
Full Sub tractor
Step 3
(Optimization) Step 4 (Logic
Diagram)

Combinational Logic 11/12/2024 17


Full Sub tractor = Two Half Sub
tractor

Implementation of full-subtractor with two half subtractor and an OR gate

Combinational Logic 11/12/2024 18


Exercise Problems
Problem 4.11
Using four half-adders,
(a) Design a full adder circuit incrementer. (A circuit that adds one to a four bit
binary number.)
(b) Design a four-bit combinational decrementer (a circuit that subtracts 1 from a four bit
binary number).

Problem 4.21
Design a combinational circuit that compares two 4-bit numbers to check if they are equal. The
circuit output is equal to 1 if the two numbers are equal and 0 otherwise.

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