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Finfet Technology

ppt for finfet tech

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64 views11 pages

Finfet Technology

ppt for finfet tech

Uploaded by

ayush
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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FinFET Technology

https://www.design-reuse.com /articles/41330/cmos-
soi-finfet-technology-review-paper.html
Introduction
• Former TSMC CTO and Berkeley professor
Chenming Hu and his team presented the
concept of FinFET in 1999 and UTB-SOI (FD SOI)
in 2000. The main principle behind both the
structures is a thin body, so the gate capacitance
is closer to whole channel. The body is very thin,
around 10nm or less. So, there is no leakage path
which is far from the gate. The gate can
effectively control the leakage.
Double Gate Structure
• The basic structure of FinFET which they
proposed would be a channel controlled by
more than one side of channel.
Modern FinFET-3D structures
• Tri-gate transistor.
• FinFET can be implemented either on bulk
silicon or SOI wafer.
• This FinFET structure consists of thin (vertical)
fin of silicon body on a substrate. The gate is
wrapped around the channel providing excellent
control from three sides of the channel.
• This structure is called the FinFET because its Si
body resembles the back fin of a fish.
• In bulk-MOS (planner MOS), the channel is
horizontal. While in FinFET channel, it is
vertical.
• So for FinFET, the height of the channel (Fin)
determines the width of the device.
• The perfect width of the channel is given by
Equation.
Width of Channel = 2 X Fin Height + Fin Width
• The drive current of the FinFET can be
increased by increasing the width of the
channel i.e. by increasing the height of the Fin.
• We can also increase the device drive current
by constructing parallel multiple fins
connected together as shown in the Figure.
• It implies that for a FinFET, the arbitrary
channel width is not possible, since it is always
a multiple of fin height. So, effective width of
the device becomes quantized.
• While in planner devices, there is the freedom
to choose the device’s drive strength by
varying channel width.
• In conventional MOS, a doping is inserted into the
channel, reducing the various SCEs and ensuring high
Vth.
• While in FinFET, the gate structure is wrapped around
the channel and the body is thin, providing better
SCEs, so channel doping becomes optional. It implies
that FinFET suffers less from dopant-induced
variations.
• Low channel doping also ensures better mobility of
the carriers inside the channel. Hence, higher
performance.
• Both FinFET and SOI technologies have introduced
Body Thickness as a new scaling parameter.
Advantage of FinFET
• FinFET technology provides numerous
advantages over bulk CMOS, such as
• Higher drive current for a given transistor
footprint, hence higher speed, lower leakage,
hence lower power consumption.
• No random dopant fluctuation, hence better
mobility and scaling of the transistor beyond
28nm.

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