NUMBER

SYSTEM
 What is Number System?

Number System

Number systems are the technique to represent

numbers in the computer system architecture,
every value that you are saving or getting into/from
computer memory has a defined number system.
• Computer architecture supports following
number systems.
Binary number system
Octal number system
Decimal number system
Hexadecimal (hex) number system

2
Decimal Number
System
1 3
 Decimal Number System
◉ Decimal number system is a base 10 number system having 10
digits from 0 to 9.
◉ This means that any numerical quantity can be represented using
these 10 digits.
◉ Decimal number system is also a positional value system.
◉ This means that the value of digits will depend on its position
◉ Say we have three numbers – 734, 971 and 207. The value of 7 in all three numbers
is different−
◉ In 734, value of 7 is 7 hundreds or 700 or 7 × 100 or 7 × 10 2
◉ In 971, value of 7 is 7 tens or 70 or 7 × 10 or 7 × 10 1
◉ In 207, value 0f 7 is 7 units or 7 or 7 × 1 or 7 × 10 0

4
Binary Number
System
2 5
 Binary Number System
◉ The easiest way to vary instructions
through electric signals is two-state
system – on and off.
◉ On is represented as 1 and off as 0, In any binary number, the rightmost digit is called least
significant bit (LSB) and leftmost digit is called most
though 0 is not actually no signal but significant bit (MSB).
signal at a lower voltage.
◉ The number system having just these
two digits – 0 and 1 – is called binary
number system.

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Octal Number System
3 7
 Octal Number System

◉ Octal number system has

eight digits – 0, 1, 2, 3, 4, 5, 6
and 7.
◉ Octal number system is also Decimal equivalent of any octal number is sum of product of
a positional value system each digit with its positional value.
with where each digit has 7268 = 7×82 + 2×81 + 6×80
its value expressed in = 448 + 16 + 6
powers of 8 = 47010

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 Hexa Decimal
Number System
4 9
 Hexadecimal Number System

◉ Hexa Decimal number

system has 16 symbols – 0
to 9 and A to F where A is
equal to 10, B is equal to 11 Decimal equivalent of any hexadecimal number is sum
and so on till F. of product of each digit with its positional value.
◉ Hexadecimal number
27FB16 = 2×163 + 7×162 + 15×161 + 10×160
system is also a positional
= 8192 + 1792 + 240 +10
value system with where
= 1023410
each digit has its value
expressed in powers of 16, Here A is 10, B is 11, C is 12, D is 13, E is 14 and F
is 15.

10
 Binary to Decimal

Binary to The binary number

decimal conversion is system is used in
done to convert a computers and
number given in the electronic systems to
binary number system to represent data and it
its equivalent value in consists of only two
the decimal number The binary number digits which are 0 and 1.
system. system has a base of
2 because it has only
two digits to
represent any
number.

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 Binary to Decimal

◉ In any binary number, the rightmost digit is called the 'Least

Significant Bit' (LSB) and the left-most digit is called the 'Most
Significant Bit' (MSB).
◉ For a binary number with 'n' digits, the least significant bit has a
weight of 20 and the most significant bit has a weight of 2n-1.
◉ Step 1: List out the powers of 2 for all the digits starting from the
rightmost position.

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 Binary to Decimal

◉ Step 2: Now multiply each digit in the binary number starting from
the right with its respective weight based on its position and
evaluate the product.

◉ Step 3: Now, express the binary number as a decimal number:

1011012 = 4510

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 Exercises

◉ Convert 11102, from binary to decimal using the binary to

decimal formula.
◉ Convert 11112, from binary to decimal using the binary to
decimal formula.
◉ Convert 10102, from binary to decimal using the binary to
decimal formula.

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 Decimal to Binary
Decimal to Then, the remainders are
binary conversion is noted down till we get 0
done through various as the final quotient.
methods. One of the After this step, these
methods to convert remainders are written
decimal to binary is by in reverse order to get
dividing the given the binary value of the
decimal number given decimal number.
recursively by 2.

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 Decimal to binary conversion

◉ To convert numbers from

decimal to binary, the given
decimal number is divided
repeatedly by 2 and the
remainders are noted down
till we get 0 as the final
quotient.

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 Exercises

◉ 25
◉ 39
◉ 72
◉ 55

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 Decimal to Octal

◉ In the number system, each of the types has its own base number
i.e. octal number has a base number of 8 and the decimal
number has a base number of 10.
◉ To convert decimal to octal, we need to divide the decimal
number by the octal base number 8 and write the acquired
remainder in reverse to derive at the equivalent octal number.

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 Convert Decimal to Octal

◉ In this method, the decimal number is divided by 8, each time

a reminder is obtained from the previous digit.
◉ The first remainder obtained is the least significant digit(LSD)
and the last remainder is the most significant digit(MSD).
◉ Once the quotient is less than 8, we obtain the octal number by
writing the remainder in reverse order.

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 Example
◉ Convert the decimal number (85)10 to an octal number.
◉ Step 1: Check if the decimal number is less than 8. If yes, the
octal number is the same. If no, then proceed forward. In this
case, 85 is more than 8 so let's go to step 2.
◉ Step 2: Divide 85 by 8 (octal base number).
◉ Note down the quotient and the remainder in the quotient-
remainder form. Repeat this process (dividing the quotient again
by 8) until we get the quotient to be less than 8.

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Example

21
 Exercises

◉ 67
◉ 99
◉ 350

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Octal to decimal

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24
 Exercises

◉ (121)8
◉ (454)8

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 Hexadecimal Number System

◉ The base of a hexadecimal system is 16. The 16 symbols

involved in this system include 10 decimal digits and the
first six letters of the English alphabet, i.e. 0, 1, 2, 3, 4, 5, 6, 7,
8, 9, A, B, C, D, E, F. Here, the alphabets can be treated 10,
11, 12, 13, 14 and 15, respectively.

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 Conversion from Hex to Decimal

◉ Convert 7CF (hex) to decimal.

◉ Given hexadecimal number is 7CF.
◉ In hexadecimal system,
◉ 7=7
◉ C = 12
◉ F = 15
◉ To convert this into a decimal number system, multiply each digit with the powers of 16 starting
from units place of the number.
◉ 7CF = (7 × 162) + (12 × 161) + (15 × 160)
◉ = (7 × 256) + (12 × 16) + (15 × 1)
◉ = 1792 + 192 + 15
◉ = 1999

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◉ Convert (1DA6)16 to decimal.
◉ Convert (E8B)16 to decimal system.
◉ (2bf)16

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 Conversion from Decimal to Hexadecimal number
system

◉ Take decimal number as dividend.

◉ Divide this number by 16 (16 is base of hexadecimal so divisor here).
◉ Store the remainder in an array (it will be: 0 to 15 because of divisor 16,
replace 10, 11, 12, 13, 14, 15 by A, B, C, D, E, F respectively).
◉ Repeat the above two steps until the number is greater than zero.
◉ Print the array in reverse order (which will be equivalent hexadecimal
number of given decimal number).

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Convert 60010 into a hexadecimal number.

30
Binary to octal Conversion

31
Octal to Binary Conversion

32
Hexa Decimal to Binary Conversion

33
 Binary to Hexa Decimal Number

(1000101)2
Start from the right and divide into 4 Blocks
0100 0101

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 Octal to Hexa Decimal Number
◉ Step1: Convert Octal to Binary
◉ Group 4 bits together and represent equivalent hexa
decimal digit

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 Hexa decimal to Octal conversion

◉ Step1: Convert Hexa decimal to binary

◉ Step2: Regrouping the bits into 3 bits

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 Complements

◉ complement number system An alternative representation

of numbers in a fixed-radix number system
◉ Complements are used in the digital computer in order to
simplify the subtraction operation and for logical
manipulation.
◉ For Each Radix system( Radix r represents the number system)
◉ There are 2 types of Complements(r, r-1) complements
◉ r-radix complement,r-1=Diminished radix complement.

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 Binary system Complements

◉ There are 2 complements in Binary System

1. 1’s Complement
2. 2’s complement

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 1’s Complement
◉ To generate a 1’s complement for any given binary number,
you only need to invert that number.
◉ For a binary number like 110010, the 1’s complement would
be 001101.

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 2’s complement
◉ To generate a 2’s complement for any given binary number, you
need to invert it. Then you need to add 1 to the LSB (Least
Significant Bit) of the generated result.
◉ 1’s complement + 1

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 Positive and Negative Numbers

◉ In Digital system it is not possible to use negative sign(-) before

them.
◉ Binary system has extra bit called signed bit to represent the
sign of a number
◉ if the sign bit is '1', the number is negative; if the sign bit is '0',
the number is positive.
◉ In negative number remain bits will be represented as Signed
magnitude method(1’s or 2’s complement)

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 Signed Magnitude Method
◉ The sign-magnitude binary format is the simplest conceptual format. In
this method of representing signed numbers, the most significant digit
(MSD) takes on extra meaning.
◉ If the MSD is a 0, we can evaluate the number just as we would any
normal unsigned integer. And also we shall treat the number as a
positive one.
◉ If the MSD is a 1, this indicates that the number is negative.

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Signed Magnitude 1’s Complement

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 2’s complement Method
◉ +5 is represented as it is represented in sign magnitude method. -
5 is represented using the following steps:
◉ (i) +5 = 0 0101
◉ (ii) Take 2’s complement of 0 0101 and that is 1 1011. MSB is 1
which indicates that number is negative.
◉ MSB is always 1 in case of negative numbers.

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 Binary Arithmetic

◉ Binary Arithmetic includes the basic operation like

1. Binary addition
2. Binary Subtraction
3. Binary multiplication
4. Binary Division.

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 Binary Addition

◉ The addition of 2 Binary numbers is performed exactly same

as the decimal number addition.

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 Addition using 2’s complement

◉ The 2’s complement is most commonly used code for

processing positive and negative binary numbers. There are
4 different cases
1. Both the numbers are positive
2. Larger of 2 numbers are positive
3. The larger of 2 numbers are negative
4. Both the numbers are negative

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◉ Case 2: Larger of 2 numbers are positive
Example: 1101 and -1001
◉ First, find the 2's complement of the negative number 1001. So, for finding 2's
complement, change all 0 to 1 and all 1 to 0 or find the 1's complement of the
number 1001. The 1's complement of the number 1001 is 0110, and add 1 to
the LSB of the result 0110. So the 2's complement of number 1001 is
0110+1=0111
◉ Add both the numbers, i.e., 1101 and 0111;
1101+0111=1 0100
◉ By adding both numbers, we get the end-around carry 1. We discard the end-
around carry. So, the addition of both numbers is 0100.

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Case 3: The larger of 2 numbers are negative
Example: 1101 and -1110
◉ First, find the 2's complement of the negative number 1110. So, for finding
2's complement, add 1 to the LSB of its 1's complement value 0001.
0001+1=0010
◉ Add both the numbers, i.e., 1101 and 0010;
1101+0010= 1111
◉ Find the 2's complement of the result 1110 that is the final result. So, the
2's complement of the result 1110 is 0001, and add a negative sign before
the number so that we can identify that it is a negative number.

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Case 4: Both the numbers are negative
Example: -1101 and -1110 in five-bit register
◉ Firstly find the 2's complement of the negative numbers 01101 and 01110.
So, for finding 2's complement, we add 1 to the LSB of the 1's
complement of these numbers. 2's complement of the number 01110 is
10010, and 01101 is 10011.
◉ We add both the complement numbers, i.e., 10001 and 10010;
10010+10011= 1 00101
◉ By adding both numbers, we get the end-around carry 1. This carry is
discarded and the final result is the 2.s complement of the result 00101.
So, the 2's complement of the result 00101 is 11011, and we add a
negative sign before the number so that we can identify that it is a
negative number.
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 Binary Subtraction

◉ Binary subtraction is one of the four binary operations, where we

perform the subtraction method for two binary numbers
(comprising only two digits, 0 and 1).
◉ This operation is similar to the basic arithmetic subtraction
performed on decimal numbers in Maths.
◉ Binary Subtraction
◉ 0–0=0
◉ 1–0=1
◉ 1–1=0
◉ 0 – 1 = 1 (Borrow 1)

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Case i) Binary subtraction without borrowing
Case ii) Binary subtraction with borrowing
Case iii)Binary Subtraction Using 1's Complement

Case i) Binary subtraction without borrowing

Subtract 100 from 1111 .Here number 4 is represented in binary as 100 and
number 15 is represented as 1111.

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Case ii) Binary subtraction with borrowing:

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Case iii)Binary Subtraction Using 1's Complement

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 Binary Subtraction Using 2's Complement

◉ Step 1: Determine the 2’s complement of the smaller number

◉ Step 2: Add this to the larger number.
◉ Step 3: Omit the carry. Note that there is always a carry in this case.

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 Binary Multiplication

◉ The binary multiplication is very much similar to the usual multiplication

method of integers.
◉ First, we need to multiply each digit of one binary number to each digit of
another binary number.

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 Binary Division

◉ The binary division operation is similar to

the base 10 decimal system, except the base 2.
◉ The division is probably one of the most
challenging operations of the basic arithmetic operations.
◉ Solve 01111100 ÷ 0010

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 Codes in Digital Electronics

◉ The digital data is represented, stored and transmitted as group of

bits. This group of bits is also called as binary code.
Binary codes can be classified into two types.
◉ Numeric codes
◉ Alpha Numeric codes
Alpha Numeric Codes are classified into 4 Groups
1. Weighted Codes
2. Non weighted codes
3. Alpha Numeric codes
4. Error detecting and correction codes
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◉ BCD ( Binary Coded Decimal):
Binary Coded Decimal, or BCD, is another process for converting decimal
numbers into their binary equivalents.
◉ It is a form of binary encoding where each digit in a decimal number is
represented in the form of bits.
◉ This encoding can be done in either 4-bit or 8-bit (usually 4-bit is
preferred).
◉ It is a fast and efficient system that converts the decimal numbers into
binary numbers as compared to the existing binary system.
◉ The BCD code is more precisely known as 8421 BCD code , with 8,4,2 and
1 representing the weights of different bits in the four-bit groups

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Example

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 Excess-3 Code

◉ The excess-3 code (or XS3) is a non-weighted code used to

express code used to express decimal numbers.
◉ It is a self-complementary binary coded decimal (BCD) code and
numerical system which has biased representation
An Excess-3 equivalent of a given binary number is obtained using
the following steps:
◉ Find the decimal equivalent of the given binary number.
◉ Add +3 to each digit of decimal number.
◉ Convert the newly obtained decimal number back to binary
number to get required excess-3 equivalent.

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62
 Gray Code

◉ A Gray code is an encoding of numbers so that adjacent

numbers have a single digit differing by 1.
◉ The Gray Code is a sequence of binary number systems,
which is also known as reflected binary code.
◉ Gray codes are used in the general sequence of hardware-
generated binary numbers
◉ The gray code is a very light weighted code because it doesn't
depend on the value of the digit specified by the position.

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 How to generate Gray code?

For generating gray code:

◉ We find the number of bits required to represent a number.
◉ Next, we find the code for 0, i.e., 0000, which is the same as binary.
◉ Now, we take the previous code, i.e., 0000, and change the most
significant bit of it.
◉ We perform this process reclusively until all the codes are not
uniquely identified.
◉ If by changing the most significant bit, we find the same code
obtained previously, then the second most significant bit will be
changed, and so on.

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65
Binary code to Gray code

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Conversion from Gray code to Binary Code

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 Alphanumeric Code

◉ Alphanumeric codes (also known as character codes) are

defined as binary codes used to represent alphanumeric data.
◉ The codes write alphanumeric data, including letters of the
alphabet, mathematical symbols, numbers, and punctuation
marks, in a form that is easily understood by a computer.
◉ The most common alphanumeric codes used these days are
ASCII code,
EBCDIC code,
UNICODE.

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 ASCII Code

◉ The full form of ASCII code is the American Standard Code for
Information Interchange.
◉ It is a seven-bit code based on the English alphabet
◉ it can almost represent 128 characters. These include 95
printable characters including 26 upper-case letters (A to Z), 26
lowercase letters (a to z), 10 numerals (0 to 9) and 33 special
characters such as mathematical symbols, space character etc.

69
 EBCDIC(Extended Binary Coded Decimal
Interchange Code)

◉ This is a coding system used to represent characters-letters,

numerals, punctuation marks, and other symbols in
computerized text.
◉ A character is represented in EBCDIC by eight bit. EBCDIC
mainly used on IBM mainframe and IBM midrange computer
operating systems.
◉ Each byte consists of two nibbles, each four bits wide.
◉ The first four bits define the class of character, while the
second nibble defines the specific character inside that class

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Difference Between ASCII and EBCDIC

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 Fixed Point Representation

◉ In computers, fixed-point representation is a real data type for

numbers.
◉ Fixed point representation can convert data into binary form, and
then the data is processed, stored, and used by the computer.
◉ It has a fixed number of bits for the integral and fractional parts.

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◉ Sign bit:- The fixed-point number representation in binary uses a sign bit.
The negative number has a sign bit 1, while a positive number has a bit 0.
◉ Integral Part:- The integral part in fixed-point numbers is of different
lengths at different places. It depends on the register's size; for an 8-bit
register, the integral part is 4 bits.
◉ Fractional part:- The Fractional part is of different lengths at different
places. It depends on the registers; for an 8-bit register, the fractional part
is 3 bits.

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How to write numbers in Fixed-point
notation

74
Chapter 2
Structure Of Computers

75
 Digital Computers

◉ A Digital computer can be considered as a digital system that

performs various computational tasks.
◉ The first electronic digital computer was developed in the late
1940s and was used primarily for numerical computations.
◉ By convention, the digital computers use the binary number
system, which has two digits: 0 and 1.
◉ A binary digit is called a bit.
◉ A computer system is subdivided into two functional entities:
Hardware and Software.

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A computer system is subdivided into two functional entities: Hardware and
Software.
Hard ware
Software
◉ The hardware consists of all the electronic components and
electromechanical devices that comprise the physical entity of the
device.
◉ The software of the computer consists of the instructions and data that
the computer manipulates to perform various data-processing tasks.

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Software is a set of instructions, data or programs used to operate
computers and execute specific tasks.
The two main categories of software are
application software
system software.
Application software. The most common type of software,
application software is a computer software package that performs a
specific function for a user, or in some cases, for another application.
office suites, graphics software, databases and database management
programs, web browsers, word processors, software development
tools, image editors and communication platforms.

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◉ System software. These software programs are designed to run a
computer's application programs and hardware.
◉ System software coordinates the activities and functions of the hardware
and software.
◉ In addition, it controls the operations of the computer hardware and
provides an environment or platform for all the other types of software to
work in. The OS is the best example of system software;

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◉ Computer organization is concerned with the way the hardware
components operate and the way they are connected together to form the
computer system.
◉ Computer design is concerned with the hardware design of the computer.
Once the computer specifications are formulated, it is the task of the
designer to develop hardware for the system.
◉ Computer architecture is concerned with the structure and behaviour of
the computer as seen by the user. It includes the information formats, the
instruction n set, and techniques for addressing memory.

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Computer Types

◉ Computers are of various

types and they can be
categorized in two ways on
the basis of size and on the
basis of data handling
capabilities.

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Functional Unit of a computer

82
Input unit:
◉ Input units are used by the computer to read the data. The most commonly
used input devices are keyboards, mouse, joysticks, trackballs,
microphones, etc.
◉ However, the most well-known input device is a keyboard. Whenever a key
is pressed, the corresponding letter or digit is automatically translated into
its corresponding binary code and transmitted over a cable to either the
memory or the processor.
Central processing unit:
◉ Central processing unit commonly known as CPU can be referred as an
electronic circuitry within a computer that carries out the instructions given
by a computer program by performing the basic arithmetic, logical, control
and input/output (I/O) operations specified by the instructions.

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Memory unit:
◉ The Memory unit can be referred to as the storage area in which programs are kept which are
running, and that contains data needed by the running programs.
◉ The Memory unit can be categorized in two ways namely, primary memory and secondary
memory.
◉ Primary storage is the fastest memory that operates at electronic speeds. Primary memory
contains a large number of semiconductor storage cells, capable of storing a bit of
information. The word length of a computer is between 16-64 bits.
◉ It is also known as the volatile form of memory, means when the computer is shut down,
anything contained in RAM is lost.
◉ The most common examples of primary memory are RAM and ROM.
◉ Secondary memory is used when a large amount of data and programs have to be stored for
a long-term basis.
◉ It is also known as the Non-volatile memory form of memory, means the data is stored
permanently irrespective of shut down.
◉ The most common examples of secondary memory are magnetic disks, magnetic tapes, and
optical disks. 84
Arithmetic & logical unit:
◉ Most of all the arithmetic and logical operations of a computer are executed in the ALU
(Arithmetic and Logical Unit) of the processor. It performs arithmetic operations like addition,
subtraction, multiplication, division and also the logical operations like AND, OR, NOT
operations.
Control unit:
◉ The control unit is a component of a computer's central processing unit that coordinates the
operation of the processor. It tells the computer's memory, arithmetic/logic unit and input and
output devices how to respond to a program's instructions.
◉ The control unit is also known as the nerve center of a computer system.
Output Unit:
◉ The primary function of the output unit is to send the processed results to the user. Output
devices display information in a way that the user can understand.
◉ Output devices are pieces of equipment that are used to generate information or any other
response processed by the computer. These devices display information that has been held or
generated within a computer.

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 Von Neumann Architecture

◉ There are 2 types of computers

1)Fixed Program computers 2)Stored
Program Computers
◉ Von-Neumann proposed his
computer architecture design in
1945 which was later known as Von-
Neumann Architecture.
◉ Von Neumann architecture is based
on the stored-program computer
concept, where instruction data and
program data are stored in the same
memory.

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 Components of Von-Neumann Model:

◉ Central Processing Unit

◉ Buses
◉ Memory Unit

87
88
89
Bus Structure

90
 Performance

◉ In computer organization, performance refers to the speed and efficiency

at which a computer system can execute tasks and process data.
◉ The total time required to execute a program is elapsed time
◉ The time needed to execute a program is called processor time

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Flow of program instruction and data between
memory & processor:

◉ At the start of execution all the program instruction are stored

in main memory
◉ As execution proceeds, instruction are fetched in to the
processor and a copy is placed in the cache
◉ Later if the same instruction is needed a second time it read
directly from the cache
◉ A program will be executed faster if the movement of
instruction between main memory and processor is minimized
which is achieved by using cache

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Processor clock:
◉ Clock speed, also known as clock rate or clock frequency, is a measure of
how fast a computer’s central processing unit (CPU) can execute
instructions.
◉ It is typically measured in gigahertz (GHz).
◉ Higher clock speeds generally mean that a CPU can process more
instructions per second, and thus can perform better on tasks that require
fast processing.
◉ Processor circuits are controlled by timing signal called clock
◉ The clock defines regular time intervals called clock cycles

93
 Basic Performance Equation
CPU performance equation.
The Classic CPU Performance Equation in terms of instruction count (the number of instructions executed by the program), CPI, and clock
cycle time:
CPU time=Instruction count * CPI * Clock cycle time or
since the clock rate is the inverse of clock cycle time:
CPU time = Instruction count *CPI / Clock rate
T = N X S / R where N is Actual Number of Instructions, S is Average number of basic steps needed in one machine cycle
And R is Clock rate in cycles per speed
Relative performance:
Performance A / Performance B = Execution time B / Execution time A = n
CPU execution time for a program
CPU execution time for a program =CPU clock cycles for a program * clock cycle time or since the clock rate is the inverse of clock cycle
time:
CPU execution time for a program= CPU clock cycles for a program / Clock rate
CPU clock cycles required for a program
CPU clock cycles = Instructions for a program * Average clock cycles per instruction

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 Clock Rate

◉ CLOCK RATE: There are two possibilities for increasing the clock rate, R.
◉ First Improving the integrated circuit (IC) technology makes logic circuits
faster, which reduces the time needed to complete a basic step. This
allows the clock period, P, to be reduced and the clock rate, R, to be
increased.
◉ Second, reducing the amount of processing done in one basic step also
makes it possible to reduce the clock period, P.
However, if the actions that have to be performed by an instruction
remain the same, the number of basic steps needed may increase.

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 Multi processor
◉ A Multiprocessor is a computer system with two or more central
processing units (CPUs) share full access to a common RAM.
◉ The main objective of using a multiprocessor is to boost the system’s
execution speed, with other objectives being fault tolerance and
application matching.
◉ There are two types of multiprocessors,
one is called shared memory multiprocessor and
another is distributed memory multiprocessor.
◉ In shared memory multiprocessors,
all the CPUs shares the common memory but in a distributed memory
multiprocessor, every CPU has its own private memory.

96
 Multi Computer

◉ A multicomputer system is a computer system with multiple processors

that are connected together to solve a problem.
◉ Each processor has its own memory and it is accessible by that particular
processor and those processors can communicate with each other via an
interconnection network.

97
◉ As the multicomputer is capable of messages passing between the
processors, it is possible to divide the task between the processors to
complete the task.
◉ Hence, a multicomputer can be used for distributed computing.
◉ It is cost effective and easier to build a multicomputer than a
multiprocessor.

98
Difference between Multi processor and Multi
computer
Multiprocessor Multicomputer
Multiprocessor is a system with two or multicomputer is a system with
more central processing units (CPUs) multiple processors that are attached
that is capable of performing multiple via an interconnection network to
tasks perform a computation task..
A multiprocessor system is a single multicomputer system is a cluster of
computer that operates with multiple computers that operate as a singular
CPUs computer.
Construction of multiprocessor is not Construction of multicomputer is
easier and cost effective easier and cost effective .

In multiprocessor system, program multicomputer system, program tends

tends to be easier to be more difficult.
Multiprocessor supports parallel Multicomputer supports distributed
computing, computing.

99
 Unit-1
Chapter – 3
Digital Logic Circuits

100
 Introduction
◉ The basic digital electronic circuit that has one or more inputs and single
output is known as Logic gate.
◉ Digital electronic circuits operate with voltages of two logic levels namely
Logic Low and Logic High.
◉ The range of voltages corresponding to Logic Low is represented with ‘0’.
◉ Similarly, the range of voltages corresponding to Logic High is represented
with ‘1’.

101
 Digital Logic

◉ Digital Logic Gates can be made from discrete components such

as Resistors, Transistors and Diodes to form RTL (resistor-transistor logic)
or DTL (diode-transistor logic) circuits.
◉ Depending in the input value, the logic gate will be either output value of
‘1’ for on and ‘0’ for off.
◉ we can implement these Boolean functions by using basic gates. The basic
gates are AND, OR & NOT gates.
◉ A truth table is a mathematical table used in logic—specifically in
connection with Boolean algebra, Boolean functions, and propositional
calculus

102
 Types of Gates

There are 6 gates

1. AND Gate
2. OR Gate
3. NAND Gate
4. NOR Gate
5. Exclusive OR Gate
6. Exclusive AND Gate

103
 AND Gate

◉ The AND gate produces the AND logic function: that is, the output is 1
if input A and input B are both equal to 1; otherwise, the output is 0.
◉ An AND gate is a digital circuit that has two or more inputs and
produces an output, which is the logical AND of all those inputs. It is
optional to represent the Logical AND with the symbol ‘.’.

A B Y = A.B
0 0 0
0 1 0
1 0 0
1 1 1

104
 OR Gate

◉ An OR gate is a digital circuit that has two or more inputs and produces
an output, which is the logical OR of all those inputs.
◉ This logical OR is represented with the symbol ‘+’.
◉ Here A, B are the inputs and Y is the output of two input OR gate. If both
inputs are ‘0’, then only the output, Y is ‘0’. For remaining combinations
of inputs, the output, Y is ‘1’.
A B Y=A+B
0 0 0
0 1 1
1 0 1
1 1 1

105
 NOT Gate
◉ A NOT gate is a digital circuit that has single input and single output. The output of NOT
gate is the logical inversion of input.
◉ Hence, the NOT gate is also called as inverter.
◉ Here A and Y are the input and output of NOT gate respectively. If the input, A is ‘0’, then the
output, Y is ‘1’.
◉ Similarly, if the input, A is ‘1’, then the output, Y is ‘0’.

A Y = A’
0 1
1 0

106
 NAND Gate
◉ The NAND function is the complement of the AND function
◉ The designation NAND is derived from the abbreviation of NOT-AND

A B Y = (A.B)’

0 0 1
0 1 1
1 0 1
1 1 0

107
 NOR gate
◉ NOR gate is a digital circuit that has two or more inputs and produces an output,
which is the inversion of logical OR of all those inputs.
◉ Here A, B are the inputs and Y is the output. If both inputs are ‘0’, then the output, Y
is ‘1’.
◉ If at least one of the input is ‘1’, then the output, Y is ‘0’. This is just opposite to that
of two input OR gate operation.
A B Y = (A+B)’

0 0 1
0 1 0
1 0 0
1 1 0

108
 Exclusive AND Gate

◉ The exclusive-OR gate has a graphic symbol similar to the OR gate except
for the additional curved line on the input side.

109
 Exclusive NOR Gate

◉ The exclusive-NOR is the complement of the exclusive-OR, as indicated by

the small circle in the graphic symbol.
◉ The output of this gate is 1 only if both inputs are equal to 1 or both inputs
are equal to 0.

110
 Universal Gates

◉ A universal gate is a gate which can implement any Boolean function

without need to use any other gate type.
◉ The NAND and NOR gates are universal gates.
◉ In fact, an AND gate is typically implemented as a NAND gate followed by
an inverter not the other way around!!
◉ Likewise, an OR gate is typically implemented as a NOR gate followed by
an inverter not the other way around!!

111
 NAND Gate is a Universal Gate

◉ To prove that any Boolean function can be implemented using only

NAND gates, we will show that the AND, OR, and NOT operations can
be performed using only these gates.
Implementing an Inverter Using only NAND Gate
Implementing AND Using only NAND Gates
Implementing OR Using only NAND Gates

112
 NAND Gate as AND Gate

The AND gate can be implemented by using two NAND gates in the below fashion:

113
 NAND as NOT
◉ A NOT gate is made by joining the inputs of a NAND gate together.
◉ Since a NAND gate is equivalent to an AND gate followed by a NOT gate,
joining the inputs of a NAND gate leaves only the NOT gate.

114
 NAND Gate as OR Gate

◉ If the truth table for a NAND gate is examined, it can be seen that if any of
the inputs are 0, then the output will be 1.
◉ To be an OR gate, however,
the output must be 1 if any input is 1.
◉ Therefore, if the inputs are inverted,
any high input will trigger a high output.

115
 NAND as NOR Gate

◉ A NOR gate is an OR gate with an inverted output. Output is high when

neither input A nor input B is high.

116
 NAND as NOR Gate

◉ An XOR gate is made by connecting four NAND gates as shown below. This
construction entails a propagation delay three times that of a single NAND
gate.

117
 NAND gate as XOR gate

◉ This construction uses five gates instead of four.

118
 NAND Gate as X-NOR gate
◉ NAND gate is an inverted-input OR gate.
◉ This construction entails a propagation delay three times that of a single
NAND gate and uses five gates.

119
 Boolean Algebra

◉ Boolean Algebra is used to analyse and simplify the digital (logic) circuits.
◉ It uses only the binary numbers i.e. 0 and 1. It is also called as Binary
Algebra or logical Algebra.
◉ Boolean algebra was invented by George Boole in 1854.
◉ There is no negative and fractional numbers
◉ Boolean algebra uses Boolean Variables and Boolean operators.
◉ There are 3 Basic operators AND,OR,NOT.
◉ A Boolean Expression is combination of Boolean Variables and Boolean
Operators.
◉ A Boolean Function has one or more input variables and Produces the result
based on the input.

120
Truth Table:
◉ Boolean function can be uniquely and completely described by truth table.
◉ A truth table lists all possible values of input combinations of the function and
produces the output for all combinations.
Rule in Boolean Algebra:
◉ Variable used can have only two values. Binary 1 for HIGH and Binary 0 for LOW.
◉ Complement of a variable is represented by an over bar (-). Thus, complement of
variable B is represented as . Thus if B = 0 then = 1 and B = 1 then = 0.
◉ OR ing of the variables is represented by a plus (+) sign between them. For example
OR ing of A, B, C is represented as A + B + C.
◉ Logical AND ing of the two or more variable is represented by writing a dot between
them such as A.B.C. Sometime the dot may be omitted like ABC.

121
 Boolean Laws

◉ There are six types of Boolean Laws.

1. Commutative law
2. Associative law
3. Distributive law
4. AND law
5. OR Law
6. INVERSION law

122
◉ Commutative law:
Any binary operation which satisfies the following expression is
referred to as commutative operation.

Commutative law states that changing the sequence of the variables

does not have any effect on the output of a logic circuit.
◉ Associative law:
This law states that the order in which the logic operations are
performed is irrelevant as their effect is the same.

123
◉ Distributive law:
Distributive law states the following condition.

◉ AND law:
These laws use the AND operation. Therefore they are called as AND laws.

◉ OR law
These laws use the OR operation. Therefore they are called as OR laws.

◉ INVERSION law:
This law uses the NOT operation. The inversion law states that double inversion of
a variable results in the original variable itself.

124
Duality Principle:
◉ According to the duality principle, if we have theorems of Boolean Algebra
for any one type of operation then the operation can be converted into
another type of operation.
◉ In other words AND can be converted to OR and OR can be converted into
AND
◉ We can interchange '0 with 1', '1 with 0', '(+) sign with (.) sign' and '(.) sign
with (+) sign' to perform dual operation. T

125
 De Morgan's Theorem

◉ This theorem explains that the complements of the products of all the
terms are equal to the sums of the complements of each and every term
◉ Likewise, the complements of the sums of all the terms are equal to the
products of the complements of each and every term.
◉ There are 2 theorems in DeMorgan’s
1. Theorem 1:

2. Theorem 2:

126
◉ Theorem 1: This theorem explains that the complements of the products of
all the terms are equal to the sums of the complements of each and every
term

◉ The LHS (left-hand side) of this theorem represents the NAND gate that has inputs A and B. On
the other hand, the RHS (right-hand side) of this theorem represents the OR gate that has
inverted inputs.
◉ The OR gate here is known as a Bubbled OR.

127
128
◉ Theorem 2: The complements of the sums of all the terms are equal to the
products of the complements of each and every term.

◉ The left-hand side of this theorem represents the NOR gate that has inputs A
and B. On the other hand, the right-hand side represents the AND gate that
has inverted inputs.
◉ The AND gate here is known as a Bubbled AND.

129
130
131
For applying the De Morgan's theorem on this expression, we have to follow the following expressions:
1) In complete expression, first, we find those terms on which we can apply the De Morgan's theorem
and treat each term as a single variable.

132
 Standard Form of Boolean Expressions

◉ All Boolean expressions regardless of their form can be converted in to 2

standard forms
1. SOP Sum of product
2. POS Product of Sum

133
 Min Term
◉ Min term means the term that is true for a minimum number of combination of inputs. That is
true for only one combination of inputs.
◉ Since AND gate also gives True only when all of its inputs are true so we can say min terms are
AND of input combinations like in the table given below.

134
 SOP Sum of Product

◉ Sum of Product is the abbreviated form of SOP.

◉ Sum of product form is a form of expression in Boolean algebra in which
different product terms of inputs are being summed together.
Types of Sum Of Product (SOP) Forms
There are few different forms of Sum of Product.
◉ Canonical SOP Form
◉ Non-Canonical SOP Form
◉ Minimal SOP Form

135
◉ Canonical SOP Form: This is the standard form of Sum of Product.
◉ Canonical SOP expression is represented by summation sign ∑ and min
terms in the braces for which For this function the canonical SOP
expression is
● F = ∑( m1, m2, m3, m5 )
● Which means that the function is true for the min
terms {1, 2, 3, 5} the output is true.
● By expanding the summation we get.
● F = m1 + m2 + m3 + m5
● Now putting min terms in the expression
● F = A̅B̅C + A̅BC̅ + A̅BC + AB̅C
● Canonical form contains all inputs either
complemented or non-complemented in its product
terms.

136
◉ Non-Canonical SOP Form: As the name suggests, this form is the non-
standardized form of SOP expressions. The product terms are not the min
terms but they are simplified.

137
◉ Minimal SOP Form: Minimal SOP form can be made using Boolean
algebraic theorems but it is very easily made using Karnaugh map (K-map).
Minimal SOP form is preferred because it uses the minimum number
of gates and input lines. it is commercially beneficial because of its compact
size, fast speed, and low fabrication cost.

138
 Product of Sums

◉ When two or more sum terms are multiplied the resultant expression if
product of sums.
◉ Canonical form of Boolean Expression

139
◉ A Min term is product of N distinct literals where each literal occurs exactly
once
◉ A Max term is sum of N distinct literals where each literal occurs exactly
once
◉ A Boolean function can be expressed as sum of min terms(SOP)
◉ A Boolean function can be expressed as product of max terms(POS)

140
141
142
 Map Simplification

◉ The Map Simplification is a systematic way of simplifying Boolean

expressions. With the help of the K-map method
◉ we can find the simplest POS(Product of sum) and SOP( Sum of
product) expression, which is known as the minimum expression.
◉ K-map contains all the possible values of input variables and their
corresponding output values.
◉ However, in K-map, the values are stored in cells of the array. In each
cell, a binary value of each input variable is stored.
◉ For example, if the number of variables is three, the number of cells is
23=8, and if the number of variables is four, the number of cells is 24

143
 2 Variable K-map

◉ There is a total of 4 variables in a 2-variable K-map. There are two

variables in the 2-variable K-map. The following figure shows the
structure of the 2-variable K-map:

• In the above figure, there is only one possibility of grouping four adjacent minterms.
• The possible combinations of grouping 2 adjacent minterms are {(m0, m1), (m2, m3), (m0,
m2) and (m1, m3)}.

144
145
146
147
148
 3-variable K-map

◉ The 3-variable K-map is represented as an array of eight cells.

◉ In this case, we used A, B, and C for the variable. We can use any letter for
the names of the variables.

149
 The 4-Variable Karnaugh Map

◉ The 4-variable K-map is represented as an array of 16 cells

◉ Binary values of A and B are along the left side, and the values of C and D
are across the top

150
 Combinational Circuits

◉ A combinational circuit is a connected arrangement of logic gates with a set of

inputs and outputs.
◉ A combinational circuit transforms binary information from the given input data to
the required output data
◉ A combinational circuit can be described by a truth table showing the binary
relationship between the n input variables and the m output variables.
◉ The truth table lists the corresponding output binary values for each of the 2"
input combinations.

151
◉ Combinational Circuits are made from 3 Basic Gates; NAND, NOR, NOT that
re combined and connected together to produce more complicated
switching circuits.
◉ These gates are building blocks of Combinational logic circuits.
◉ There are 3 main ways to specify the function of combinational circuits
1. Boolean Algebra
2. Truth Table
3. Logic Diagram

152
Classification of Combinational Circuits:
◉ There are three main categories of combinational circuits: arithmetic or
logical functions, data transmission and code converter as given below in
category diagram.

153
 Half Adder

◉ Half adder is a combinational logic circuit with two inputs and two outputs.
◉ The half adder circuit is designed to add two single bit binary number A and B. It is the basic
building block for addition of two single bit numbers.
◉ It doesn’t take carry from previous sum
◉ This circuit has two outputs carry and sum.
◉ The Boolean Expression for Half adder is:
Sum = A‘B+AB'
Carry = A.B

Block diagram
Circuit Diagram
Truth Table
154
 Full Adder

◉ It is used to add more than single bit

◉ It is a cascading full adders
◉ IC is 4 bit or 8 bit full adders
◉ The full adder is used to add three 1-bit binary numbers A, B, and carry C.
The full adder has three input states and two output states i.e., sum and
carry.

155
• The above block diagram describes the construction of the Full adder circuit. In the above
circuit, there are two half adder circuits that are combined using the OR gate.
• The first half adder has two single-bit binary inputs A and B.
• As we know that, the half adder produces two outputs, i.e., Sum and Carry.
• The 'Sum' output of the first adder will be the first input of the second half adder, and the 'Carry' output
of the first adder will be the second input of the second half adder.
• The second half adder will again provide 'Sum' and 'Carry'. The final outcome of the Full adder circuit
is the 'Sum' bit.
• In order to find the final output of the 'Carry', we provide the 'Carry' output of the first and the second
adder into the OR gate. The outcome of the OR gate will be the final carry out of the full adder circuit.

156
The full adder circuit construction can also be represented in a Boolean
expression.
Sum:
◉ Perform the XOR operation of input A and B.
◉ Perform the XOR operation of the outcome with carry. So, the sum is (A XOR
B) XOR Cin which is also represented as:
(A ⊕ B) ⊕ Cin
Carry:
◉ Perform the 'AND' operation of input A and B.
◉ Perform the 'XOR' operation of input A and B.
◉ Perform the 'OR' operations of both the outputs that come from the previous
two steps. So the 'Carry' can be represented as:
A.B + (A ⊕ B)
157
 Flip Flops

◉ The storage elements employed in clocked sequential circuits are called Flip-
Flops.
◉ A Flip flop is capable of storing one bit of information.
◉ It has 1 inputs and 2 outputs.
◉ One output is for normal value and another output is for complement value of a
bit stored to it.
Types of flip-flops:
◉ SR Flip Flop
◉ JK Flip Flop
◉ D Flip Flop
◉ T Flip Flop

158
 SR Flip Flop

◉ S-R flip-flop stands for SET-RESET flip-flops.

◉ The SET-RESET flip-flop consists of two NOR gates and also two NAND
gates.

◉ It is a clocked flip flop.

159
S.N. Condition Operation
1 S = R = 0 : No If S = R = 0 then output of NAND gates 3 and 4 are forced to become
change 1.
Hence R' and S' both will be equal to 1. Since S' and R' are the input
of the basic S-R latch using NAND gates, there will be no change in
the state of outputs.

2 S = 0, R = 1, E Since S = 0, output of NAND-3 i.e. R' = 1 and E = 1 the output of

=1 NAND-4 i.e. S' = 0.
Hence Qn+1 = 0 and Qn+1 bar = 1. This is reset condition.

3 S = 1, R = 0, E Output of NAND-3 i.e. R' = 0 and output of NAND-4 i.e. S' = 1.

=1 Hence output of S-R NAND latch is Qn+1 = 1 and Qn+1 bar = 0. This is
the reset condition.

4 S = 1, R = 1, E As S = 1, R = 1 and E = 1, the output of NAND gates 3 and 4 both are

=1 0 i.e. S' = R' = 0.
Hence the Race condition will occur in the basic NAND latch.

160
 D (Data or Delay) Flip-Flop

◉ D Flip-Flop is a slight modification of SR Flip-Flop. Since SR flip flop suffers from an

unavoidable condition called NO VALUE or RACE CONDITION.
◉ D Flip-Flop is designed to avoid it.
◉ The D input to this Flip-Flop is sole input and is inverted to create a set of two necessary
inputs.
◉ This management disables the similar input combinations like [0,0] or [1,1] and only SET,
RESET outputs are evaluated.
◉ D flip-flop operates with only positive clock transitions or negative clock transitions.

161
S. Condition Operation
N.

1 E=0 Latch is disabled. Hence no change in output.

2 E = 1 and D = If E = 1 and D = 0 then S = 0 and R = 1. Hence
0 irrespective of the present state, the next state is Q n+1 = 0
and Qn+1 bar = 1. This is the reset condition.

3 E = 1 and D = If E = 1 and D = 1, then S = 1 and R = 0. This will set the

1 latch and Qn+1 = 1 and Qn+1 bar = 0 irrespective of the
present state.

162
 JK((Jack Kilby) Flip Flops

◉ The JK flip flop is used to remove the drawback of the S-R flip flop i.e.,
undefined states. .
◉ The JK flip flop is formed by doing modification in the SR flip flop
◉ When S and R input is set to true, the SR flip flop gives an inaccurate result. But in
the case of JK flip flop, it gives the correct output.

163
 T (Toggling) Flip-Flop

◉ T Flip-Flop is a slight modification of JK Flip-Flop.

◉ The T input to this Flip-Flop is sole input and is distributed to create a set of two
necessary inputs.
◉ This management disables the differing input combinations like [0,1] or [1,0] and
only "NO CHANGE" & "TOGGLE" outputs are evaluated.
◉ T flip-flop is the simplified version of JK flip-flop.
◉ It is obtained by connecting the same input ‘T’ to both inputs of JK flip-flop.
◉ It operates with only positive clock transitions or negative clock transitions.

164
S.N. Condition Operation
1 T = 0, J = K = The output Q and Q bar won't change
0
2 T = 1, J = K = Output will toggle corresponding to every leading edge of
1 clock signal.

165
166
 Master Slave JK flip flop

◉ The Master-Slave Flip-Flop is basically a combination of two JK flip-flops

connected together in a series configuration.
◉ Out of these, one acts as the “master” and the other as a “slave”.
◉ The output from the master flip flop is connected to the two inputs of the
slave flip flop whose output is fed back to inputs of the master flip flop.
◉ In addition to these two flip-flops, the circuit also includes an inverter.
◉ The inverter is connected to clock pulse in such a way that the inverted
clock pulse is given to the slave flip-flop.
◉ In other words if CP=0 for a master flip-flop, then CP=1 for a slave flip-flop
and if CP=1 for master flip flop then it becomes 0 for slave flip flop.

167
168
 Sequential Circuits

◉ A sequential circuit is an interconnection of flip-flops and gates.

◉ The gates by themselves constitute a combinational circuit, but when
included with the flip-flops, the overall circuit is classified as a sequential
circuit.

169
◉ Sequential circuits are digital circuits that store and use the previous state
information to determine their next state.
◉ Unlike combinational circuits, which only depend on the current input values to
produce outputs,
◉ sequential circuits depend on both the current inputs and the previous state stored in
memory elements.
◉ A Sequential circuit is specified by
1. A time sequence of external inputs
2. External outputs
3. Internal flip flop binary states

170
State table of Sequential Circuit:
◉ The behaviour of sequential circuit is determined from the inputs, the
outputs and the state of its flip flops
◉ A sequential circuit is specified by a state table that relates outputs and
next states s function of inputs and present states.

The Next state values are then determined from

the input equations
DA=Ax+Bx
DB=A’x
The output column is derived from the output
equation
Y=Ax’ + Bx’

171
State Diagram:
◉ The information in a state table can be graphically represented in a state
diagram.
◉ In this type of diagram, a state represented by a circle, and the transition
between states indicated by directed lines connecting the circles.
◉ The state diagram of the sequential circuit given below.

172
◉ The directed line from state 00 to 01 labelled 1/0.
◉ It means that when the sequential circuit is in the present state 00 and the input is 1, the
output is 0.
◉ After a clock transition, the circuit goes to the next state 01.
◉ The same clock transition may change the input value.
◉ If the input changes to 0, the output becomes 1.
◉ But if the input remains at 1, the output stays at 0.
◉ This information obtained from the state diagram along the two directed lines from the circle
representing state 01.
173
Design of sequential circuit:
1. Translate the circuit specification into state diagram
2. Convert state diagram into state table
3. From state table derive the equations and draw the logic circuit
diagrams.

174
 Shift Registers

◉ The shift registers are another type of sequential logic circuits that is used for storage and
transfer.
◉ The information stored within these registers can be transferred with the help of shift
registers.
◉ Shift Register is a group of flip flops used to store multiple bits of data.
◉ The bits stored in such registers can be made to move within the registers and in/out of the
registers by applying clock pulses.
◉ An n-bit shift register can be formed by connecting n flip-flops where each flip-flop stores a
single bit of data.
◉ The registers which will shift the bits to the left are called “Shift left registers”.
◉ The registers which will shift the bits to the right are called “Shift right registers”.

175
Types of Shift Registers
◉ Serial In Serial Out shift register
◉ Serial In parallel Out shift register
◉ Parallel In Serial Out shift register
◉ Parallel In parallel Out shift register

176
Serial In Serial Out shift register:
◉ The shift register, which allows serial input (one bit after the other through
a single data line) and produces a serial output is known as a Serial-In
Serial-Out shift register.
◉ Since there is only one output, the data leaves the shift register one bit at a
time in a serial pattern, thus the name Serial-In Serial-Out Shift Register.

177
Serial-In Parallel-Out Shift Register (SIPO):
◉ The shift register, which allows serial input (one bit after the other through a single data line)
and produces a parallel output is known as the Serial-In Parallel-Out shift register.
◉ The logic circuit given below shows a serial-in-parallel-out shift register.
◉ The circuit consists of four D flip-flops which are connected.
◉ The clear (CLR) signal is connected in addition to the clock signal to all 4 flip flops in order to
RESET them.
◉ The output of the first flip-flop is connected to the input of the next flip flop and so on.

178
Parallel-In Serial-Out Shift Register (PISO):
◉ The shift register, which allows parallel input (data is given separately to each flip flop and in a
simultaneous manner) and produces a serial output is known as a Parallel-In Serial-Out shift
register.
◉ The logic circuit given below shows a
parallel-in-serial-out shift register.
◉ The circuit consists of four D flip-flops
which are connected.
◉ The output of the previous flip-flop
and parallel data input are connected
to the input of the MUX and
the output of MUX is connected to the
next flip-flop.

179
Parallel-In Parallel-Out Shift Register (PIPO):
◉ The shift register, which allows parallel input (data is given separately to
each flip flop and in a simultaneous manner) and also produces a parallel
output is known as Parallel-In parallel-Out shift register.
◉ The logic circuit given below shows a parallel-in-parallel-out shift register.

180
Bidirectional Shift Register:
◉ Bidirectional shift registers are the registers that are capable of shifting the data either right or
left depending on the mode selected.
◉ If the mode selected is 1(high), the data will be shifted toward the right direction and if the
mode selected is 0(low), the data will be shifted towards the left direction. The logic circuit
given below shows a Bidirectional shift register.

181
 Counters

◉ A Counter is a device which stores (and sometimes displays) the

number of times a particular event or process has occurred, often in
relationship to a clock signal.
◉ Counters are used in digital electronics for counting purpose, they can
count specific event happening in the circuit.

182
Binary Counter:
A counter that pursues the binary number sequence is known as a binary counter. An n-bit binary
counter is a register of n flip-flops and related gates that follows a sequence of states as per the
binary count of n bits, from 0 to 2n – 1.
◉ A sequence of binary numbers including 0000, 0001, 0010, 0011, etc.
◉ The lower-order bit is achieved after each count and each other bit is achieved from one count
to the next if and only if all its lower-order bits are similar to 1.
For example, the binary count from 0111 (7) to 1000 (8) is appeared by
(a) complementing the low-order bit,
(b) complementing the second-order bit because the first bit of 0111 is 1,
(c) complementing the third-order bit because the first two bits of 01 11 are 1's, and
(d) complementing the fourth-order bit because the first three bits of 0111 are all 1's.

183
◉ The first stage A0 is complemented when the
counter is allowed and the clock goes through
a positive transition.
◉ Each of the other three flip-flops is
complemented when all preceding smallest
significant flip-flops are similar to 1 and the
count is allowed.
◉ The chain of AND gates creates the needed
logic for the J and K inputs.
◉ The output carry can be used to develop the
counter to further procedures, with each
procedure having an extra flip-flop and an AND
gate.

184
 Integrated Circuit

◉ An integrated circuit (IC) is manufactured using silicon material and

mounted in a ceramic or plastic container (known as Chip).
◉ An integrated circuit is electronic circuit or device that has electronic
components on a small semiconductor chip.
Types of Integrated Circuits: There are several types of Integrates circuits.
1. DL 6. I2L
2. RTL 7. ECL
3. DTL 8. MOS
4. HTL 9. CMOS
5. TTL

185
Diode Logic (DL)
◉ Registers and diodes are used to implement logic. The purpose of diode is to
perform OR and AND operation, and logic switch. It is essential that diode is
forward biased so that it can conduct.
◉ Disadvantages: diodes can not perform NOT operation, diode cannot work
for multiple states, only one stage at a time, tend to degrade signals quickly.
Resistor-Transistor Logic (RTL)
◉ Registers and transistors are used to implement logic. Transistors are used to
combine signals which are inverted and amplified inputs. These are
economical and easy to design but slower in speed. These require great
amount of current from supply. RTL gates can be used as interface between
linear circuits and digital.

186
Diode Transistor Logic (DTL)
◉ Registers and diodes are used to implement logic.
◉ It has advantages over DL and RTL.
◉ Diode can perform AND and OR operation along with a transistor and output
signal can be amplified.
◉ It has logic inversion which is signal can be restored to full logic level, if we
add a transistor at output of logic gates.
◉ OR operation can be performed using diodes instead of resistors which
removes interaction between input signals.
◉ Since input resistor to transistor, switching speed of transistor is limited. DTL
was used in tube computers.

187
Transistor - Transistor Logic (TTL)
◉ Transistors are used to implement logic and Bipolar transistors to contract
integrated circuits. There are standard TTL, high speed TTL, low power TTL,
and schottky TTL. It is popular logic family.
Emitter Coupled Logic (ECL)
◉ ECL is a non-structured logic. Advantages of this logic are speed, and very
low propagation delay.
Complementary Metal Oxide Semiconductor Logic (CMOS)
◉ It is known for high fan-out, low power consumption and most reliable logic
family.
◉ CMOS technology is used in micro processors, micro controllers, static RAM
and other digital logic circuits.

188
 Multiplexers

◉ A multiplexer is a combinational circuit that has 2n input lines and a single

output line.
◉ The binary information is received from the input lines and directed to the
output line

189
There are various types of Multiplexers:
◉ 2 X 1 Multiplexer
◉ 4 X 1 Multiplexer
◉ 8 X 1 Multiplexer
◉ 16 X 1 Multiplexer

190
 4×1 Multiplexer
◉ In the 4×1 multiplexer, there is a total of
four inputs, i.e., A0, A1, A2, and A3, 2 selection lines, i.e., S0 and S1 and
single output, i.e., Y.
◉ On the basis of the combination of inputs that are present at the selection lines
S0 and S1, one of these 4 inputs are connected to the output.

The logical expression of the term Y is as

follows:

Y=S1' S0' A0+S1' S0 A1+S1 S0' A2+S1 S0 A3

191
◉ The logical expression of the term Y is as follows:
Y=S1' S0' A0+S1' S0 A1+S1 S0' A2+S1 S0 A3

192
 8 to 1 Multiplexer
◉ In the 8 to 1 multiplexer, there are total eight inputs, i.e., A 0, A1, A2, A3, A4, A5, A6, and A7, 3
selection lines, i.e., S0, S1and S2 and single output, i.e. Y

Y=S0'.S1'.S2'.A0+S0.S1'.S2'.A1+S0'.S1.S2'.A2+S0.S1.S2'.A3+S0'.S1'.S2 A4+S0.S1'.S2.A5+S0'.S1.S2.A6+S0.S1.S3.A7

193
194
 2 X 1 Multiplexer

◉ In 2×1 multiplexer, there are only two inputs,

i.e., A0 and A1,
1 selection line, i.e., S0 and
single outputs, i.e., Y.
◉ On the basis of the combination of inputs which are present at the
selection line S0, one of these 2 inputs will be connected to the output.

195
 Demultiplexers
◉ De-Multiplexer is a combinational circuit that performs the reverse
operation of Multiplexer.
◉ It has single input, ‘n’ selection lines and maximum of 2n outputs.
◉ The input will be connected to one of these outputs based on the values of
selection lines.
◉ Since there are ‘n’ selection lines, there will be 2n possible combinations of
zeros and ones.
◉ So, each combination can select only one
output.
De-Multiplexer is also called as De-Mux.

196
 1×2 De-multiplexer

◉ In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y0, and Y1, 1
selection lines, i.e., S0, and single input, i.e., A. On the basis of the
selection value, the input will be connected to one of the outputs. The
block diagram and the truth table of the 1×2 multiplexer are given below.

197
198
 1×4 De-multiplexer

◉ In 1 to 4 De-multiplexer, there are total of four outputs, i.e., Y0, Y1, Y2,
and Y3, 2 selection lines, i.e., S0 and S1 and single input, i.e., A. On the
basis of the combination of inputs which are present at the selection
lines S0 and S1, the input be connected to one of the outputs.

199
200
 Decoders

◉ A Decoder can be described as a combinational circuit that converts binary

information from the 'n' coded inputs to a maximum of 2n different outputs.
◉ The most preferred or commonly used decoders are n-to-m decoders,
where m<= 2n.
◉ An n-to-m decoder has n inputs and m outputs and is also referred to as an
n * m decoder.

201
◉ The following image shows a 3-to-8 line decoder

202
◉ Let us consider an example of 2-to-4 line NAND Gate Decoder which uses
NAND Gates instead of AND gate in the central logic.

203
 Decoder Expansion

◉ It is also possible to combine two or more decoders to form a large decoder

whenever needed. For instance, we can construct a 3 * 8 decoder by combining two 2
*4 decoders.
◉ The following image shows a 3 * 8 decoder constructed with two 2 * 4 decoders.

204
 Encoders

◉ An encoder can also be described as a combinational circuit that performs

the inverse operation of a decoder.
◉ An encoder has a maximum of 2^n (or less) input lines and n output lines.
◉ In an Encoder, the output lines generate the binary code corresponding to
the input value.

205
◉ The most common application of an encoder is the Octal-to-
Binary encoder. Octal to binary encoder takes eight input lines and
generates three output lines.

206
207
Chapter 4
Computer Arithmetic

208
 Introduction
◉ Data is manipulated by using the arithmetic instructions in digital computers.
◉ The Addition, subtraction, multiplication and division are the four basic arithmetic
operations
◉ The arithmetic instructions are performed generally on binary or decimal data.
◉ Fixed-point numbers are used to represent integers or fractions. We can have
signed or unsigned negative numbers
◉ A processor has an arithmetic processor(as a sub part of it) that executes arithmetic
operations.
◉ The data type, assumed to reside in processor, registers during the execution of an
arithmetic instruction.
◉ Negative numbers may be in a signed magnitude or signed complement
representation.
◉ There are three ways of representing negative fixed point - binary numbers signed
magnitude, signed 1’s complement or signed 2’s complement.
209
 Addition and Subtraction

◉ Negative fixed point binary numbers can be represented as

1. Signed Magnitude representation
2. Signed- 1’s Complement
3. Signed- 2’s Complement

210
 magnitude representation
◉ We designate the magnitude of the two numbers by A and B
◉ Where the signed numbers are added or subtracted, we find that there are eight
different conditions to consider, depending on the sign of the numbers and the
operation performed.

211
The two signs A, and B, are
compared by an exclusive-OR
gate. If the output of the gate
is 0 the signs are identical; If it
is 1, the signs are different.

212
 Multiplication Algorithm

◉ Multiplication of two fixed point binary number in signed magnitude

representation is done with process of successive shift and add operation.

In the multiplication process we are considering

successive bits of the multiplier, least significant bit
first.
If the multiplier bit is 1, the multiplicand is copied down
else 0’s are copied down.

The numbers copied down in successive lines are

shifted one position to the left from the previous
number.
Finally numbers are added and their sum form the
product.

213
 Booth’s algorithm
◉ Booth algorithm gives a procedure for multiplying binary integers in signed- 2’s
complement representation.
◉ It operates on the fact that strings of 0’s in the multiplier require no addition but just
shifting, and a string of 1’s in the multiplier from bit weight 2k to weight 2m can be
treated as 2k+1 – 2 m.
◉ For example, the binary number 001110 (+14) has a string 1’s from 23 to 21 (k=3,
m=1).
◉ The number can be represented as 2k+1 – 2 m. = 24 – 2 1 = 16 – 2 = 14. Therefore, the
multiplication M X 14, where M is the multiplicand and 14 the multiplier, can be done
as M X 24 – M X 21 .
◉ Thus the product can be obtained by shifting the binary multiplicand M four times to
the left and subtracting M shifted left once.

214
215
216
217
218
 Division Algorithms

◉ Division of two fixed-point binary numbers in signed magnitude

representation is performed with paper and pencil by a process of successive
compare, shift and subtract operations
◉ Binary division is much simpler than decimal division because here the
quotient digits are either 0 or 1

219
220
Floating point arithmetic

221
 Floating point arithmetic operations

◉ There are two part of a floating-point number in a computer - a mantissa m and an

exponent e.
◉ The two parts represent a number generated from multiplying m times a radix r
raised to the value of e.
m x re
◉ The mantissa may be a fraction or an integer.
◉ The position of the radix point and the value of the radix r are not included in the
registers
◉ For example, assume a fraction representation and a radix 10. The decimal number
537.25 is represented in a register with m = 53725 and e = 3 and is interpreted to
represent the floating-point number
■ .53725 x 103

222
 Numbers

◉ During addition or subtraction, the two floating-point operands are kept in

AC and BR.
◉ The sum or difference is formed in the AC.
◉ The algorithm can be divided into four consecutive parts:
1. Check for zeros.
2. Align the mantissas.
3. Add or subtract the mantissas
4. Normalize the result

223
224
Floating point Multiplication

225
 Floating point Multiplication
◉ The multiplication of two floating-point numbers requires
that we multiply the mantissas and add the exponents.
◉ No comparison of exponents or alignment of mantissas
is necessary. The multiplication of the mantissas
is performed in the same way as in fixed-point to provide
a double-precision product.
◉ The multiplication algorithm can be subdivided
into four parts:
1. Check for zeros.
2. Add the exponents.
3. Multiply the mantissas.
4. Normalize the product.
226
Floating point Division

227
 Floating point division
◉ Floating-point division requires that the exponents be subtracted and the mantissas
divided.
◉ The mantissa division is done as in fixed-point except that the dividend has a single-
precision mantissa that is placed in the AC.
◉ Remember that the mantissa dividend is a fraction and not an integer.
◉ For integer representation, a single-precision dividend must be placed in register Q
and register A must be cleared.
◉ The division algorithm can be subdivided into five parts:
1. Check for zeros.
2. Initialize registers and evaluate the sign.
3. Align the dividend.
4. Subtract the exponents.
5. Divide the mantissas.
228
 Decimal Arithmetic Unit

◉ A CPU with an arithmetic logic unit can perform arithmetic microoperations

with binary data.
◉ To perform arithmetic operations with decimal data, it is necessary to
convert the input decimal numbers to binary, to perform all calculations with
binary numbers, and to convert the results into decimal.
BCD Adder :

229
230
BCD Multiplication

231
 Decimal Division

◉ In the restoring division method, the divisor

is subtracted from the dividend or partial remainder
as many times as necessary until a negative
remainder results.
◉ The correct remainder is then restored by
adding the divisor

232
AND TABLES TO COMPARE DATA

A B C

Yellow 10 20 7

Blue 30 15 10

Orange 5 24 16

233
 MAPS

our office

234
89,526,12
4
Whoa! That’s a big number, aren’t you proud?

235
89,526,124$
That’s a lot of money

185,244 users
And a lot of users

100%
Total success!

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 OUR PROCESS IS EASY

first second last

237
 LET’S REVIEW SOME CONCEPTS

Yellow Blue Red

Is the color of gold, butter and ripe Is the colour of the clear sky and Is the color of blood, and because
lemons. In the spectrum of visible the deep sea. It is located between of this it has historically been
light, yellow is found between violet and green on the optical associated with sacrifice, danger
green and orange. spectrum. and courage.

Yellow Blue Red

Is the color of gold, butter and ripe Is the colour of the clear sky and Is the color of blood, and because
lemons. In the spectrum of visible the deep sea. It is located between of this it has historically been
light, yellow is found between violet and green on the optical associated with sacrifice, danger
green and orange. spectrum. and courage.

238
4000

3000

2000

1000

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MOBILE PROJECT
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THANKS
!
Any questions?
You can find me at
@username / [email protected]

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 CREDITS

Special thanks to all the people who made and

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 TIMELINE

Blue is the colour of the Red is the colour of Black is the color of ebony Yellow is the color of gold, White is the color of milk Blue is the colour of the
clear sky and the deep sea danger and courage and of outer space butter and ripe lemons and fresh snow clear sky and the deep sea

JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC

Yellow is the color of gold, White is the color of milk Blue is the colour of the Red is the colour of Black is the color of ebony Yellow is the color of
butter and ripe lemons and fresh snow clear sky and the deep sea danger and courage and of outer space gold, butter and ripe
lemons

247
 ROADMAP
Blue is the colour of the Red is the colour of danger Black is the color of ebony
clear sky and the deep sea and courage and of outer space

1 3 5

2 4 6

Yellow is the color of gold, White is the color of milk Blue is the colour of the
butter and ripe lemons and fresh snow clear sky and the deep sea

248
 GANTT CHART
Week 1 Week 2

1 2 3 4 5 6 7 8 9 10 11 12 13 14

Task 1

Task 2 ◆

Task 3

Task 4 ◆

Task 5 ◆

Task 6

Task 7

Task 8

249
 SWOT ANALYSIS
STRENGTHS WEAKNESSES
Blue is the colour of the clear Yellow is the color of gold,
sky and the deep sea butter and ripe lemons

Black is the color of ebony White is the color of milk and

and of outer space fresh snow
OPPORTUNITIES THREATS

250
 BUSINESS MODEL CANVAS

Key Partners Key Activities Value Propositions Customer Relationships Customer Segments
Insert your content Insert your content Insert your content Insert your content Insert your content

Key Resources Channels

Insert your content Insert your content

Cost Structure Revenue Streams

Insert your content Insert your content

251
 FUNNEL

AWARENESS Insert your content

DISCOVERY Insert your content

EVALUATION Insert your content

INTENT Insert your content

PURCHASE Insert your content

LOYALTY Insert your content

252
 TEAM PRESENTATION

Imani Jackson Marcos Galán Ixchel Valdía Nils Årud

JOB TITLE JOB TITLE JOB TITLE JOB TITLE
Blue is the colour of the clear Blue is the colour of the clear Blue is the colour of the clear Blue is the colour of the clear
sky and the deep sea sky and the deep sea sky and the deep sea sky and the deep sea

253
 COMPETITOR MATRIX
HIGH VALUE 2

Competitor
Compe
titor
Our company

Competitor

HIGH VALUE 1
LOW VALUE 1

Competitor

Competitor Competitor

LOW VALUE 2

254
 WEEKLY PLANNER
SUNDAY MONDAY TUESDAY WEDNESDAY THURSDAY FRIDAY SATURDAY

9:00 - 9:45 Task Task Task Task Task Task Task

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15:30 - 16:15 Task Task Task Task Task Task Task

255
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