ogramming Counters

(Part 1)
(ITLCA3_12)

Week 7 SLIDE

BY

DR GU NNACHI
2024 Block 1

Faculty of ICT
Department of Computer Systems Engineering
 LEARNING OBJECTIVES:

On completion of this lecture, you should be

able to:

• List and describe the functions of PLC counter

instructions

• Describe the operating principle of a transitional, or

one-shot, contact

• Analyze and interpret typical PLC counter ladder logic

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programs Department of Computer Systems Engineering
 LEARNING OBJECTIVES:

On completion of this lecture, you should be

able to:

• Describe PLC timer instruction and differentiate

between a non-retentive and retentive timer

• Analyze and interpret typical PLC timer ladder

logic programs
• Program the control of outputs using the timer
instruction control bits

Faculty of ICT
Department of Computer Systems Engineering
 Counter Instructions

• Programmed counters can serve the same function as

mechanical counters.

• Figure 8-1 shows the construction of a simple

mechanical counter.

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Department of Computer Systems Engineering
Every time the actuating lever is moved over, the counter adds one
 Counter Instructions
• All PLC manufacturers offer some form of counter
instruction as part of their instruction set.
• One common counter application is keeping track of the
number of items moving past a given point as
illustrated in Figure 8-3.
• Counters are similar to timers except that they do not
operate on an internal clock but are dependent on
external or program sources for counting.

Faculty of ICT
Department of Computer Systems Engineering
 Counter Instructions

• The two methods used to represent a counter within

a PLC’s ladder logic program are the coil format and
the block format.

• Figure 8-4 shows a typical coil-formatted up-counter

instruction.

• The up-counter increments its accumulated value by

1 each time the counter rung makes a false-to-true
transition.

• When the accumulated count equals the preset

count the counter output is energized or set to 1.

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Department of Computer Systems Engineering
 Counter Instructions
• The counter reset instruction must be used in conjunction with the
counter instruction. Up-counters are always reset to zero.

• Down-counters may be reset to zero or to some preset value. Some

manufacturers include the reset function as a part of the general
counter instruction, whereas others dedicate a separate instruction for
resetting the counter.

• Figure 8-5 shows a coil-formatted counter instruction with a separate

instruction for resetting the counter.

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• When programmed, the counter reset coilDepartment
(CTR)of Computer
is given the
Systems same
Engineering
reference address as the counter (CTU) that it is to reset. In this
 Counter Instructions
• The counter reset instruction must be used in conjunction with the
counter instruction. Up-counters are always reset to zero.

• Down-counters may be reset to zero or to some preset value. Some

manufacturers include the reset function as a part of the general
counter instruction, whereas others dedicate a separate instruction for
resetting the counter.

• Figure 8-5 shows a coil-formatted counter instruction with a separate

instruction for resetting the counter.

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• When programmed, the counter reset coilDepartment
(CTR)of Computer
is given the
Systems same
Engineering
reference address as the counter (CTU) that it is to reset. In this
 Counter Instructions
• Figure 8-6 shows a block-formatted counter.

• The instruction block indicates the type of counter (up or down), along
with the counter’s preset value and accumulated or current value.

• The counter has two input conditions associated with it, namely, the
count and reset.

• All PLC counters operate, or count, on the leading edge of the input
signal.

• The counter will either increment or decrement whenever the count

input transfers from an off state to an on state.

• The counter will not operate on the trailing edge, or on-to-off transition,
of the input condition.

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Department of Computer Systems Engineering
 Counter Instructions
• Some manufacturers require the reset rung or line to be true to reset
the counter, whereas others require it to be false to reset the counter.

• For this reason, it is wise to consult the PLC’s operations manual before
attempting any programming of counter circuits.

• PLC counters are normally retentive; that is, whatever count was
contained in the counter at the time of a processor shutdown will be
restored to the counter on power-up.

• The counter may be reset, however, if the reset condition is activated

at the time of power restoration.

• PLC counters can be designed to count up to a preset value or to count

down to a preset value.

• The up-counter is incremented by 1 each time the rung containing the

counter goes from false to true.

• The down-counter decrements by 1 each time the rung containing Faculty of ICT
the
counter is energized. Department of Computer Systems Engineering
 Counter Instructions
• Figure 8-7 illustrates the counting sequence of an up-
counter and a down-counter.

• The value indicated by the counter is termed the

accumulated value.

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Department of Computer Systems Engineering
 Up-Counter
• The up-counter is an output instruction whose
function is to increment its accumulated value on
false-to-true transitions of its instruction.

• It thus can be used to count false-to-true transitions

of an input instruction and then trigger an event after
a required number of counts or transitions.

• The up-counter output instruction will increment by 1

each time the counted event occurs.

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Department of Computer Systems Engineering
Up-Counter

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 Up-Counter
• The Allen-Bradley SLC 500 counter file is file 5 (Figure 8-9).

• Each counter is composed of three 16-bit words, collectively called

a counter element.

• These three data words are the control word, preset word, and
accumulated word.

• Each of the three data words shares the same base address,
which is the address of the counter itself.

• There can be up to 256 counter elements. Addresses for counter

file 5, counter element 3 (C5:3), are listed below.

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Up-Counter

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Up-Counter

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Up-Counter

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Up-Counter

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Down-Counter

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Down-Counter

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Down-Counter

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Down-Counter

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Tutorial-Combining Counters and Timers

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Department of Computer Systems Engineering
THANK YOU

Faculty of ICT
Department of Computer Systems Engineering