Computer Arithmetic

Nizamettin AYDIN
[email protected]
http://www.yildiz.edu.tr/~naydin
Arithmetic & Logic Unit
• Does the calculations
• Everything else in the computer is there to
service this unit
• Handles integers
• May handle floating point (real) numbers
• May be separate FPU (maths co-
processor)
• May be on chip separate FPU (486DX +)

2
ALU Inputs and Outputs

3
Integer Representation
• Only have 0 & 1 to represent everything
• Positive numbers stored in binary
—e.g. 41=00101001
• No minus sign
• No period
• Sign-Magnitude
• Two’s complement

4
Sign-Magnitude

• Left most bit is sign bit

• 0 means positive
• 1 means negative  n 2 i
• +18 = 00010010 
  2 ai if an  1 0
A  i n0 2
• -18 = 10010010   2i ai if an  1 0

 i 0
• Problems
—Need to consider both
sign and magnitude in
arithmetic
—Two representations of
zero (+0 and -0)

5
Two’s Complement
• +3 = 00000011
• +2 = 00000010
• +1 = 00000001
• +0 = 00000000
• -1 = 11111111
• -2 = 11111110
• -3 = 11111101 n 2
 2 n 1
an  1   2 ai
i

i 0

6
Characteristics of Twos Complement
Representation
and Arithmetic

7
Benefits
• One representation of zero
• Arithmetic works easily (see later)
• Negating is fairly easy
—3 = 00000011
—Boolean complement gives 11111100
—Add 1 to LSB 11111101

8
Negation Special Case 1
• 0= 00000000
• Bitwise not 11111111
• Add 1 to LSB +1
• Result 1 00000000
• Overflow is ignored, so:
• -0=0

9
Negation Special Case 2
• -128 = 10000000
• bitwise not 01111111
• Add 1 to LSB +1
• Result 10000000
• So:
• -(-128) = -128 X
• Monitor MSB (sign bit)
• It should change during negation

10
Range of Numbers
• 8 bit 2s complement
—+127 = 01111111 = 27 -1
— -128 = 10000000 = -27
• 16 bit 2s complement
—+32767 = 011111111 11111111 = 215 - 1
— -32768 = 100000000 00000000 = -215

11
Conversion Between Lengths
• Positive number pack with leading zeros
• +18 = 00010010
• +18 = 00000000 00010010
• Negative numbers pack with leading ones
• -18 = 10010010
• -18 = 11111111 10010010
• i.e. pack with MSB (sign bit)

12
Fixed-Point Representation
• Number representation discussed so far
also referred as fixed point.
—Because the radix point (binary point) is fixed
and assumed to be to the right of the
rightmost digit (least significant digit).

13
Integer Arithmetic
• Negation:
—In sign magnitude, simply invert the sign bit.
—In twos complement:
– Apply twos complement operation (take bitwise
complement including sign bit, and add 1)

14
Addition and Subtraction
• Normal binary addition
• Monitor sign bit for overflow

• Take twos complement of subtrahend and

add to minuend
—i.e. a - b = a + (-b)

• So we only need addition and complement

circuits

15
Addition and Subtraction
• Overflow rule
—If two numbers are added and they are both
positive or both negative, then overflow occurs
if and only if the result has the opposite sign

• Subtraction rule
—To subtract one number(subrahend) from
another (minuhend), take twos complement
(negation) of the subtrahend and add it to the
minuhend

16
Addition of Numbers
in Twos Complement Representation

17
Subtraction of Numbers in Twos Complement
Representation (M – S)

18
Hardware for Addition and Subtraction

19
Multiplication
• Complex
• Work out partial product for each digit
• Take care with place value (column)
• Add partial products

20
Multiplication Example
• 1011 Multiplicand (11 dec)
• x 1101 Multiplier (13 dec)
• 1011 Partial products
• 0000 Note: if multiplier bit is 1 copy
• 1011 multiplicand (place value)
• 1011 otherwise zero
• 10001111 Product (143 dec)
• Note: need double length result

21
Unsigned Binary Multiplication

22
Execution of Example

23
Flowchart for Unsigned Binary Multiplication

24
Multiplying Negative Numbers
• This does not work!
• Solution 1
—Convert to positive if required
—Multiply as above
—If signs were different, negate answer
• Solution 2
—Booth’s algorithm

25
Booth’s Algorithm

26
Example of Booth’s Algorithm

27
Division
• More complex than multiplication
• Negative numbers are really bad!
• Based on long division

28
Division of Unsigned Binary Integers

00001101 Quotient
Divisor 1011 10010011 Dividend
1011
Partial 001110
1011
Remainders
001111
1011
100 Remainder

29
Flowchart for Unsigned Binary Division

30
Example

31
Real Numbers
• Numbers with fractions
• Could be done in pure binary
—1001.1010 = 24 + 20 +2-1 + 2-3 =9.625
• Where is the binary point?
• Fixed?
—Very limited
• Moving?
—How do you show where it is?

32
• 123 000 000 000 000

1.23 X 1014

• 0.0000000000000123

1.23 X 10-14

33
Floating Point

• +/- .significand x 2exponent

• Misnomer
• Point is actually fixed between sign bit and body of
mantissa
• Exponent indicates place value (point position)

34
Floating Point Examples

35
Signs for Floating Point
• Mantissa is stored in 2s complement
• Exponent is in excess or biased notation
—e.g. Excess (bias) 128 means
—8 bit exponent field
—Pure value range 0-255
—Subtract 128 to get correct value
—Range -128 to +127

36
Normalization
• FP numbers are usually normalized
• i.e. exponent is adjusted so that leading
bit (MSB) of mantissa is 1
• Since it is always 1 there is no need to
store it
• (c.f. Scientific notation where numbers are
normalized to give a single digit before
the decimal point
• e.g. 3.123 x 103)

37
FP Ranges
• For a 32 bit number
—8 bit exponent
—+/- 2256  1.5 x 1077
• Accuracy
—The effect of changing lsb of mantissa
—23 bit mantissa 2-23  1.2 x 10-7
—About 6 decimal places

38
Expressible Numbers

39
Density of Floating Point Numbers

40
IEEE 754
• Standard for floating point storage
• 32 and 64 bit standards
• 8 and 11 bit exponent respectively
• Extended formats (both mantissa and
exponent) for intermediate results

41
IEEE 754 Formats

42
IEEE 754 Format Parameters

43
Interpretation of IEEE 754 Floating-Point
Numbers

44
Floating-Point Numbers and Arithmetic
Operations

45
 A floating-point operation may produce
one of these conditions:

• Exponent overflow:
— A positive exponent exceeds the maximum possible expo-nent
value. In some systems, this may be designated as +∞ or —∞.
• Exponent underflow:
— A negative exponent is less than the minimum possible
exponent value (e.g., —200 is less than —127). This means that
the number is too small to be represented, and it may be
reported as 0.
• Significand underflow:
— In the process of aligning significands, digits may flow off the
right end of the significand. Some form of rounding is required.
• Significand overflow:
— The addition of two significands of the same sign may result in
a carry out of the most significant bit. This can be fixed by
realignment.
46
FP Arithmetic +/-
• Check for zeros
• Align significands (adjusting exponents)
• Add or subtract significands
• Normalize result

47
FP Arithmetic +/- Phase 1
• Zero check

Because addition and subtraction are

identical except for a sign change, the
process begins by changing the sign of
the subtrahend if it is a subtract
operation. Next, if either operand is 0, the
other is reported as the result.

48
 FP Arithmetic +/- Phase 2
• Significand alignment
• Numbers needs to be manipulated so that the
two exponents are equal.
— To see the need for aligning exponents, consider the following
decimal addition:
— (123 x 100) + (456 x 10-2)
— Clearly, we cannot just add the significands. The digits must
first be set into equivalent positions, that is, the 4 of the second
number must be aligned with the 3 of the first. Under these
conditions, the two exponents will be equal,which is the
mathematical condition under which two numbers in this form
can be added. Thus,
— (123 x 100) + (456 x 10-2) = (123 x 100) + (4.56 x 100) =
127.56x100

49
FP Arithmetic +/- Phase 2
Alignment may be achieved by shifting either the
smaller number to the right (increasing its exponent) or
shifting the larger number to the left. Because either
operation may result in the loss of digits, it is the
smaller number that is shifted; any digits that are lost
are therefore of relatively small significance. The
alignment is achieved by repeatedly shifting the
magnitude portion of the significand right 1 digit and
incrementing the exponent until the two exponents are
equal. (Note that if the implied base is 16, a shift of 1
digit is a shift of 4 bits.) If this process results in a 0
value for the significand, then the other number is
reported as the result. Thus, if two numbers have
exponents that differ significantly, the lesser number is
lost.

50
FP Arithmetic +/- Phase 3
• Addition

The two significands are added together,

taking into account their signs. Because
the signs may differ, the result may be 0.
There is also the possibility of significand
overflow by 1 digit. If so, the significand of
the result is shifted right and the exponent
is incremented. An exponent overflow
could occur as a result; this would be
reported and the operation halted.

51
FP Arithmetic +/- Phase 4
• Normalization

Normalization consists of shifting significand

digits left until the most significant digit (bit,
or 4 bits for base-16 exponent) is nonzero.
Each shift causes a decrement of the
exponent and thus could cause an exponent
underflow. Finally, the result must be
rounded off and then reported. We defer a
discussion of rounding until after a discussion
of multiplication and division.

52
FP Addition & Subtraction Flowchart

53
FP Arithmetic x/
• Check for zero
• Add/subtract exponents
• Multiply/divide significands (watch sign)
• Normalize
• Round
• All intermediate results should be in
double length storage

54
Floating Point Multiplication

55
Floating Point Division

56