Department of Computer Science

Microprocessor and Assembly Language

Programming

Chapter 1
Introduction to Microprocessor
Organized by: Samuel M.
 Course covers
CHAPTER 1- INTRODUCTION
Microprocessor and computer
The Microprocessor and its Architecture
CHAPTER 2- MICROPROCESSOR AND ITS FUNCTION
Modern Microprocess components and its function’s.
Basic Execution Unite and Bus Interface
CHAPTER 3- Microprocessor MEMORY
ORGANAZATION
Introduction
Main memory
Microprocessor on-chip memory management unit and cache
 Course covers
CHAPTER 4: NUMBERING SYSEM
Computer data representation
Number conversation between binary to decimal
Number conversation between binary to octal
Number conversation between binary to hexadecimal
CHAPTER 5- BASICS OF ASSEMBLY LANGUAGES
Machine language Directives
Instruction operands Creating a program
Basic instructions First Compiler dependencies
CHAPTER 6: CPU INTERRUPT
Interrupt
Procedures and Functions
 Assessment Overview
 25%- Mid Term
 25%- Sectional Marks (Assignment, Class attendance and
participation)
 50%- Final Term
 Student with class absence >=20% will not seat for final
exam of this course
 Student with uncompleted assessment before final the
exam date will not fit to seat for final exam this course
Introduction to
Microprocessor
What is Microprocessors?
 The brain or engine of the PC is the processor
(sometimes called microprocessor), or central processing
unit (CPU).
 Integrated circuit that contains the entire central
processing unit of a computer on a single chip.
 A microprocessor (uP) is a computer that is fabricated on
an integrated circuit (IC).
 What the Cpu Perform ?
 The CPU performs the system’s calculating and
processing.

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 THE MICROPROCESSOR BASED
PERSONAL COMPUTER SYSTEM …

The block diagram of a microprocessor-based computer system (the

CPU is the microprocessor)

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 CPU… 8

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CHAPTER 2 Organized by Samuel M.
9
 Data bus - carries the data between the processor and
other components.
 Address bus - carries memory addresses from the
processor to other components such as primary storage
and input/output devices. The address bus is unidirectional
 Control bus - carries control signals from the processor to
other components.
Microprocessors can be characterized
based on What?
 The word size(data handling capacity )
 8 bit, 16 bit, 32 bit, 64 bit, etc. processors
 Instruction set structure
 RISC (Reduced Instruction Set Computer)
 CISC (Complex Instruction Set Computer)
 Functions
 General purpose, special purpose such image processing, floating point
calculations
 Memory organization
 Von-Neumann architecture
 Stores data and instruction
 Harvard architecture
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Basic Terms used in Microprocessor
 Bus
 Set of conductors intended to transmit data, address or control
information to different elements in a microprocessor.
 A microprocessor will have three types of buses: data bus, address bus, and
control bus.
 IPC (Instructions Per Cycle)
 It is a measure of how many instructions a CPU is capable of
executing in a single clock.
 Clock Speed
 It is the number of operations per second the processor can perform.
 It can be expressed in megahertz (MHz) or gigahertz (GHz).
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 Basic Terms used in Microprocessor
 Bandwidth
 The number of bits processed in a single instruction is called
Bandwidth.
 Data Types
 The microprocessor supports multiple data type formats like binary,
ASCII, signed and unsigned numbers.

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 Features of a Microprocessor
 Cost-effective: The microprocessor chips are available at low
prices and results its low cost.
 Size: The microprocessor is of small size chip, hence is portable.
 Low Power Consumption: Microprocessors are manufactured by
using metal-oxide semiconductor technology, which has low power
consumption.
 Versatility: The microprocessors are versatile as we can use the
same chip in a number of applications by configuring SW program.
 Reliability: The failure rate of an IC in microprocessors is very
low, hence it is reliable
 Portable - Due to the small size and low power consumption
microprocessors are portable. 14
 CHAPTER 2
MICROPROCESSOR PARTS
AND
FUNCTION
Processor System Architecture
The typical processor system consists of:
 CPU (central processing unit)
ALU (arithmetic-logic unit)
 Control Logic
 Registers, etc…
 Memory
 Input / Output interfaces
Interconnections between these units:
 Address Bus Data Bus

 Control Bus
The CPU Internal Structure
The internal architecture of the 8085 CPU is capable of performing the
following operations:

 Store up to 32-bit data (Registers, Accumulator)

 Perform arithmetic and logic operations (ALU)

 Test for conditions (IF / THEN)

 Sequence the execution of instructions

 Store temporary data in RAM during execution

 Microprocess Specifications
 Microprocessor is made-up high-performance metal
oxide sumi conductor - HMOS
 Are packaged in DIP (Dual In-Line Packages)
 It has 8-bit data has 8-bit data bus (AD0 -AD7).
 Draws a maximum supply current of 340 mA.
 Both microprocessors operates in ambient temperature
between 0oC and 70oC.
 Microprocessor contain about 29000 transistors
 Packaged in 40 PIN dual-in-package
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8086/88 Device Specifications

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 Architecture Diagram

Microprocessor Interrupts 20
 Architecture Diagram
 The internal architecture of 8086 is internally decided into
two functional units:
 Bus Interface Unit(BIU)
 Execution Unit

 These functional units can work simultaneously to increase

the system speed & hence the throughput.
 Throughput is the measure of instruction executed per unit
time.
 The major reason for this separation is to increase the
processing speed of the processor
 The BIU has to interact with memory and input & output
devices in fetching the instructions & data required by EU

Microprocessor Interrupts 21
 Basic Interface Unit - BIU

 The BIU is the 8086's interface to the outside world.

 It provides a full 16-bit bi-directional data bus & 20-bit
address bus.
 The BIU is responsible for performing all external bus
operations, as listed below.
 8086 microprocessor architecture divided in two parts first is
execution unit (EU) and second is bus interface unit (BIU).

Microprocessor Interrupts 22
Bus Interface Unit(BIU)

Functions of Bus Interface Unit

 It sends address of memory or I/O
 It fetches instruction from memory.
 It reads data from port/memory.
 It writes data into port/memory.
 It supports instruction queueing.
 It provides the address relocation facility.

To implement these functions the BIU contains, the

instruction queue, segment registers instruction pointer.
address summer and bus control logic.

Microprocessor Interrupts 23
 Bus Interface Unit(BIU)
•Segment register − BIU has 4 segment buses.
•It holds the addresses of instructions and data in memory, which are
used by the processor to access memory locations.
•It also contains 1 pointer register IP, which holds the address of the next
instruction to executed by the EU.
• CS − It stands for Code Segment. It is used for addressing a
memory location in the code segment of the memory, where the
executable program is stored.
• DS − It stands for Data Segment. It consists of data used by the
program and accessed in the data segment by an offset address
or the content of other register that holds the offset address.
• SS − It stands for Stack Segment. It handles memory to store data
and addresses during execution.
• ES − It stands for Extra Segment. ES is additional data segment,
which is used by the string to hold the extra destination data.
•Instruction pointer − It is a 16-bit register used to hold the address of
the next instruction to be executed.
Microprocessor Interrupts 24
 Architecture Diagram

 The Execution Unit (EU)

has
 Control unit
 Instruction decoder
 Arithmetic & Logical Unit (ALU)
 General registers
 Flag register
 Pointers
 Index registers

 The BIU has

 Instruction stream byte queue
 A set of segment registers
 Instruction pointer

Microprocessor Interrupts 25
 Execution Unit - Registers
▶ General registers are used for temporary
storage and manipulation of data and
instructions
▶ Accumulator register consists of two 8- bit

registers AL and AH, which can be

combined together and used as a 16-bit
register AX
▶ Accumulator can be used for I/O operations

and string manipulation

Microprocessor Interrupts 26
 Execution Unit - Registers
▶ Base register consists of two 8-bit registers BL
and BH, which can be combined together and
used as a 16-bit register BX
▶ BX register usually contains a data pointer used
for based, based indexed or register indirect
addressing
▶ Count register consists of two 8-bit registers CL
and CH, which can be combined together and
used as a 16-bit register CX
▶ Count register can be used as a counter in string
manipulation and shift/rotate instructions

Microprocessor Interrupts 27
 Execution Unit - Registers
▶ Data register consists of two 8-bit registers
DL and DH, which can be combined
together and used as a 16-bit register DX
▶ Data register can be used as a port number

in I/O operations
▶ In integer 32-bit multiply and divide

instruction the DX register contains high-

order word of the initial or resulting number

Microprocessor Interrupts 28
 Execution Unit (EU): Flag
Auxiliary Carry Flag
Carry Flag
This is set, if there is a carry from the lowest
nibble, i.e, bit three during addition, or borrow This flag is set, when there is a carry
for the lowest nibble, i.e, bit three, during out of MSB in case of addition or a
subtraction. borrow in case of subtraction.

Sign Flag Zero Flag Parity Flag

This flag is set, when the result of This flag is set, if the result of the This flag is set to 1, if the lower byte of the
any computation is negative computation or comparison performed result contains even number of 1’s ; for
by an instruction is zero odd number of 1’s set to zero.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

OF DF IF TF SF ZF AF PF CF

Tarp Flag
Over flow Flag If this flag is set, the processor enters
This flag is set, if an overflow occurs, i.e, if the result of a signed operation is large
the single step execution mode by
enough to accommodate in a destination register. The result is of more than 7-bits
in size in case of 8-bit signed operation and more than 15-bits in size in case of 16-
generating internal interrupts after the
bit sign operations, then the overflow will be set. execution of each instruction

Interrupt Flag
Direction Flag
This is used by string manipulation instructions. If this flag bit is ‘0’, the string
is processed beginning from the lowest address to the highest address, i.e., Causes the 8086 to recognize external mask
auto incrementing mode. Otherwise, the string is processed from the highest interrupts; clearing IF disables these
address towards the lowest address, i.e., auto incrementing mode. interrupts. 2
Microprocessor Interrupts 29 9
 Execution Unit - Flags
▶ Overflow Flag (OF) - set if the result is too
large positive number, or is too small negative
number to fit into destination operand
▶ Direction Flag (DF) - if set then string
manipulation instructions will auto-decrement
index registers. If cleared then the index
registers will be auto-incremented
▶ Interrupt-enable Flag (IF) - setting this bit
enables maskable interrupts
▶ Single-step Flag (TF) - if set then single-step
interrupt will occur after the next instruction

Microprocessor Interrupts 30
 Execution Unit - Flags

▶ Sign Flag (SF) - set if the most significant bit

of the result is set.
▶ Zero Flag (ZF) - set if the result is zero.
▶ Auxiliary carry Flag (AF) - set if there was a
carry from or borrow to bits 0-3 in the AL
register.
▶ Parity Flag (PF) - set if parity (the number of
"1" bits) in the low-order byte of the result is
even.
▶ Carry Flag (CF) - set if there was a carry from
or borrow to the most significant bit during
last result calculation
Microprocessor Interrupts 31
 Execution Unit - Flags

Microprocessor Interrupts 32
 Execution Unit - Pointers
▶ Stack Pointer (SP) is a 16-bit register pointing to program
stack
▶ Base Pointer (BP) is a 16-bit register pointing to data in
stack segment. BP register is usually used for based, based
indexed or register indirect addressing.
▶ Source Index (SI) is a 16-bit register. SI is used for
indexed, based indexed and register indirect addressing,
as well as a source data addresses in string manipulation
instructions.
▶ Destination Index (DI) is a 16-bit register. DI is used for
indexed, based indexed and register indirect addressing,
as well as a destination data addresses in string
manipulation instructions.

Microprocessor Interrupts 33
 Chapter 3

MICROPROCESSOR
MEMORY ORGANIZATION
Microprocessor Interrupts 34
 Outline

 Introduction
 Main memory
 Microprocessor on-chip memory management
unit and cache

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 Introduction

Von Neumann Architecture

•Description: Single memory for both instructions and
data
•Advantages: Simple and easy to implement
•Disadvantages: Potential bottlenecks due to
simultaneous access
Harvard Architecture
•Description: Separate memories for instructions
and data
•Advantages: Allows parallel access, improving
performance
•Disadvantages: More complex and hardware- 3
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intensive
 Introduction

A memory unit :hold instructions and data.

Memory system can be divided into three groups:
1.Microprocessor memory: set of microprocessor
registers, used to hold temporary results
2. Primary or main memory: storage
area in which all
programs are executed, include ROM & RAM
3. Secondary memory: devices such as
hard disks, also called virtual memory.
The microcomputer cannot execute programs stored in
the secondary memory directly, so to execute these
programs the microcomputer must transfer them to
its main memory by the operating system.
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 Introduction

L0:
Smaller, faster, registers
and more L1: on-chip L1
expensive (per cache (SRAM)
byte) storage off-chip L2
L2:
devices cache (SRAM)

L3: main memory

(DRAM)
Larger, slower,
and cheaper
local secondary storage (virtual memory)
(per byte)
storage L4:
(local disks)
devices

L5: remote secondary storage

(tapes, distributed file systems, Web servers)

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 Main memory

 An important characteristic of a
memory is whether it is
volatile or nonvolatile.
 The contents of a volatile memory are
lost when the power is turned off.
 RAM is a volatile memory.
 A nonvolatile memory retains its contents after
power is
switched off.
 ROM is a typical example of nonvolatile memory.

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 Random-Access Memory

There are two types of RAM: Static RAM (SRAM), and

Dynamic
RAM (DRAM).

SRAM DRAM
stores data in flip-flops (on/off stores data in capacitors.
switches).
memory does not need to be it can hold data for a few
refreshed. milliseconds, need to be refreshed
have lower densities have higher densities

DRAMs are inexpensive, occupy less space, and dissipate less power than
SRAMs.

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 Random-Access Memory

Two enhanced versions of DRAM are:

 ED0 DRAM (Extended Data Output DRAM)
 SDRAM (Synchronous DRAM).
 The ED0 DRAM provides fast access by allowing
the DRAM controller to output the next address at
the same time the current data is being read.
 An SDRAM contains multiple DRAMs (typically,
four) internally. SDRAMs utilize the multiplexed
addressing of conventional DRAMs.

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 READ Timing Diagram

1.The microprocessor performs the instruction fetch

cycle to READ the opcode.
2. The microprocessor interprets the opcode as a
memory
READ operation.
3. When the clock signal goes HIGH, the
microprocessor
places the contents of MAR on the address A0-A19.
4. At the same time, the microprocessor raises the
READ
signal to HIGH.
5.The logic external to the microprocessor gets the
contents of the location in the main ROM/RAM
addressed by the MAR and places it on the Data
bus.
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6.Finally, the microprocessor gets this data from the
 WRITE Timing Diagram

Write timing
1.When the CLK signal goes HIGH, the microprocessor
places the contents of the MAR on the address A0-
A19 of the µp chip.
2.At the same time, the microprocessor raises the
WRITE pin signal to HIGH.
3.The microprocessor places data to be stored from the
contents of an internal register onto Data bus Do-
D15.
4.The logic external to the microprocessor stores the
data from the register into a RAM location addressed
by the MAR.

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 Memory Management Concepts

 Because access to a hard disk, system throughput

will be
reduced to unacceptable levels.
 An obvious solution is to use a large and
fast locally accessed semiconductor memory.
 Unfortunately, the storage cost per bit for this
solution is
very high.
 A combination of both off-board disk
(secondary memory) and on-board
semiconductor main memory must be designed
into a system.

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 Memory Management Concepts

Memory management unit (MMU):

a device, located between the microprocessor and
memory, control accesses,perform address
mappings, and act as interface between the
logical (programmer’s
memory) and physical (microprocessor’sdirectly
addressab memory) address spaces.

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 Memory Management Concepts

MMU address translation:

 It translates logical program addresses to physical
memory
address.
 Note that in assembly language programming,
addresses are referred to by symbolic names.
 These addresses in a program are called logical
addresses because they indicate the logical
positions of instructions and data.
The MMU can perform address translation in one of
two ways:
1. By using the substitution technique [Figure
3.10(a)].
4
2.By adding
Microprocess
Microprocessor an offset
and Assembly
Interrupts Language to each logical
49
46 address to 9
 Memory Management Concepts

MMU address translation:

MMU address translation:

 Address translation using the substitution technique
is the offset method.
faster than translation using
 However, the offset method has the advantage of
mapping a logical address to any physical
address as determined by the offset value.
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 Memory Management Concepts

MMU address translation:

 Memory is usually divided into small manageable
units:
page and segment.
 Paging divides the memory into equal sized
pages; segmentation divides the memory into
variable-sized segments.
 It is relatively easier to implement the address
translation table if the logical and main memory
spaces are divided into pages.

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 Memory Management Concepts

MMU address translation (mapping):

There are three ways to map logical addresses to
physical
addresses:
 Paging,
 Segmentation and
 Combined paging-segmentation.

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 Memory Management Concepts

The paging method

 The virtual memory system is managed by both
hardware
and software.
 The hardware included in the memory
management unit handles address translation.
 The memory management software in the operating
system performs all functions, including page
replacement policies to provide efficient memory
utilization.

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 Memory Management Concepts

The Segmentation method

 A MMU utilizes the segment selector to get a descriptor
from a
table in memory containing several descriptors.
 A descriptor contains the physical base address for a
segment,
the segment’s privilege level, and some control bits.
 When the MMU obtains a logical address from the
microprocessor, it first determines whether the
segment is already in physical memory.
 If it is, the MMU adds an offset component to the
segment base component of the address obtained
from the segment descriptor table to provide the
physical address. 5
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 Memory Management Concepts

The paged-segmentation method

 Each segment contains a number of pages.
 The logical address is divided into three
components: segment, page, and word.
 A page component of n bits can provide up to
2n pages.
 A segment can be assigned with one or more
pages up to maximum of 2n pages; therefore, a
segment size depends on the number of pages
assigned to it.

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 Memory Management Concepts

The Virtual memory

 Description: Uses more memory than physically
available
 Mechanism: Virtual address space mapped to
physical memory
 Advantage: Allows large applications to run
efficiently
 The key idea behind the virtual memory is to allow
a user program to address more locations than
those available in a physical memory.
 An address generated by a user program is called a
virtual
address
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 Cache Memory Organization

 A small, expensive, but fast memory b/n the

microprocessor & main memory.
 Typically, the access times of the cache and main
memories are 100 and 500 ns, respectively.
 A cache hit means : reference is found in the
cache,
 A cache miss means : reference is not found in the
cache,
 Purpose: Stores frequently used data and
instructions
 Levels: L1, L2, L3 cache
 Impact: Reduces access time and improves
performance
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 Cache Memory Organization

 The L 1 cache normally provides separate instruction and data

caches.
 The processor can access the L1 cache directly and the L2 cache
normally supplies instructions and data to the L1 cache.
 The L2 cache is usually accessed by the microprocessor only if L
1 misses
occur. This two-level cache memory enhances microprocessor
performance.

 The L 1 cache normally provides separate instruction and data

caches. The processor can access the L1 cache directly and the
L2 cache normally supplies instructions and data to the L1 cache.
 The L2 cache is usually accessed by the microprocessor only if L
1 misses occur. This two-level cache memory enhances
microprocessor performance.
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 Cache Memory Organization

 The relationship between the cache and

main memory blocks is established
using mapping techniques.

 Three widely used mapping techniques

are direct mapping, fully associative
mapping, and set- associative mapping.

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 Cache Memory Organization

Direct mapping,
 Direct mapping uses a RAM for the cache.
 The microprocessor’s 12-bit address is divided into two
fields, an index field and a tag field.
 Because the cache address is 8 bits wide (28 =
256), the low- order 8 bits of the microprocessor’s
address form the index field, and the remaining 4 bits
constitute the tag field.
 In general, if the main memory address field is m bits
wide and the cache memory address is n bits wide,
the index field will then require n bits and the tag
field will be (m - n )
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 Cache Memory Organization

Fully associative mapping

 The fastest and most expensive cache memory
 Each element in associative memory contains a main
memory address and its content (data).
 When the microprocessor generates a main memory
address, it is compared associatively (simultaneously)
with all addresses in the associative memory.
 If there is a match, the corresponding data word is
read from the associative cache memory and sent to
the microprocessor.
 If a miss occurs, the main memory is accessed
and the address and its corresponding data are
written to the associative cache memory.
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 Cache Memory Organization

Fully associative mapping

 When the microprocessor generates a main memory
address, it is compared associatively
(simultaneously) with all addresses in the
associative memory.
 If there is a match, the corresponding data word
is read from the associative cache memory and
sent to the microprocessor.
 If a miss occurs, the main memory is accessed
and the address and its corresponding data are
written to the associative cache memory.

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 Cache Memory Organization

Set-associative mapping.
a combination of direct and associative mapping.
 cache word stores two or more main memory
words using the same index address.
 Each main memory word consists of a tag and
its data word.
 An index with two or more tags and data words
forms a set

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 Cache Memory Organization

Set-associative mapping.
 When the microprocessor generates a memory
request, the index of the main memory address is
used as the cache address.
 The tag field of the main memory address is then
compared associatively (simultaneously) with all
tags stored under the index.
 If a match occurs, the desired dataword is read.
 If a match does not occur, the data word, along with
its tag, is read from main memory and written into
the cache

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 Cache Memory Organization

Set-associative mapping.
 The size of a set is defined by the number of tag and
data items in a cache word. A set size of 2 is used in
this example. Each index address contains two data
words and their associated tags. Each tag includes
4 bits, and each data word contains 16 bits.
Therefore, the word length = 2 x (4 + 16) = 40
bits. An index address of 8 bits can represent
256 words. Hence, the size of the cache memory is
256 x 40. It can store 512 main memory words

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 Cache Memory Organization

How to write on cache :

There are two ways of writing into cache: the write-
back and
write-through methods.

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 Cache Memory Organization

The write-back method

whenever the microprocessor writes something into a
cache word, a “dirty” bit is assigned to the cache
word. When a dirty word is to be replaced with a
new word, the dirty word is first copied into the main
memory before it is overwritten by the incoming new
word.
The advantage of this method is that it
avoids unnecessary writing into main
memory.

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 Cache Memory Organization

The write-through method,

 whenever the microprocessor alters a cache
address, the same alteration is made in the main
memory copy of the altered cache address.
 This policy is easily implemented and ensures
that the contents of the main memory are
always valid.
 This feature is desirable in a multiprocesssor
system, in which the main memory is shared by
several processors.

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 Cache Memory Organization

A valid bit used to ensures proper utilization of the

cache. It is an extra bit contains in the tag directory
When the power is turned on, the valid bit
corresponding to each cache block entry of the tag
directory is reset to zero. This is done to indicate that
the cache block holds invalid data.
When a block of data is transferred from the main
memory to a cache block, the valid bit corresponding
to this cache block is set to 1.

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 CHAPTER 4
MICROPROCESSOR
AND
ASSEMBLY LANGUAGE

Data Representation
 Outline
 Introduction
 Numbering Systems
 Binary & Hexadecimal Numbers
 Base Conversions
 Integer Storage Sizes
 Binary and Hexadecimal Addition
 Signed Integers and 2's Complement Notation
 Binary and Hexadecimal subtraction
 Carry and Overflow
 Character Storage

Microprocess and Assembly Language 68

 Introduction
 Computers only deal with binary data (0s and 1s), hence all data manipulated by
computers must be represented in binary format.
 Machine instructions manipulate many different forms of data:
 Numbers:
 Integers: 33, +128, -2827
 Real numbers: 1.33, +9.55609, -6.76E12, +4.33E-03
 Alphanumeric characters (letters, numbers, signs, control characters):
examples: A, a, c, 1 ,3, ", +, Ctrl, Shift, etc.
 Images (still or moving): Usually represented by numbers representing the
Red, Green and Blue (RGB) colors of each pixel in an image,
 Sounds: Numbers representing sound amplitudes sampled at a certain rate
(usually 20kHz).
 So, in general we have two major data types that need to be represented in
computers; numbers and characters.

Microprocess and Assembly Language 69

 Numbering Systems
 Numbering systems are characterized by their base number.
 In general, a numbering system with a base r will have r
different digits (including the 0) in its number set. These digits
will range from 0 to r-1
 The most widely used numbering systems are listed in the
table below:

Microprocess and Assembly Language 70

 Binary Numbers
 Each digit (bit) is either 1 or 0 1 1 1 1 1 1 1 1
 Each bit represents a power of 2 27 26 25 24 23 22 21 20

 Every binary number is a sum of powers of 2

Microprocess and Assembly Language 71

 Converting Binary to Decimal
 Weighted positional notation shows how to calculate
the decimal value of each binary bit:
Decimal = (dn-1  2n-1) + (dn-2  2n-2) + ... + (d1  21) + (d0 
20)
d = binary digit
 binary 10101001 = decimal 169:
(1  27) + (1  25) + (1  23) + (1  20) =
128+32+8+1=169

Microprocess and Assembly Language 72

 Convert Unsigned Decimal to Binary
 Repeatedly divide the decimal integer by 2.
 Each remainder is a binary digit in the translated value:

least significant bit

most significant bit

stop when
37 = 100101 quotient is zero

Microprocess and Assembly Language 73

 Another Procedure
Another Procedure for Converting from Decimal to Binary

 Start with a binary representation of all 0’s

 Determine the highest possible power of two that is less or
equal to the number.
 Put a 1 in the bit position corresponding to the highest power
of two found above.
 Subtract the highest power of two found above from the
number.
 Repeat the process for the remaining number

Microprocess and Assembly Language 74

 Another Procedure…
Another Procedure for Converting from Decimal to Binary
 Example: Converting 76 decimal to Binary
 The highest power of 2 less or equal to 76 is 64, hence the seventh
(MSB) bit is 1
 Subtracting 64 from 76 we get 12.
 The highest power of 2 less or equal to 12 is 8, hence the fourth bit
position is 1
 We subtract 8 from 12 and get 4.
 The highest power of 2 less or equal to 4 is 4, hence the third bit
position is 1
 Subtracting 4 from 4 yield a zero, hence all the left bits are set to 0 to
yield the final answer

Microprocess and Assembly Language 75

 Hexadecimal Integers
 Binary values are represented in hexadecimal.

Microprocess and Assembly Language 76

 Converting Binary to Hexadecimal
 Each hexadecimal digit corresponds to 4 binary bits.
 Example: Translate the binary integer
000101101010011110010100 to hexadecimal

 0001 → 1
 0110 → 6
 1010 → A
 0111 → 7
 1001 → 9
 0100 → 4
16A794.

Microprocess and Assembly Language 77

 Converting Hexadecimal to Binary
 Each Hexadecimal digit can be replaced by its 4-bit binary
number to form the binary equivalent.

M1021.swf

Microprocess and Assembly Language 78

 Converting Hexadecimal to Decimal
 Multiply each digit by its corresponding power of 16:
Decimal = (d3  163) + (d2  162) + (d1  161) + (d0  160)
d = hexadecimal digit
 Examples:
 Hex 1234 = (1  163) + (2  162) + (3  161) + (4  160) =
Decimal 4,660
 Hex 3BA4 = (3  163) + (11 * 162) + (10  161) + (4  160) =
Decimal 15,268

Microprocess and Assembly Language 79

 Converting Decimal to Hexadecimal
 Repeatedly divide the decimal integer by 16. Each
remainder is a hex digit in the translated value:

least significant digit

most significant digit

stop when
quotient is zero

Decimal 422 = 1A6 hexadecimal

Microprocess and Assembly Language 80

 Integer Storage Sizes
byte 8

word 16
Standard sizes:
doubleword 32
quadword 64

What is the largest unsigned integer that may be stored in 20 bits?

Microprocess and Assembly Language 81

 Binary Addition
 Start with the least significant bit (rightmost bit)
 Add each pair of bits
 Include the carry in the addition, if present

carry: 1

0 0 0 0 0 1 0 0 (4)

+ 0 0 0 0 0 1 1 1 (7)

0 0 0 0 1 0 1 1 (11)
bit position: 7 6 5 4 3 2 1 0

Microprocess and Assembly Language 82

 Hexadecimal Addition
 Divide the sum of two digits by the number base (16).
The quotient becomes the carry value, and the
remainder is the sum digit.
1 1
36 28 28 6A
42 45 58 4B
78 6D 80 B5

21 / 16 = 1, remainder 5

Important skill: Programmers frequently add and subtract the

addresses of variables and instructions.

Microprocess and Assembly Language 83

 Signed Integers
 Several ways to represent a signed number
 Sign-Magnitude
 1's complement
 2's complement
 Divide the range of values into 2 equal parts
 First part corresponds to the positive numbers (≥ 0)
 Second part correspond to the negative numbers (< 0)
 Focus will be on the 2's complement representation
 Has many advantages over other representations
 Used widely in processors to represent signed integers

Microprocess and Assembly Language 84

 Two's Complement Representation
 Positive numbers 8-bit Binary Unsigne Signed
value d value
 Signed value = Unsigned value value
 Negative numbers 00000000 0 0
00000001 1 +1
 Signed value = Unsigned value - 2n
00000010 2 +2
 n = number of bits
... ... ...
 Negative weight for MSB 01111110 126 +126
 Another way to obtain the signed 01111111 127 +127
value is to assign a negative weight
10000000 128 -128
to most-significant bit
10000001 129 -127
1 0 1 1 0 1 0 0 ... ... ...
-128 64 32 16 8 4 2 1 11111110 254 -2
= -128 + 32 + 16 + 4 = -76
11111111 255 -1

Microprocess and Assembly Language 85

 Forming the Two's Complement
starting value 00100100 = +36

step1: reverse the bits (1's complement) 11011011

step 2: add 1 to the value from step 1 + 1

sum = 2's complement representation 11011100 = -36

Sum of an integer and its 2's complement must be zero:

00100100 + 11011100 = 00000000 (8-bit sum)  Ignore Carry

 The easiest way to obtain the 2's complement of a binary number is

by starting at the LSB, leaving all the 0s unchanged, look for the first
occurrence of a 1.
 Leave this 1 unchanged and complement all the bits after it.

Microprocess and Assembly Language 86

 Sign Bit
Highest bit indicates the sign. 1 = negative, 0 = positive
sign bit

1 1 1 1 0 1 1 0
Negative

0 0 0 0 1 0 1 0 Positive

If highest digit of a hexadecimal is > 7, the value is negative

Examples: 8A and C5 are negative bytes
A21F and 9D03 are negative words
B1C42A00 is a negative double-word

Microprocess and Assembly Language 87

 Sign Extension
Step 1: Move the number into the lower-significant bits
Step 2: Fill all the remaining higher bits with the sign bit
 This will ensure that both magnitude and sign are correct
 Examples
 Sign-Extend 10110011 to 16 bits

10110011 = -77 11111111 10110011 = -77

 Sign-Extend 01100010 to 16 bits

01100010 = +98 00000000 01100010 = +98

 Infinite 0s can be added to the left of a positive number
 Infinite 1s can be added to the left of a negative number

Microprocess and Assembly Language 88

 Two's Complement of a Hexadecimal
 To form the two's complement of a hexadecimal
 Subtract each hexadecimal digit from 15
 Add 1

 Examples:
 2's complement of 6A3D = 95C3
 2's complement of 92F0 = 6D10
 2's complement of FFFF = 0001

 No need to convert hexadecimal to binary

Microprocess and Assembly Language 89

 Two's Complement of a Hexadecimal
 Start at the least significant digit, leaving all the 0s unchanged,
look for the first occurrence of a non-zero digit.
 Subtract this digit from 16.
 Then subtract all remaining digits from 15.
 Examples:
 2's complement of 6A3D = 95C3
 2's complement of 92F0 = 6D10 F F F 16 F F 16
- 6A3 D - 92 F0
 2's complement of FFFF = 0001 -------------- --------------
95C3 6D10

Microprocess and Assembly Language 90

 Binary Subtraction
 When subtracting A – B, convert B to its 2's complement
 Add A to (–B)
00001100 00001100
– +
00000010 11111110 (2's complement)

00001010 00001010 (same result)

 Carry is ignored, because
 Negative number is sign-extended with 1's
 You can imagine infinite 1's to the left of a negative number
 Adding the carry to the extended 1's produces extended zeros

Practice: Subtract 00100101 from 01101001.

Microprocess and Assembly Language 91

 Ranges of Signed Integers
The unsigned range is divided into two signed ranges for positive
and negative numbers

Practice: What is the range of signed values that may be stored

in 20 bits?

Microprocess and Assembly Language 92

 Carry and Overflow
 Carry is important when …
 Adding or subtracting unsigned integers
 Indicates that the unsigned sum is out of range
 Either < 0 or > maximum unsigned n-bit value
 Overflow is important when …
 Adding or subtracting signed integers
 Indicates that the signed sum is out of range
 Overflow occurs when
 Adding two positive numbers and the sum is negative
 Adding two negative numbers and the sum is positive
 Can happen because of the fixed number of sum bits

Microprocess and Assembly Language 93

 Carry and Overflow Examples
 We can have carry without overflow and vice-versa
 Four cases are possible
1 1 1 1 1 1

0 0 0 0 1 1 1 1 15 0 0 0 0 1 1 1 1 15
+ +
0 0 0 0 1 0 0 0 8 1 1 1 1 1 0 0 0 245 (-8)

0 0 0 1 0 1 1 1 23 0 0 0 0 0 1 1 1 7

Carry = 0 Overflow = 0 Carry = 1 Overflow = 0

1 1 1 1

0 1 0 0 1 1 1 1 79 1 1 0 1 1 0 1 0 218 (-38)
+ +
0 1 0 0 0 0 0 0 64 1 0 0 1 1 1 0 1 157 (-99)

1 0 0 0 1 1 1 1 143 0 1 1 1 0 1 1 1 119
(-113)
Carry = 0 Overflow = 1 Carry = 1 Overflow = 1

Microprocess and Assembly Language 94

 Parity Bit
 Data errors can occur during data transmission or
storage/retrieval.
 The 8th bit in the ASCII code is used for error checking.
 This bit is usually referred to as the parity bit.
 There are two ways for error checking:
 Even Parity: Where the 8th bit is set such that the total number of 1s in
the 8-bit code word is even.

 Odd Parity: The 8th bit is set such that the total number of 1s in the 8-
bit code word is odd.

Microprocess and Assembly Language 95

 Chapter 5

Basic Concepts
of
Assembly Language Programming

Organized by Samuel M.
 Some Important Questions to Ask
What is Assembly Language?
Why Learn Assembly Language?
What is Machine Language?
How is Assembly related to Machine
Language?
What is an Assembler?
How is Assembly related to High-Level
Language?
Is Assembly Language portable?

Microprocess and Assembly Language 97

 A Hierarchy of Languages

Microprocess and Assembly Language 98

 A Hierarchy of Languages

Microprocess and Assembly Language 99

 The Importance of Assembly Language

Microprocess and Assembly Language 10

0
 Assembly and Machine Language
 Machine language
 Native to a processor: executed directly by hardware
 Instructions consist of binary code: 1s and 0s
 Assembly language
 A programming language that uses symbolic names to represent
operations, registers and memory locations.
 Slightly higher-level language
 Readability of instructions is better than machine language
 One-to-one correspondence with machine language instructions
 Assemblers translate assembly to machine code
 Compilers translate high-level programs to machine code
 Either directly, or
 Indirectly via an assembler

Microprocess and Assembly Language 10

1
 Compiler and Assembler

Microprocess and Assembly Language 10

2
 Instructions and Machine Language
 Each command of a program is called an instruction (it instructs the
computer what to do).
 Computers only deal with binary data, hence the instructions must be
in binary format (0s and 1s) .
 The set of all instructions (in binary form) makes up the computer's
machine language. This is also referred to as the instruction set.

Microprocess and Assembly Language 10

3
 Instruction Fields
 Machine language instructions usually are made up of several
fields.
 Each field specifies different information for the computer .
The major two fields are:
 Opcode field which stands for operation code and it specifies
the particular operation that is to be performed.
 Each operation has its unique opcode.
 Operands fields which specify where to get the source &
destination operands for the operation specified by the
opcode.
 The source/destination of operands can be a constant, the memory or
one of the general-purpose registers.
Microprocess and Assembly Language 10
4
 Assembly vs. Machine Code

Microprocess and Assembly Language 10

5
 Translating Languages

English: D is assigned the sum of A times B plus 10.

High-Level Language: D = A * B + 10
A statement in a high-level language is translated
typically into several machine-level instructions

Intel Assembly Language Intel Machine Language:

mov eax, A A1 00404000
mul B F7 25 00404004
add eax, 10 83 C0 0A
mov D, eax A3 00404008
Microprocess and Assembly Language 10
6
 Mapping B/n Assembly Language and HLL
 Translating HLL programs to machine language programs is not a
one-to-one mapping
 A HLL instruction (usually called a statement) will be translated to
one or more ML instructions

Microprocess and Assembly Language 10

7
 Advantages of High-Level Languages
 Program development is faster
 High-level statements: fewer instructions to code
 Program maintenance is easier
 For the same above reasons
 Programs are portable
 Contain few machine-dependent details
 Can be used with little or no modifications on different machines
 Compiler translates to the target machine language
 However, Assembly language programs are not portable

Microprocess and Assembly Language 10

8
 Why Learn Assembly Language?
 Accessibility to system hardware
 Assembly Language is useful for implementing system software
 Also useful for small embedded system applications
 Space and Time efficiency
 Understanding sources of program inefficiency
 Tuning program performance
 Writing compact code
 Writing assembly programs gives the computer designer
deep understanding of the instruction set & how to design
 To be able to write compilers for HLLs, we need to be expert
with the machine language. Assembly programming
provides this experience
Microprocess and Assembly Language 10
9
 Assembly vs. High-Level Languages

Some representative types of applications:

Microprocess and Assembly Language 110

 Assembler
 Software tools are needed for editing, assembling, linking,
& debugging assembly language programs
 An assembler is a program that converts source-code
programs written in assembly language into object files in
machine language
 Popular assemblers have emerged over the years for the
Intel family of processors. These include …
 TASM (Turbo Assembler from Borland)
 NASM (Netwide Assembler for both Windows & Linux)
 GNU assembler distributed by the free SW foundation

Microprocess and Assembly Language 111

 Linker and Link Libraries
 You need a linker program to produce executable files
 It combines your program's object file created by the
assembler with other object files and link libraries, and
produces a single executable program
 LINK32.EXE is the linker program provided with the
MASM distribution for linking 32-bit programs
 We will also use a link library for input and output
 Called Irvine32.lib developed by Kip Irvine
 Works in Win32 console mode under MS-Windows

Microprocess and Assembly Language 112

 Assemble and Link Process

Source Object
File Assembler File

Source Object Executable

File Assembler File Linker
File

Link
Source Object
Assembler Libraries
File File

 A project may consist of multiple source files

 Assembler translates each source file separately into an object file
 Linker links all object files together with link libraries

Microprocess and Assembly Language 113

 Debugger
 Allows you to trace the execution of a program
 Allows you to view code, memory, registers, etc.
 Example: 32-bit Windows debugger

Microprocess and Assembly Language 114

 Editor
 Allows you to create assembly language source files
 Some editors provide syntax highlighting features and can be
customized as a programming environment

Microprocess and Assembly Language 115

 Data Transfer Instruction
 These instructions are used to transfer the data from the
source operand to the destination operand.
 The operand can be a constant, memory location,
register or I/O port address.
 Following are the list of instructions under this group:
 MOV Des, Src:
 Src operand can be register, memory location or immediate operand.
 Des can be register or memory operand.
 Both Src and Des cannot be memory location at the same time.

E.g.:
MOV CX, 037A H // move 037Ah into CX
MOV AL, BL // move BL to AL
MOV BX, [0301 H] // Move content of [0301h] into BX

Microprocess and Assembly Language 116

 Data Transfer Instruction…
PUSH Operand(source):
 It pushes the operand into top of stack.
 operands can be a register or memory location.
E.g.: PUSH BX
POP Des:
 It pops the operand from top of stack to Des.
 Des can be a general purpose register, segment register (except
CS) or memory location.
E.g.: POP AX
XCHG Des, Src:
 This instruction exchanges Src with Des.
 It is not supported to exchange two memory location.
E.g.: XCHG DX, AX

Microprocess and Assembly Language 117

 Data Transfer Instruction…
IN Accumulator, Port Address:
 It transfers the operand from specified port to accumulator
register.
E.g.: IN AX, 0028 H // input a word from port 0028H to AX

OUT Port Address, Accumulator:

It transfers the operand from accumulator to specified port .
E.g.: OUT 0028 H, AX //copy the content of AX to 0028H

 OUT 2CH, AX // Copy the contents of the AX to port 2Ch

Microprocess and Assembly Language 118

 Data Transfer Instruction: (Flag Transfer
Register)
 LAHF: It copies the lower byte of flag register to AH
 This LAHF instruction was provided to make conversion of assembly
language programs written for 8080 and 8085 to 8086 easier.
 SAHF:
 It copies the contents of AH to lower byte of flag register.
 PUSHF:
 Pushes flag register to top of stack.
 POPF:
 Pops the stack top to flag register.

Microprocess and Assembly Language 12

1
 Assembler Directives

Microprocess and Assembly Language 12

2
 Assemble Directives
 Instructions to the Assembler regarding the program being
executed.
 Control the generation of machine codes & organization of the
program; but no machine codes are generated for assembler
directives. Also called ‘pseudo instructions’
 Used to :
 Specify the start and end of a program
 Attach value to variables
 Allocate storage locations to input/ output data
 Define start and end of segments, procedures, macros etc..

Microprocess and Assembly Language 12 1

3 2
 Assemble Directives
Define Byte
This directive is used for the purpose of allocating
and initializing single or multiple data bytes.
Define a byte type (8-bit) variable
DB Reserves specific amount of memory locations to
each variable
Range : 00H – FFH for unsigned value;
00H – 7FH for positive value and 80H –
FFH for negative value

Example:
LIST DB 7FH, 42H, 35H
Three consecutive memory locations are reserved for
the variable LIST and each data specified in the
instruction are stored as initial value in the reserved
memory location

Microprocess and Assembly Language 12 1

4 2
 Assemble Directives
Define Word

Define a word type (16-bit) variable

Reserves two consecutive memory locations to each variable
Range : 0000H – FFFFH for unsigned value; 0000H – 7FFFH
for positive value and 8000H – FFFFH for negative value
General form : variable DW value/ values
DW

Example:

ALIST DW 6512H, 0F251H, 0CDE2H

Six consecutive memory locations are reserved for the variable
ALIST and each 16-bit data specified in the instruction is
stored in two consecutive memory location.

Microprocess and Assembly Language 12 1

5 2
 Assemble Directives

SEGMENT : Used to indicate the beginning of a code/

data/ stack segment

ENDS : Used to indicate the end of a code/ data/ stack

SEGMENT segment
ENDS
General form:

Segnam SEGMENT
… Program code
…
… or
… Data Defining Statements
Segnam ENDS

User defined name of the segment

Microprocess and Assembly Language 12 1

6 2
 Assemble Directives
8086 Microprocessor
ORG (Origin) is used to assign the starting address
(Effective address) for a program/ data segment
END is used to terminate a program; statements after
END will be ignored
EVEN : Informs the assembler to store program/ data
ORG segment starting from an even address
END EQU (Equate) is used to attach a value to a variable
EVEN
EQU Examples:
ORG 1000H Informs the assembler that the statements following ORG
1000H should be stored in memory starting with effective
address 1000H

LOOP EQU 10FEH Value of variable LOOP is 10FEH

_SDATA SEGMENT In this data segment, effective address of memory location

ORG 1200H assigned to A will be 1200H and that of B will be 1202H and
A DB 4CH 1203H.
EVEN
B DW 1052H
_SDATA ENDS

Microprocess and Assembly Language 12 1

7 2
 Assemble Directives

PROC: Indicates the beginning/the starting of a

procedure/subroutine
ENDP: End of procedure
FAR: Intersegment call/type specifier that is used by the
PROC assembler to declare intersegment call (i.e., call from
ENDP different segment).
FAR NEAR: Intrasegment call i.e, a call within the same segment.
NEAR

 Program statements of the procedure

 Last statement of the procedure

User defined name of the procedure

Microprocess and Assembly Language 12 1

8 2
 Chapter 6

Microprocess Interrupts

Organized by:
Samuel M. Organized by:
Microprocess and Assembly Language 13 Samuel M.
0
 What is Interrupts?

Microprocess and Assembly Language 13

1
 CPU Interrupt

 The CPU executes other program, as soon as a key

is pressed, the Keyboard generates an interrupt.
 The CPU will response to the interrupt – read the
data. After that returns to the original program.
 So by proper use of interrupt, the CPU can serve
many devices at the “same time”

Microprocess and Assembly Language 13

2
 The Purpose of the Interrupts

 Interrupt processing allows the processor to execute

other SW while the keyboard operator is thinking
about what to type next.
 When a key is pressed, the keyboard encoder
debounces the switch and puts out one pulse that
interrupts microprocessor.

 A time line shows typing on a keyboard, a printer

removing data from memory, and a program executing
 The keyboard interrupt service procedure, called by the
keyboard interrupt & the printer interrupt service
procedure each take little time to execute
Microprocess and Assembly Language 13
3
 Types of Interrupts

Microprocess and Assembly Language 13

4
 TYPES OF INTERRUPT HARDWARE

 Hardware Interrupts: If the signal for the processor is

from external device or hardware is called hardware
interrupts.
 Example: from keyboard we will press the key to do
some action this pressing of key in keyboard will
generate a signal which is given to the processor to do
action, such interrupts are called hardware interrupts.
 The primary sources of interrupts, however, are the PCs
timer chip, keyboard, serial ports, parallel ports, disk
drives, CMOS real-time clock, mouse, sound cards, and
other peripheral devices.

Microprocess and Assembly Language 13

5
 TYPES OF INTERRUPT HARDWARE

Hardware interrupts can be classified into two

types they are
 Maskable Interrupt: The hardware interrupts which can
be delayed when a much highest priority interrupt has
occurred to the processor.
 Non Maskable Interrupt: The hardware which cannot
be delayed and should process by the processor
immediately

Microprocess and Assembly Language 13

6
 TYPES OF INTERRUPT SOFTWARE

 Software interrupt can also divided in to two types. They are

 Normal Interrupts: the interrupts which are caused by
the software instructions are called software instructions.
 Exception: unplanned interrupts while executing a
program is called Exception. For example: while
executing a program if we got a value which should be
divided by zero is called a exception.
 There are instructions in 8086 which cause an interrupt.
 INT instructions with type number specified.
 INT 3, Break Point Interrupt instruction.
 INTO, Interrupt on overflow instruction.

Microprocess and Assembly Language 13

7
 Interrupt Vector

• The interrupt vector table contains 256 four byte

entries,containg the CS:IP

• Interrupt vectors for each of the 256 possible

interrupts. The table is used to locate the interrupt
service routine addresses for each of those interrupts.

• The Interrupt vector table is located in the first 1024

bytes of memory at addresses 000000H-0003FFH.It
contains the address(segment and offset)of the
interrupt service provider

Microprocess and Assembly Language 13

8
 Interrupt Vector….

TYPE 0: The divide error : whenever the results from a division

overflows or an attempt is made to divide by zero.

TYPE 2: The non-maskable interrupt occurs when a logic 1 is placed

on the NMI input pin to the microprocessor. non-maskable—it cannot
be disabled
TPYE 4: Overflow is a special vector used with the INTO instruction.
 The INTO instruction interrupts the program if an overflow condition exists.
 Reflected by the over flow flag (OF)

Microprocess and Assembly Language 13

9
 Interrupt Vector….

TPYE 6: an invalid opcode is interrupt occurs when undifiend opcode

encountered in program.
TPYE 7: The coprocessor not available interrupt occurs when a
coprocessor is not found, as dictated by the machine status word (MSW
or CR0) coprocessor control bits.
TPYE 8: A double fault interrupt is activated when two separate
interrupts occur during the same instruction
TPYE 11: The segment not present interrupt occurs when the protected
mode P bit (P = 0) in a descriptor indicates that the segment is not
present or not valid.
TPYE 18: A machine check activates a system memory management
mode interrupt in Pentium–Core2

Microprocess and Assembly Language 14

0
 Advantages of the Interrupt

TPYE 6: an invalid opcode is interrupt occurs when undifiend opcode

encountered in program.
TPYE 7: The coprocessor not available interrupt occurs when a
coprocessor is not found, as dictated by the machine status word (MSW
or CR0) coprocessor control bits.
TPYE 8: A double fault interrupt is activated when two separate
interrupts occur during the same instruction
TPYE 11: The segment not present interrupt occurs when the protected
mode P bit (P = 0) in a descriptor indicates that the segment is not
present or not valid.
TPYE 18: A machine check activates a system memory management
mode interrupt in Pentium–Core2

Microprocess and Assembly Language 14

1
End of the Course

Thank You!