Computer Architecture

BTES-302
 Module-1

Functional Blocks of a Computer

 Syllabus Coverage
• Module 1: Functional blocks of a computer
• CPU, memory, input-output subsystems,
control unit. Instruction set architecture of a
CPU – registers, instruction execution cycle,
RTL interpretation of instructions, addressing
modes, instruction set. Case study instruction
set of 8085 processor.
 What is a Computer
• A computer is an electronic device that
manipulates information, or data.
• It has the ability to store, retrieve, and process
data.
Block Diagram of a Computer
Block Diagram of a Computer
 What is Computer Architecture and
Organization?

• In general terms, the architecture of a computer

system can be considered as a catalogue of tools or
attributes that are visible to the user such as
instruction sets, number of bits used for data,
addressing techniques, etc.
• Whereas, Organization of a computer system
defines the way system is structured so that all those
catalogued tools can be used. The significant
components of Computer organization are ALU,
CPU, memory and memory organization.
 THE INPUT/OUTPUT SUBSYSTEM

• Input and output (I/O) devices allow us to communicate with the

computer system. I/O is the transfer of data between primary
memory and various I/O peripherals. Input devices such as
keyboards, mice, card readers, scanners, voice recognition
systems, and touch screens enable us to enter data into the
computer. Output devices such as monitors, printers, plotters,
and speakers allow us to get information from the computer.
• These devices are not connected directly to the CPU. Instead,
there is an interface that handles the data transfers. This
interface converts the system bus signals to and from a format
that is acceptable to the given device. The CPU communicates
to these external devices via I/O registers. ...
 Control Unit
• Control Unit is the part of the computer’s
central processing unit (CPU), which directs
the operation of the processor.
• It is the responsibility of the Control Unit to
tell the computer’s memory, arithmetic/logic
unit and input and output devices how to
respond to the instructions that have been
sent to the processor
Functions of the Control Unit –
• It coordinates the sequence of data movements
into, out of, and between a processor’s many sub-
units.
• It interprets instructions.
• It controls data flow inside the processor.
• It receives external instructions or commands to
which it converts to sequence of control signals.
• It controls many execution units(i.e. ALU, data
buffers and registers) contained within a CPU.
• It also handles multiple tasks, such as fetching,
decoding, execution handling and storing results.
Control Unit
 Instruction set architecture of a CPU
• registers,
• instruction execution cycle,
• RTL interpretation of instructions,
• addressing modes,
• instruction set.
Memory Hierarchy
• The internal hardware organization of a digital computer is
best defined by specifying:

• 1. The set of registers it contains and their function.

• 2. The sequence of microoperations performed on the binary
information stored in the registers.
• 3. The control that initiates the sequence of microoperations.
Registers- Block Diagram
List of Registers for the Basic Computer
Register Transfer Language
Multiplexer
Bus and Memory Transfers
 Three-State Bus Buffers
• Three-state gate:
– A bus system can be constructed with three-state
gates instead of multiplexers.
– A three-state gate is a digital circuit that exhibits
three states.
– Two of the states are signals equivalent to logic 1
and 0 as in a conventional gate.
– The third state is a high-impedance state.
Decoder
Bus Line with Three State Buffers
4-bit Bus Line with
Three State Buffers
Basic Computer Registers connected with common Bus

• The basic computer has eight registers, a memory unit, and a

control unit.
• Paths must be provided to transfer information from one
register to another and between memory and registers.
• The number of wires will be excessive if connections are made
between the outputs of each register and the inputs of the
other registers.
• A more efficient scheme for transferring information in a
system with many registers is to use a common bus.
Binary Codes
Basic Computer Registers connected with common Bus
 Computer Instructions: Instruction Code
• An instruction code is a group of bits that instruct
the computer to perform a specific operation.
• Computer instructions are a set of machine
language instructions that a particular processor
understands and executes. A computer performs
tasks on the basis of the instruction provided.

• It is usually divided into parts, each having its

own particular interpretation.
 An instruction comprises of groups called fields. These fields include:

• The Operation code (Opcode) field which specifies the operation to be

performed.
• The Address field which contains the location of the operand, i.e., register
or memory location.
• The Mode field which specifies how the operand will be located.
A basic computer has three instruction code formats which are:

• Memory - reference instruction

• Register - reference instruction
• Input-Output instruction
 Memory - reference instruction

• In Memory-reference instruction:
– 12 bits of memory is used to specify an address and one
bit to specify the addressing mode 'I'.
 Register - reference instruction
• The Register-reference instructions are represented by the
Opcode 111 with a 0 in the leftmost bit (bit 15) of the
instruction.
• A Register-reference instruction specifies an operation on or a
test of the AC (Accumulator) register.
 Input-Output instruction
• Just like the Register-reference instruction, an Input-Output
instruction does not need a reference to memory and
• It is recognized by the operation code 111 with a 1 in the
leftmost bit of the instruction.
• The remaining 12 bits are used to specify the type of the
input-output operation or test performed.
 Key Points About Instruction Format

• The three operation code bits in positions 12 through 14

should be equal to 111. Otherwise, the instruction is a
memory-reference type, and the bit in position 15 is taken as
the addressing mode I.
• When the three operation code bits are equal to 111, control
unit inspects the bit in position 15.
– If the bit is 0, the instruction is a register-reference type.
– Otherwise, the instruction is an input-output type having
bit 1 at position 15.
 Instruction Set Completeness
• The set of instructions are said to be complete if
the computer includes a sufficient number of
instructions in each of the following categories:
– 1. Arithmetic, logical, and shift instructions
– 2. Instructions for moving information to and from
memory and processor registers
– 3. Program control instructions together with
instructions that check status conditions
– 4. Input and output instructions
 Timing and Control
• The timing for all registers in the basic computer is controlled by
a master clock generator.
• The clock pulses are applied to all flip-flops and registers in the
system, including the flip-flops and registers in the control unit.
• The clock pulses do not change the state of a register unless the
register is enabled by a control signal.
• The control signals are generated in the control unit and
provide control inputs for the multiplexers in the common bus,
control inputs in processor registers, and microoperations for
the accumulator.
 There are two major types of control organization: hardwired control and
microprogrammed control.

• In the hardwired organization, the control logic is implemented with gates,

flip-flops, decoders, and other digital circuits. It has the advantage that it
can be optimized to produce a fast mode of operation.
• In the microprogrammed organization, the control information is stored in
a control memory. The control memory is programmed to initiate the
required sequence of microoperations.
Control Unit
The time relationship of the control signals.

At time T4, SC is cleared to 0 if decoder output D3 is active. This is expressed symbolically

by the statement
D3T4: SC <- 0
Basic Gates
Basic Gates with Truth Tables
 Instruction Cycle

• A program residing in the memory unit of the computer consists of a sequence

of instructions. The program is executed in the computer by going through a
cycle for each instruction.
• In the basic computer each instruction cycle consists of the following phases:
– 1. Fetch an instruction from memory.
– 2. Decode the instruction.
– 3. Read the effective address from memory if the instruction
has an indirect address.
– 4. Execute the instruction.
Instruction Cycle
Start

Fetch Instruction

Execute
Instruction
 Fetch and Decode
• Initially, the program counter PC is loaded with the address of
the first instruction in the program.
• The sequence counter SC is cleared to 0, providing a
decoded timing signal To.
• After each clock pulse, SC is incremented by one, so that the
timing signals go through a sequence T0, T1, T2, and so on.
• The microoperations for the fetch and decode phases can be
specified by the following register transfer statements.
 S2 S1 S0
T0 0 1 0
T1 1 1 1
 Example

AR
x0C 19
x12 x0E 34
R1 x10 45
100 x12 66
x14 0
x16 13
R1←M[AR] x18 22

RAM

R1 R1
100 66

cpe 252: Computer Organization 55

 Instruction Formats
• Computers may have instructions of several different lengths
containing varying number of addresses. The number of address
fields in the instruction format of a computer depends on the
internal organization of its registers.
• Most computers fall into one of three types of CPU organizations:
– 1. Single accumulator organization.
– 2. General register organization.
– 3. Stack organization.
 EXAMPLES
• 1. For example, the instruction that specifies an arithmetic addition is defined by an assembly
language instruction as
ADDX
• where X is the address of the operand. The ADD instruction in this case results in the
operation AC <--AC + M [X].

• 2. A D D R 1 , R 2 , R 3 t o denote the operation R 1 <--- R2 + R 3 .

• 3. A D D
 Addressing Modes
• The way the operands are chosen during
program execution is dependent on the
addressing mode of the instruction.
• The addressing mode specifies a rule for
interpreting or modifying the address field of
the instruction before the operand is actually
referenced.
• Effective Address (EA): Effective address is
the address of the exact memory
location where the value of the operand is
present.
 Types of Addressing Modes
• Register Addressing Mode
• Direct Addressing Mode
• Immediate Addressing Mode
• Register Indirect Addressing Mode
• Index Addressing Mode
• Auto Increment Mode
• Auto Decrement Mode
• Relative Addressing Mode
 1. Register Addressing Mode
• Every instruction includes operands; the
operands can be a memory location, a
processor register or an I/O device. The
instruction which uses processor registers to
represent operands is the instruction
in register addressing mode.
• Here, the effective address is a register where the
value of the operand is present.
• Effective Address=Register(s)
• Below we have two instructions as our examples for
register addressing mode.
• Add R4, R3
• Load R3, R2
• In the examples above, the Add instruction uses
registers to represent both of its operands. Similarly,
the Load instruction also uses registers to represent
both of its operands. So, the instruction above uses
register addressing mode to describe the address of
the operand.
 Direct Addressing Mode

• The direct addressing mode is also known as Absolute

Addressing mode. Here, the instruction contains the
address of the location in memory where the value of
the operand is stored.
• Here, the effective address is the address of memory
location.
• EA = A
• For example, observe the examples below:
• Add R2, A
• Store R2, B
Add R2, A
Store R2, B
Register Indirect Addressing mode
• A processor register is used to hold the address of a
memory location where the operand is placed.
• This addressing mode allows executing the same set
of instructions for the different memory location.
• This can be done by incrementing the content of
register thereby pointing the new location each time.
• In higher-level language, it is referred to as pointers.
• The indirect mode is denoted by placing the register
inside the parenthesis.
• Here the effective address is the content of
memory location present in the register.
EA=(R)
• Now, for example:
• Load R3, (R2) // Load R2, A
• The Load instruction above will load the value
present at the memory location contained by
register R2 in the register R3.
Load R3, (R2)
 Immediate Addressing Mode

• In immediate addressing mode, the value of the operand

is explicitly mentioned in the instruction.
• Here, effective address is not required as the operand is
explicitly defined in instruction.
• Let us see the example of immediate addressing mode:
– Add R2, #100
• The Add instruction, adds 100 to R2’s content .
• The # sign in front of the value indicates the immediate
value to be operated.
• If a value does not have # sign in front of it then it is the
address of a memory location.
• The next instruction
– Store R2, 100H
• considers the immediate value 100H as
address as it does not have # sign in front of it.
• The Store instruction stores the content of R2
at memory location 100H.
 Index Addressing Mode
• Index addressing mode is helpful when the instructions in
the program are accessing the array or the large range of
memory addresses.
• In this mode, the effective address is generated by adding
a constant to the register’s content.
• The content of the register does not change.
• The symbolic representation of index addressing mode is
denoted as:
 X(R)
• And the effective address is denoted by
 EA = X + (R)
• Load R2, A
• Load R3, (R2)
• Load R4, 4(R2)
• Load R5, 8(R2)
• Load R6, 12(R2)

• The above instructions will load the register R3, R4, R5, R6 with the contents,
present at the successive memory addresses from memory location A
correspondingly.
Implied Addressing mode
 Auto Increment Addressing Mode
• In auto-increment addressing mode once the content of
the register is accessed by the instruction the register’s
content is incremented to refer the next operand.
• Symbolically it is represented as below:
– (R)+
• Here, the effective address is content of the register as it
is enclosed by parenthesis.
• The content of register which is referring to a memory
location is incremented so that it could point the next
memory location where the next operand is stored.
Auto Decrement Addressing Mode
•
• It is just opposite of auto-increment mode. In auto
decrement mode the content of the register
is decremented initially and then the decremented
content of the register is used as effective address.
• Symbolically it is presented as:
• -(R)
• The auto-increment and decrement mode help to
implement the stack structure.
 Relative Addressing Mode
• In the content above we have discussed the index
addressing mode. There we were adding a constant to the
register content to refer the next operand address. In some
computer instead of a register, the program counter is used.
• The symbolic representation of relative address mode is
– X(PC)
• The effective address for it would be:
– EA = X + (PC)
• As here the operand addresses are found relative to the
program counter. That’s why it is referred to as relative
address mode.
Base Register Addressing Mode
 Assignment-1
• Working and types of various Input/Output
Devices.
• Types of memory in computer
• Case study – instruction set of 8085 processor
Assignment 2