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ADC in Avr

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21 views9 pages

ADC in Avr

Uploaded by

pessailor87
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Resolution(Step Size) :

 is the smallest change that can be detected by an ADC


 The ADC has n-bit resolution
 Where n can be 8,10,12,16 or even 24 bits
Conversion Time : Is defined as the time takes an ADC to convert
the analog input to digital(binary) number.

Vref : is an input voltage used for the reference voltage.

For an 8 bit ADC, step size = vref / 256


 The digital data output of the ADC in an ATmega AVR
microcontroller is the result of the Analog-to-Digital Conversion,
which converts an analog input signal into a digital value.
 The output of the ADC is determined by the reference voltage
(Vref), the resolution (number of bits), and the input analog voltage
(Vin​).
 In an 8 bit ADC we have an 8 bit digital data output of D0-D7, while
in the 10 bit ADC the data output is D0-D9
 Digital data output , Dout = Vin / Step Size
 Vin = analog input voltage
 The ADC chips are either parallel or serial
 In parallel ADC , we have 8 or more pins dedicated to bringing
out the binary data.
 In serial ADC we have only one pin for data out.
Registers associated with ADC

 ADCH
 ADCL
 ADCSRA
 ADMUX
 SPIOR
ADCH & ADCL (ADC Data Registers)

 After the A/D conversion is complete, the result sits in


registers ADCL (A/D Result Low Byte) and ADCH (A/D
Result High Byte)
 ADCH (ADC High byte) and ADCL (ADC Low byte) store the 10-
bit result of ADC conversion.
 The result is 10 bits,
where : ADCL stores the lower 8 bits.
ADCH stores the upper 2 bits.
ADCSRA (ADC Control and Status Register A)
 The ADCSRA register is the status and control register of ADC.
 Bits of ADCSRA register

 ADEN: ADC Enable – (This bit enables or disables the ADC.


Setting this bit one will enable the ADC.)
 ADSC: ADC Start Conversion – (Set to 1 to start conversion)
 ADATE: ADC Auto Trigger Enable (1 = Enable auto-triggering).
 ADIF: ADC Interrupt Flag (Set to 1 when conversion is done).
 ADIE: ADC Interrupt Enable (1 = Enable ADC interrupt).
 ADPS[2:0]: ADC Prescaler bits, used to divide system clock for
ADC.
ADMUX (ADC Multiplexer Selection Register)
 The ADMUX register is used to select the reference voltage and the input
channel for ADC conversion.
 Bits of ADMUX

 REFS1 & REFS0: Selects the reference voltage for ADC conversion
 ADLAR: Adjusts the ADC result left or right (Left = 1, Right = 0)
 Left-adjusted result means the high bits are stored in ADCH.
 MUX[4:0]: Selects the input channel (ADC0 to ADC7).
SFIOR (Special Function IO Register)

 It is a control register for configuring the ADC Auto Trigger


Source.
 Auto Triggering allows the ADC to start a conversion
automatically based on certain events without manual
intervention.

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