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Project Presentation Alu

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71 views15 pages

Project Presentation Alu

Uploaded by

khushman2212
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Final Year Project

On
Design And Implementation Of Low Power Arithmetic
Logic Unit.

Guided By : Presented By :

Mr. Honey Kumar Yashi Yadav (2100640310013)

Khushi Gupta (2100640310006)


OBJECTIVE OF THE PROJECT
For design and implementation of low power arithmetic logic unit following objectives
are as follows:
1. Power reduction: minimize the average and peak power consumption of the ALU by
using such techniques.
Clock gating
Voltage scaling
Low power adder designs.
2. Performance optimization : maintain or improve the ALU performance (speed
throughout) while reducing power consumption.
3. Scalability : ensure the designed ALU is scalable for various digital system and
applications.
4. Compatibility : ensure the designed ALU is compatible with existing digital system.

The ALU is the most important unit of microprocessor. It performs complex


operations for the processing unit and is considered as the fundamental building
block of CPU, and is widely used in VLSI applications.
REQUIRED SOFTWARE
• SOFTWARE USED : LT SPICE ( version 24.0.12)
• LT spice is a powerful, fast and free spice simulator software. Schematic capture and
waveform viewer for improving the simulation of analog circuits.
• The graphical schematic capture interface allows you to probe schematics and
produce simulation results, which can be explored through the waveform.
METHODOLOGY
• An ALU which performs arithmetic and logic operations on binary data , is built on
combinational logic circuits .
• The ALU receives a variety of inputs including the operands A and B of two binary
numbers must be operand upon.
• The brain of ALU is the combinational block , which depending on the inputs and
opcode, performs the selected operations.
Design of different logic gates
on LT spice

Simulate these circuits


indivisually

Implement proposed ALU


using these gates

Simulate this designed ALU

Obtain result of each


operation of ALU and verify it.
1. The above flow chart describes designing of different logic gates on LT spice.
2. Second step is simulate these circuits individually.
3. Third step is to implement proposed ALU using these gates.
4. Fourth step is to simulate this designed ALU.
5. Last step is to obtain result of each operation of ALU and verify it.
CMOS INVERTER
CMOS NAND
CMOS NOR
CMOS OR
LITERATURE SURVEY

1. Design of 8 bit ALU design using GDI Techniques with


less power and delay(2019)
 Arithmetic Logic Unit (ALU) is a substantial fragment of
microchip.
 Cutting-edge computerized processors, legitimate and math
activity accomplishes making use of ALU. This paper depicts an 8
bit ALU operating with a lowest power 11 transistors Full adder
and gate dispersion input (GDI) and centered MUX. All structures
were simulated using TANNER EDA software version 15 with 32
nanometer BSIM4 innovation.
2. Design of low power ALU using GDI Techniques (2018)
• The purpose of this paper is to design low power and area efficient ALU using
GDI Techniques. Main sub modules of ALU are adder, logical unit, subtractor,
multiplexer, divider. This work evalutes and compares the performance and
optimized area of ALU with conventional CMOS style & GDI technique the
simulations are perfomed by using Micro wind tool.

3. Low power ALU design and implementation using clock gating and
carry select adder. (2018)
• In this paper it is proposed to design an ALU with latch free clock gating
technique to reduce clock power and dynamic power by turning off unused areas
while working on one area of design to achieve low power consumption and the
results are compared with ALU without clock gating.
FUTURE SCOPE

• Using clock gating we can reduce the dynamic power consumed .


We must be able to reduce leakage power.

CONCLUSION
Power consumption in CMOS circuit is classified in two categories : static power
dissipation and dynamic power dissipation in negligible thus not considered as
compare to dynamic power dissipation . The power supply is direct related to
dynamic power.
REFRENCES

1. KV,Kannan Nithin, V.R Balaji, V.Mani, V. Priya , S.S . Sivaraju, and A. N.


Duraivel . “ ASIC Design and implementation of 32 bit Arithmetic logic Unit .”
EAI Endorsed Transactions on Energy Web 11 (2024)
2. Islam Md Khairul, and Sateyendra Nath Biswas “ comparative study of a low
power high speed Arithmetic Logic Unit Design Techniques . “Journal of VLSI
Design and its advancement .
3. SAHU, GANESWAR, AND SMRUTI PRAKASH SAHU. “Low power ALU
design and implementation using clock gating and carry select adder .

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