8086 Instruction Set and Assembler

Directives

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 Instruction Set Of 8086/8088
• The categories of 8086/8088 instructions are.

1. Data Copy/Transfer Instruction: These are used to transfer data

from source operand to destination operand.
2. Arithmetic and Logical Instruction: These instructions perform
arithmetic, logical, increment, decrement, compare and scan
operations.
3. Branch instruction: These instruction transfer control of execution
to the specified address.
4. Loop Instruction: These instructions are used to implement
unconditional and conditional loops.
5. Machine control instruction: These instruction control the machine
status.
6. Flag Manipulation Instruction: All the instruction which directly
affect flag register, come under this group of instruction.
7. Shift and Rotate Instruction: These instruction involve the bitwise
shifting or rotation in either direction with or without count.
8. String Instruction: These instruction involve various string
manipulation operation like load, MOVE, scan, compare, etc. These
instructions are only to be operated upon the strings. 2
 Data copy/Transfer Instruction
• MOV: Move
– This data transfer instruction transfers data from one register/memory location to
another register/memory location.
– The source may be any one of the segment register or other general or special purpose
register or a memory location and, another register or memory location may act as
destination.
– However in the case of immediate addressing mode ,a segment register cannot be a
destination register.
– To load the segment register with immediate date, one will have to load any general
purpose register with the data and then it will have to be moved to that particular
segment register.
• Examples:

MOV AX, 5000H; Immediate

MOV AX,BX Register
MOV AX, [Si]; Indirect
MOV AX, [2000H]; Direct
MOV AX, 50H[BX]; Based relative, 50H Displacement

MOV DS, 5000H; Not permitted (invalid)

– Thus to transfer an immediate data in to the segment register, we perform the

operation

MOV AX, 5000H

MOV DS, AX 3
 Data copy/Transfer Instruction
• Push: Push to stack
– This instruction pushes the content of the specified register/memory location on to the
stack.
– The stack pointer is decremented by 2, after each execution of the instruction.
– The actual current stack-top is always occupied by the previously pushed data.
– Hence, the push operation decrements SP by two and then stores the two byte content
of operands on to the stack.
– The higher byte is pushed first and then the lower byte.
– Thus out of two decremented stack address the higher byte occupies the higher
address and the lower byte occupies the lower address.
• The actual operation takes place as SS:SP points to the stack top of 8086 system
as shown in figure and AH, AL contain data to be pushed.

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 Data copy/Transfer Instruction
• Push: Push to stack
– The sequence of operations are:
• Current stack top is already occupied so decrement SP by one then store
AH into address pointed to by SP.
• Further decrement SP by one and store AL in to the location pointed by
SP.
– Thus SP is decremented by 2 and AH-AL contents are stored in stack
memory as shown in figure
– Now contents of SP points to a new stack top.
– Example
• PUSH AX
• PUSH DS
• PUSH [5000H]; content of location 5000H and 5001 H in DS are pushed
on to stack.
• To read the contents for the stack memory POP instruction is used.

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 Data copy/Transfer Instruction
• POP: Pop from stack
– This instruction when executed, loads the specified register/ memory location with the
content of the memory location of which the address is formed using the current stack
segment and stack pointer as usual.
– The stack pointer is incremented by 2.
– The POP instruction serves exactly opposite to PUSH instruction.
• The sequence of operation is as below:
– Contents of stack memory location is stored in AL and SP incremented by one.
– Further contents of memory location pointed by SP are copied to AH and SP is again
incremented by 1.
– Effectively SP is incremented by 2 and points to next stack top.
• The example of these instructions are shown follows
– POP AX
– POP DS
– POP [5000H]

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 Data copy/Transfer Instruction
• XCHG: Exchange
– This instruction exchanges the contents of the specified source and
destination operands, which may be registers or one of them may be a
memory location.
– However, exchange of contents of two memory locations is not permitted.
Immediate data also not allowed in these instructions .

– XCHG [5000H], AX; This instruction exchanges data between AX and a

memory location [5000h] in the data segment.
– XCHG BX, AX; This instruction exchanges data between AX and BX.

• IN: Input the port

– This instruction is used for reading an input port.
– The address of the input port may be specified in the instruction directly or
indirectly.
– AL and AX are the allowed destinations for 8 and 16 bit operations.
– If the port address is 16 bits it must be in DX.
– IN AL, 03H; This instruction reads data from an 8 bit port whose address is
03h and stores it in AL.
– IN AX, DX; This instruction reads data from a 16 bit port whose address is in
DX (implicit) and stores it in AX.
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 Data copy/Transfer Instruction
• OUT: Output to the Port
– This instruction is used for writing to an output port.
– The address of the output port may be specified in the instruction
directly or implicitly in DX.
– Contents of AX or AL are transferred to a directly or indirectly
addressed port after execution of this instruction.
– The data to an odd addressed port is transferred on D8- D15 while
that to an even addressed port is transferred on D0-D7.
– The registers AL and AX are the allowed source operands for 8 bit
and 16 bit operations respectively.
– If the address is of 16 bits it must be in DX.
– OUT 03H, AL; This sends data available in AL to a port whose
address is 03H.
– OUT DX,AX; This sends data available in AX to a port whose
address is specified implicitly in DX.
• XLAT: Translate
– The translate instruction is used for finding out the address codes in
case of code conversion problem, using look up table technique.

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 Data copy/Transfer Instruction
• LEA: Load effective address
– The load effective address instruction loads the effective address
formed by destination operand into the specified source register.
• LEA BX, ADR; Effective address of label ADR i.e. offset of ADR
will be transferred to Register BX.
• LEA SI, ADR [BX]; offset label ADR will be added to content of BX
to form effective address and it will be loaded in SI.
• LDS/LES: Load pointer to DS/ES
– This instruction loads the DS or ES register and the specified destination
register in the instruction with the content of memory location specified as
source in the instruction.
– Ex: LDS BX, 5000H/LES BX, 5000H

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 Data copy/Transfer Instruction
• LAHF: Load AH from lower byte of flag
– This instruction loads the AH register with the lower byte of the flag register.
– This command may be used to observe the status of all the condition code flags
(except overflow) at a time.

• SAHF: Store AH to Lower Byte of flag register

– This instruction sets or resets the condition code flags (except overflow) in the
lower byte of flag register depending upon the corresponding bit positions in AH.
– If a bit in AH is 1, the flag corresponding to the bit position is set,else reset.

• PUSHF: Push Flags to Stack

– The push flag instruction pushes the flag register on to the stack; first the
upper byte and then the lower byte is pushed on to it.
– The SP is decremented by 2, for each push operation.
– The general operation of the is instruction is similar to the PUSH operation.

• POPF: Pop flags from stack

– The pop flag instruction loads the flag register completely (both bytes) from the
word contents of the memory location currently addressed by SP and SS.
– The SP is incremented by 2, for each push operation
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 Arithmetic instructions
• These instructions perform the arithmetic operations, like addition,
subtraction, multiplication and division along with the respective ASCII
and decimal adjust instructions.
• The increment and decrement also belong to this type of instructions.

• ADD: Add
– This instruction adds the immediate data or contents of the memory locations
specified in the instruction or a register (source ) to the contents of the
another register (destination) or memory location.
– The result is in the destination operand. However, both the source and
destination operands can not be memory operands.
– That means memory to memory addition is not possible. Also contents of
segment register can not be added using this instruction.
– Flag register entries will get affected due to this istruction.
– Examples:

1. ADD AX, 0100H Immediate

2. ADD AX, BX Register
3. ADD AX, [SI] Register Indirect
4. ADD AX, [5000H] Direct
5. ADD [5000H], 0100H Immediate
6. ADD [5000H], [0100H] Invalid instruction 11
 Arithmetic instructions
• ADC: Add with Carry
– This instruction performs same operation as ADD instruction, but adds
the carry flag bit (which may be set as a result of the previous
calculations) to the result.
– All the condition code flags effected by this instruction.
– Examples:

– ADC 0100H Immediate (AX implicit)

– ADC AX, BX Register
– ADC AX, [SI] Register Indirect
– ADC AX, [5000H] Direct
– ADC [5000H], 0100H Immediate

• INC : Increment
– This instruction increases the contents of the specified register or
memory location by 1.
– All the condition code flags are affected except the carry flag CF.
– This instruction adds 1 to the contents of the operand.
– Immediate data cannot be operand of this instruction.
– INC AX Register
– INC [BX] Register Indirect 12
 Arithmetic instructions
• DEC: Decrement :
– The decrement instruction subtracts 1 from the contents of the specified
register or memory location.
– All the condition code flags, except the carry flag, are affected depending
upon the results.
– Immediate data cannot be operand of this instruction.

– DEC AX Register
– DEC [5000H] Direct

• SUB: Subtract
– The subtract instruction subtracts the source operand from the destination
operand and result is left in destination operand.
– Source operand may be a register, memory location or immediate data and
the destination operand may be a register or a memory location, but source
and destination operands both must not be memory operands.
– Destination operand can not be an immediate data.
– All the condition code flags are effected by this instruction.

– SUB AX, 0100H Immediate [destination AX]

– SUB AX, BX Register
– SUB AX, [5000H] Direct
– SUB [5000H], 0100H Immediate 13
•
Arithmetic instructions
SBB: Subtract with Barrow
– The Subtract with Barrow instruction subtracts the source operand and the borrow flag
(CF) which may be reflect the result of previous calculations, from the destination
operand.
– Subtract with Barrow, here means subtracting 1 from the subtraction obtained by SUB,
if carry (borrow) flag is set.
– The result stored in destination operand. All flags are effected (condition code) by this
instruction.
– SBB AX, 0100H Immediate [destination AX]
– SBB AX, BX Register
– SBB AX, [5000H] Direct
– SBB [5000H], 0100H Immediate
• CMP: Compare
– This instruction compares the source operand, which may be a register or an
immediate data or a memory location, with a destination operand that may be register or
memory location.
– For comparison, it subtracts the source operand from destination operand but does not
stores the result anywhere.
– The flags are affected depending upon the result of subtraction.
– If both operands are equal, zero flag is set. If source operand is greater than destination
operand carry flag is set or else carry flag is reset.

– CMP BX, 0100H Immediate

– CMP AX, 0100H Immediate
– CMP [5000H], 0100H Direct
– CMP BX, [SI] Register Indirect 14

– CMP BX, CX Register

 Arithmetic instructions
• DAA: Decimal Adjust Accumulator
– This instruction is used to convert the result of addition of two packed
BCD number to a valid BCD number.
– The result has to be only in AL, if the lower nibble is greater than 9,
after addition or if AF is set, it will add 06 to the lower nibble in AL.
– After addition 06 in the lower nibble of AL if the upper nibble of AL is
greater than 9 or if carry flag is set, DAA instruction adds 60H to AL.
– The instruction DAA affects AF, CF ,PF and ZF flags. The OF is
undefined.

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 Arithmetic instructions
• NEG: Negate
– The negate instruction forms 2’s complement of the specified destination in
the instruction.
– For obtaining 2’s complement it subtracts the component of destination from
zero.
– The result is stored back in the destination operand which may be a register
or a memory location.
– If OF is set it indicates that the operation could not be completed successfully.
This instruction affects all the condition code flags.

• MUL: Unsigned Multiplication Byte or Word

– This instruction multiplies an unsigned bytes or word by the contents of AL.
– The unsigned byte or word may be in any one of the general purpose register
or memory location.
– The most significant word of the result is stored in DX, while the least
significant word of the result is stored in AX.
– All the flags are modified depending upon the result.
– Example
• MUL BH ;(AX) ← (AL) * (BH)
• MUL CX ;(DX) (AX) ← (AX) * (CX)

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 Arithmetic instructions
• IMUL: Signed multiplication
– This instruction multiplies a signed byte in source operand by a signed byte in
AL or a signed word in source operand by a signed word in AX.
– The source can be a general purpose register, memory operand, index
register or base register, but it cannot be immediate data.
– In case of 32 bit result , the higher order word (MSW) is stored in DX and
lower order word is stored in AX.
– The AF, PF, SF and ZF flags are undefined after IMUL.
– If AH and DX contain parts of 16 and 32 bit result respectively CF and OF
both will be set.
– The AL and AX are the implicit operand in case of 8bits and 16bits
multiplication respectively.
– Example
– IMUL BH
– IMUL CX
– IMUL [SI]
• CBW: Convert Signed Byte or Word
– This instruction converts a signed byte to a signed word.
– In other words, it copies the sign bit of a byte to be converted to all bits in the
higher byte of the result word.
• CWD: Convert Signed Word to Double word
– This instruction copies the sign bit of AX to all the bits of DX register.
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 Arithmetic instructions
• DIV: Unsigned Division
– This instruction performs unsigned division.
– It divides an unsigned words or double word by a 16bit or 8bit operand.
– The dividend must be in AX for 16-bit operation and divisor may be specified
using any one of the addressing modes except immediate.
– The result will be in AL while AH will contain the remainder.
– In case of double word dividend (32-bit) the higher word should be in DX and
lower word should be in AX.
– The divisor may be specified as already explained.
– The quotient and the remainder, in this case will be in AX and DX
respectively.
– This instruction does not affect any flag.

• IDIV: Signed Division

– This instruction performs the same operation as the DIV instruction but with
signed operands.
– The result are stored similarly as in case of DIV instruction in both cases or
word and double word division.
– The result will also be signed numbers.
– The operands are also specified in the same way as DIV instruction.
– Divide by 0 interrupt is generated, if the result is too big to fit in AX (16-bit
dividend operation) or AX and DX (32-bit dividend operation).
– All the flags are undefined after IDIV instruction. 18
 Logical instructions
• These types of instructions are used for carrying out the bit by bit shift ,
rotate or basic logical operation. All the condition code flags are affected
depending upon the result. Basic logical operation available with 8086
instruction set are AND, OR, NOT, and XOR.
• AND: Logical AND
– This instruction bit by bit ANDs the source operand that may be an immediate,
a register or a memory location to the destination operand that may be
register or memory location.
– The result is stored in the destination operand. both the operands cannot be
memory location or immediate operands.
– Example
– AND AX, 0008H
– AND AX, BX

• OR: Logical OR
– The OR instruction carries out the OR operation in the same way as described
in case of AND operation.
– The limitation on source and destination operands are also the same as in the
case of AND operation.
– Examples
– OR AX, 0098H
– OR AX, BX
– OR AX, [5000H] 19
 Logical instructions
• NOT: Logical Invert
– The NOT instruction complements the content of an operand register or a
memory location, bit by bit.
• NOT AX
• NOT [5000H]

• XOR: Logical Exclusive OR

– The XOR operation is again carried out in a similar way to the AND and OR
operation.
– The constraints in the operands are also similar. The XOR operation gives a
high output when the two input bits are dissimilar. Otherwise the output is zero.
• XOR AX,0098H
• XOR AX,BX

• TEST: Logical Compare Instruction

– The TEST instruction performs a bit by bit logical AND operation on the two
operands. Each bit of the result is then set to 1.
– If the corresponding bits of both operands are 1,else the result bit is reset to 0.
– The result of this ANDing operation is not available for further use, but flags are
affected.
– The affected flags are OF, CF, SF, ZF, and PF. The Operands may be register,
memory or immediate data.
• TEST AX, BX
• TEST [0500H], 06H
• TEST [BX] [DI], CX 20
 Logical instructions
• SHL/SAL: Shift Logical/Arithmetic Left
– These instruction shifts the operand word or byte bit by bit to the left and insert
zeros in the newly introduced least significant bits.
– In case of all SHIFT and ROTATE instruction, the count is either 1 or specified
by register CL.
– The operand may reside in a register or memory location but cannot be
immediate data. All the flags are affected depending upon the result.

• SHR: Shift Logical Right

– This instruction performs bit-wise right shifts on the operand word or byte that
may reside in a register or memory location, by the specified count in the
instruction and inserts zeroes in the shifted position.
– The result is stored in the destination operand.

• SAR: Shift Arithmetic Right

– This instruction performs right shift on the operand word or byte, that may be
register or memory location by the specified count in the instruction.
– It inserts the most significant bit of the operand in the newly inserted position.
The result is stored in the destination operand.
– This shift operation shifts the operand through the carry flag.
– All the condition code flags are affected.

• Immediate operand is not allowed in any of the shift instruction. 21

 Logical instructions

SHL/SAL: Shift Logical/Arithmetic Left

SHR: Shift Logical Right

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 Logical instructions

SAR: Shift Arithmetic Right

• ROR: Rotate Right without Carry

− This instruction rotates the contents of the destination operand to the right
(bitwise) either by one or by the count specified in CL Excluding carry.
− The least significant bit is pushed in to the carry flag and simultaneously it is
transferred in the most significant bit position at each operation.
− The remaining bits are shifted right by the specified position.
− The PF, SF and ZF flags are left unchanged by rotate operation.
− The operand may be a register or a memory location but it cannot be an
immediate operand.

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 Logical instructions
• ROL: Rotate Left without Carry
• This instruction rotates the content of destination operand to the left by the specified
count (bit-wise) excluding carry.
• The most significant bit is pushed in to the carry flag as well as the least significant
bit position at each operation.
• The remaining bits are shifted left subsequently by the specified count position.
• The PF, SF and ZF flags are left unchanged in this rotate operation.
• The operand may be a register or a memory location.

• RCR: Rotate Right through Carry

• This instruction rotates the contents (bit-wise) of the destination operand right by the
specified count through carry flag.
• For each operation the remaining bits are shifted right by the specified count position.
• The SF, PF and ZF are left unchanged.
• The operand may be register or memory location.

• RCL: Rotate Left through Carry

• This instruction rotates (bit-wise) the contents of the destination operand left by the
specified count through the carry flag.
• For each operation the carry flag is pushed in to LSB, and the MSB of the operand is
pushed in to carry flag.
• The remaining bits are shifted left by the specified position.
• The SF, PF and ZF are left unchanged.
• The operand may be register or memory location.
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 Logical instructions
ROR: Rotate Right
without Carry

ROL: Rotate Left

without Carry

RCR: Rotate Right

through Carry

RCL: Rotate Left

through Carry

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 String Manipulation Instruction
• A series of data bytes or words available in memory at consecutive
location, to be referred to collectively or individually, are called as byte
string or word string.
• For example a string of a character may be or located in consecutive
memory location where each character may be represented by its ASCII
equivalent.
• For referring to string, two parameters are required (a) starting or end
address of string (b) length of string.
• The length of string usually stored as a count in CX register.
• The incrementing or decrementing of pointer in case of 8086 string
instruction depends upon the direction flag status.
• If it is a byte string operation the index register are updated by one.
• If it is word string operation the index register are updated by two.
• The counter in both cases, is decremented by one.

• REP: Repeat Instruction Prefix

– This instruction is used as a prefix to other instruction.
– The instruction to which the REP prefix is provided is executed repeatedly
until the CX register becomes Zero.
– When CX becomes zero the execution proceeds to the next instruction in
sequence. 26
 String Manipulation Instruction
• MOVSB/MOVSW: Move String Byte or String Word
– Suppose a string of bytes stored in a set of memory location to be moved to
another set of destination location.
– The starting byte of the source string is located in the memory location whose
address may be computed using SI (source index) and DS (data segment)
contents.
– The starting address of the destination location where this string has to be
relocated is given by DI (destination index) and ES (extra segment) contents.
– The starting address of source string is 10H*DS+[SI], while the starting
address of the destination string is 10H*ES+[DI].
– The MOVSB/MOVSW instruction moves a string of bytes /words pointed to by
DS:SI (source) pair to the memory location pointed to by ES:DI pair
(destination).
– The length of the byte string or word string must be stored in CX register.
– No flags are affected by this instruction.

– After the MOVS instruction is executed once, the index register are
automatically updated and CX is decremented.
– The incrementing or decrementing of pointer i.e. SI and DI depend upon the
direction flag DF.
– If DF is 0, the index register are incremented, otherwise they are decremented
in case of all the string manipulation instruction.

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 String Manipulation Instruction
1. Example for MOVSB 2. Example for MOVSB
– MOV AX, 2000H – MOV AX, 5000H
– MOV DS, AX – MOV DS, AX
– MOV AX, 3000H – MOV AX, 3000H
– MOV ES,AX – MOV ES,AX
– MOV CX, 00FFH – MOV CX, 00FFH
– MOV SI, 1000H – LEA SI, SOURCE_STRING
– MOV DI, 2000H – LEA DI, DESTIN_STRING
– CLD – CLD
– REP MOVSB – REP MOVSB

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 String Manipulation Instruction
• CMPS: Compare String Byte or String
– The CMPS instruction can be used to compare two string of bytes or
words.
– The length of the string must be stored in a register CX.
– If both the byte or word string are equal, zero flag is set.
– The flags are affected in same way as CMP instruction.
– The DS:SI point to the two string.
– The REP instruction prefix is used to repeat the operation till CX
becomes zero
• SCAS: Scan String Byte or String Word
– This instruction scans string of byte or words for an operand byte or
word specified in the register AL or AX.
– The string is pointed to by ES; DI register pair.
– The length of the string is stored in CX.
– The DF controls the mode for scanning of the string.
– Whenever a matched to the specified operand, is found in the string,
execution stops and zero flag is set.
– If no match is found, the zero flag is reset.

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 String Manipulation Instruction
• Example for CMPSB 2. Example for SCAS
– MOV AX, 2000H
– MOV DS, AX – MOV AX, 5000H
– MOV AX, 3000H – MOV ES, AX
– MOV ES,AX – MOV CX, 00FFH
– MOV CX, 00FFH – LEA DI, DESTIN_STRING
– MOV SI, 1000H – CLD
– MOV DI, 2000H – REPNE SCASW
– CLD
– REP CMPSB

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 String Manipulation Instruction
• LODS: Load String Byte or String Word
– The LODS instruction loads the AL /AX register by the content of a string pointed to by
DS;SI register pair.
– The SI is modified automatically depending upon DF.
– The DF plays exactly to same role as in case of MOVSB/MOVSW instruction.
– If it is a byte transfer (LODSB), the SI is modified by one and if it is a word transfer
(LODSW ), the SI is modified bye two.
– No other flags are affected by this instruction.

• STOS: Store String Byte or String Word

– The STOS instruction stores the AL/AX register contents to a location in string pointed
by ES:DI register pair.
– The DI is modified accordingly. No flags are affected by this instruction.
– The direction flag controls the string instruction execution.
– The source index SI and destination index DI are modified after each iteration
automatically. If DF is 1, then the execution follows auto decrement mode.
– In this mode SI and DI are decremented automatically after each iteration (by 1 or 2
depending upon byte or word operation).
– Hence, in auto decrement mode, the string are referred to by their ending addresses.
– If DF =0, then execution follows auto increment mode.
– In this mode SI and DI are incremented automatically after each iteration (by 1 or 2
depending upon byte or word operation).
– After each iteration, hence the string, in this case, are refer to by their starting
addresses.

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 Control transfer or Branching Instruction
• The control transfer instructions transfer the flow of execution of the
program to a new address specified in the instruction directly or indirectly.

• When this type of instruction is executed, the CS and IP registers get

loaded with new values of CS and IP corresponding to the location where
the flow of execution is going to transferred.

• Unconditional control transfer (Branch) instruction

– In case of unconditional control transfer instructions, the execution control is
transferred to the specified location independent of any status or condition.
– The CS and IP are unconditionally modified to the new CS and IP.

• Conditional control transfer (Branch) instruction

– In the conditional control transfer instructions, the control is transferred to the
specified location provided the result of the previous operation satisfies a
particular condition.
– Other wise, the execution continues in normal flow sequence.
– The results of the previous operations are replicated by condition code flags.

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 Control transfer or Branching Instruction
• Unconditional Branch Instructions
– CALL Unconditional Call
• This instruction is used to call a subroutine from a main program.
• There are again two types of procedures depending upon whether
it is available in the same segment (Near CALL, i.e. +/- 32K
displacement) or in other segment (FAR CALL, i.e. anywhere
outside the segment).
• The modes for them are called as intrasegment and intersegment
addressing modes respectively.
• On execution, this instruction stores the incremented IP (i.e.
address of the next instruction) and CS onto the stack and loads
the CS and IP registers, respectively, with the segment and offset
addresses of the procedure to be called.
• In case of NEAR CALL it pushes only IP register and in case of
FAR CALL it pushes IP and CS both onto the stack.
• The NEAR and FAR CALLS are discriminated using opcode.

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 Control transfer or Branching Instruction
• RET: Return From the Procedure
– At each CALL instruction, the IP and CS of the next instruction is
pushed onto stack, before the control is transferred to the procedure.
– At the end of the procedure, the RET instruction must be executed.
– When it is executed, the previously stored content of IP and CS
along with flags are retrieved into the CS, IP and flag register from
the stack and execution of the main program continues further.
– The procedure may be a near or far procedure. In case of a FAR
procedure, the current contents of the SP points to IP and CS at the
time of return.
– While in case of a NEAR procedure, it points to only IP.

– Depending upon the type of procedure and the SP contents, RET

instruction is of four types:-
1. Return within segment.
2. Return within segment adding 16 bit immediate displacement to the SP
contents.
3. Return intersegment.
4. Return intersegment adding 16 bit immediate displacement to the SP
contents.
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 Control transfer or Branching Instruction
• INT: Interrupt Type N
– In the interrupt structure of 8086/8088, 256 interrupts are
defined corresponding to the types from 00H to FFH.
– When an INT N instruction is executed, the TYPE byte N
is multiplied BY 4 and the contents of IP and CS of the
interrupt service routine will be taken from the
hexadecimal multiplication (N * 4) as offset address and
0000 as segment address.

• INTO: Interrupt on Overflow

– This command is executed, when the overflow flag OF set.
– The new contents of IP and CS are taken from the
address 0000:0010 as explained in INT type instruction.
– This is equivalent to a Type 4 interrupt instruction.
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 Control transfer or Branching Instruction
• JMP: Unconditional Jump:
– This instruction unconditionally transfers the control of execution to the
specified address using an 8 bit or 16 bit displacement (intrasegment relative,
short or long) or CS:IP (intersegment direct far).
– No flags are affected by this instruction.
– Corresponding to the methods of specifying jump addresses, the JUMP
instruction may have the following three formats.

• IRET: Return from ISR

– When an interrupt service routine is to be called, before transferring control to
it, the IP, CS and flag register are stored on to the stack to indicate the
location from where the execution is to be continued, after the ISR is
executed.
– So at the end of each ISR, when IRET is executed, the values of IP, CS and
flags are retrieved from the stack to continue the execution of the main
program.
– The stack is modified accordingly. 36
 Control transfer or Branching Instruction
• LOOP: Loop Unconditionally
– This instruction executes the part of the program from the label or address
specified in the instruction up to the loop instruction, CX number of times.
– The following sequence explains the execution.
– At each iteration, CX is decremented automatically.
– In other words, this instruction implements DECREMENT COUNTER and
JUMP IF NOT ZERO structure.

• Condition Branch instructions

– When these instructions are executed, execution control is transferred to
address specified relatively in the instruction, provided the condition implicit in
the opcode is satisfied.
– If not the execution continues sequentially.
– The conditions, here, means the status of condition code flags.
– These type of instructions do not affect any flag.
– The address has to be specified in the instruction relatively in terms of
displacement which must lie within 80H to 7FH bytes from the address of
branch instruction.
– In other words, only short jumps can be implemented using conditional branch
instructions.
– A label may represent the displacement, if it lies within above specified range.
37
Control transfer or Branching Instruction

38
Control transfer or Branching Instruction

•LOOP: Loop Conditionally

39
 Flag Manipulation and Processor Control Instructions
• These instructions control the functioning of the available hardware inside
the processor chip.
• These are categorized into two types;

– (a) flag manipulation instructions and

– (b) machine control instructions.

• The flag manipulation instructions directly modify some of the flags of

8086.
• The machine control instructions control the bus usage and execution.
• These instructions modify the Carry (CF), Direction (DF) and Interrupt (IF)
flags directly.
• The DF and IF, which may be modified using the flag manipulation
instructions, further control the processor operation; like interrupt
responses and auto increment or auto decrement modes.
• Thus, the respective instructions may also be called machine or
processor control instructions.
• The other flags can be modified using POPF and SHAF instructions,
which are termed as data transfer instructions,

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Control transfer or Branching Instruction
Flag manipulation Instructions
Sr. No. Instruction Function
1 CLC Clear carry flag
2 CMC Complement carry flag
3 STC Set carry flag
4 CLD Clear direction flag
5 STD Set direction flag
6 CLI Clear interrupt flag
7 STI Set interrupt flag

Flag manipulation Instructions

Sr. No. Instruction Function
1 WAIT Wait for test input pin to go low
2 HLT Halt the processor
3 NOP No operation
4 ESC Escape to external devices like numeric co-processor
5 LOCK Bus lock instruction prefix.

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 Assembler Directives and Operators
• To make the programming on microprocessor simpler,
assemblers are used. The main role of the assembler is to
convert the assembly language program in to the machine
language program and in 8086 since the hand coding is a
tedious job mostly people follow the assembler for
programming the microprocessor.
• For completing the task of the assembly, assembler needs
some hints from the programmer i.e. the required storage of
particular constant or variable, logical names of the
segments, types of different subroutines or modules, end of
file etc.
• Such hints are given by the assembler directives.
• Another type of hint which helps the assembler to assign a
particular constant with a label or initialize particular memory
locations or labels with constants is an operator. 42
 Assembler Directives and Operators
• DB: Define Byte
– It is used to reserve byte or bytes of memory locations in the available memory
space.
• DW: Define Word (1 – word = 2 – bytes)
– It is used to reserve word or words of memory locations in the available memory
space.
• DD: Define Double Word (1 – double word = 4 – bytes)
– It is used to reserve word or words of memory locations in the available memory
space.
• DQ: Define Quad Word (1 – quad word = 8 – bytes)
– It is used to reserve two words of memory locations in the available memory
space.
• DT: Define Ten Bytes
– It is used to reserve ten bytes of memory locations in the available memory
space.
• Usage:
– RANKS DB 01H,02H,03H
– WORDS DW 1234H,0250H,03ABH
– LABEL1 DQ 1234567887654321H
– PLAYERS_RANKS DT 01H,02H,03H, 31H,22H,03H 21H,32H,07H 10H,
43
 Assembler Directives and Operators
• Assume: Assume logical segment name
– It is used to indicate the start of a logical segment
– ASSUME DS: DATA it implies that the start of a new segment named
DATA and its base address is to be initialized to DS.
• END - END directive is placed after the last statement of a
program to tell the assembler that this is the end of the
program module. The assembler will ignore any statement
after an END directive. Carriage return is required after the
END directive.
• ENDP - ENDP directive is used along with the name of the
procedure to indicate the end of a procedure to the
assembler
• Example:
– SQUARE_NUM PROCE ; It start the procedure
– ;Some steps to find the square root of a number
– SQUARE_NUM ENDP ;Hear it is the End for the procedure

44
 Assembler Directives and Operators
• ENDS - This ENDS directive is used with name of
the segment to indicate the end of that logic
segment.
– Example:
– CODE SEGMENT ;Hear it Start the logic
– ;segment containing code
– ; Some instructions statements to perform the logical operation
– CODE ENDS ;End of segment named as CODE

45
 Assembler Directives and Operators
• EQU - This EQU directive is used to give a name to some
value or to a symbol. Each time the assembler finds the
name in the program, it will replace the name with the value
or symbol you given to that name.
– Example:
• FACTOR EQU 03H ; you has to write this statement at the starting
of your program and later in the program you can use this as
follows
• ADD AL, FACTOR ; When it codes this
• instruction the assembler will code it as ADDAL, 03H

• The advantage of using EQU in this manner is, if FACTOR is

used many no of times in a program and you want to change
the value, all you had to do is change the EQU statement at
beginning, it will changes the rest of all.

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 Assembler Directives and Operators
• EVEN - This EVEN directive instructs the assembler to
increment the location of the counter to the next even address
if it is not already in the even address.
– If the word is at even address 8086 can read a memory in 1 bus cycle.
– If the word starts at an odd address, the 8086 will take 2 bus cycles to
get the data.
– A series of words can be read much more quickly if they are at even
address.
– When EVEN is used the location counter will simply incremented to
next address and NOP instruction is inserted in that incremented
location.

• Example:
– DATA1 SEGMENT
– ; Location counter will point to 0009 after assembler reads next
statement
– SALES DB 9 DUP(?) ;declare an array of 9 bytes
– EVEN ; increment location counter to 000AH
– RECORD DW 100 DUP( 0 ) ;Array of 100 words will start from an even
address for quicker read
– DATA1 ENDS
47
 Assembler Directives and Operators
• EXTERN: External and PUBLIC: public
– The directive EXTERN informs the assembler that the names,
procedures and labels declared after this directive have already been
defined in some other assembly language modules.
• GROUP: Group the Related Segment
– This directive is used to form logical groups of segments with similar
purpose or type. This directive is used to inform the assembler to form
a logical group of the following segment names.
• PROGRAM GROUP CODE, DATA, STACK
• LABEL: label
– The Label directive is used to assign a name to the current content of
the location counter. When the assembly process starts, the
assembler initializes a location counter to keep track of memory
location assigned to the program.
• LENGTH: Byte Length of a label
– This directive is not available in MASM. This is used to refer to the
length of data array or string.
– MOV CX, LENGTH ARRAY

48
 Assembler Directives and Operators
• LOCAL
– The labels, variables, constants or procedures declared LOCAL in a
module are to be used only by the particular module.
– LOCAL a, b, DATA, ARRAY, ROUTINE
• NAME: Logical Name of a Module
– The NAME directive is used to assign a name to an assembly language
program module. The module, may now referred to by its declared
name.
• OFFSET: Offset of a Label
– When the assembler comes across the OFFSET operator along with a
label, it first computes the 16-bit displacement (also called as offset
interchangeably) of the particular label, and replaces the string OFFSET
LABEL by the computed displacement. This operator is used with
arrays, strings, labels and procedures to decide their offset in their
default segments.

• CODE SEGMENT
• MOV SI, OFFSET LIST
• CODE ENDS
• DATA SEGMENTS
• LIST DB 10H
• DATA ENDS 49
 Assembler Directives and Operators
• ORG: Origin
– The ORG directives directs the assembler to start the memory
allotment for the particular segments, block or code from the declared
address in the ORG statement.
– If an ORG 200H address in code segment is present at the starting of
the code segment of that module then the code will start from 200H
address in code segment.
• PROC: Procedure
– The PROC directives marks the start of named procedure in the
statement.
– Also the types NEAR or FAR specify the type the procedure i.e.
whether it is to be called by the main program located within 64k of
physical memory or not.
• PTR: Pointer
– The POINTER operator is used to declare the type of a label, variable
or memory operand.
– The operator PTR prefixed by either BYTE or WORD.
– If prefix is byte then the particular label, variable or memory operand
is treated as an 8-bit quantity, while if word is the prefix, then it is
treated as a 16-bit quantity.
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 Assembler Directives and Operators
• PUBLIC
– The PUBLIC directive is used along with the Extern directive.
– This informs the assembler that the labels, variables constants, or procedures
declared PUBLIC may be accessed by other assembly modules to form their
codes, but while using the PUBLIC declared labels, variables, constants or
procedures the user must declare them externals using the extern directive.

• SEGMENT: Logical Segment

– The SEGMENT directive marks the starting of logical segment.
– The started segment is also assigned a name, i.e. label, by this statement.
• EXE.CODE SEGMENT GLOBAL
;Start of segment named EXE.CODE, that can be accessed by any other module.
• EXE.CODE ENDS ; END of EXE.CODE logical segment.

• SHORT
– The SHORT operator indicates to the assembler that only one byte is required
to code the displacement for a jump (i.e. displacement is within -128 to +127
bytes from address of the byte next to the jump opcode).
• JMP SHORT LABEL

51
 Assembler Directives and Operators
• TYPE
– The TYPE operator directs the assembler to decide the data type of
the specified label and replaces the ‘TYPE’ label by the decided data
type.
• GLOBAL
– The labels, variables, constants or procedures declared GLOBAL may
be used by other modules of the program. Once a variable is declared
GLOBAL, it can be used by any module in the program.
• FAR PTR
– This directive indicates the assembler that the label following FAR
PYTR is not available within the same segment and the address of
the label is of 32- bits i.e. 2-bytes offset followed two byte segment
address.
• NEAR PTR
– This directive indicates that the label following NEAR PTR is in the
same segment and needs only 16-bit i.e. 2-byte offset to address it.

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