5 Combinational Circuits (Encoder N Decoder)
5 Combinational Circuits (Encoder N Decoder)
B I0
Out0 W
high-level Out1 X
enable A I1
Out2 Y
Out3 Z
Enable En
En A B W X Y Z
1 0 0 1 0 0 0
1 0 1 0 1 0 0
enabled
1 1 0 0 0 1 0
1 1 1 0 0 0 1
disabled 0 x x 0 0 0 0
Decoder with Enable input
B I0
Out0 W
low-level Out1 X
enable A I1
Out2 Y
Out3 Z
Enable En
En A B W X Y Z
0 0 0 1 0 0 0
0 0 1 0 1 0 0
enabled
0 1 0 0 0 1 0
0 1 1 0 0 0 1
disabled 1 x x 0 0 0 0
3-to-8 line Decoder
Encoder
• Encoder is a combinational circuit that perform the
inverse operation of the decoder.
• An encoder has 2n input lines and n output lines.
• Encoders assume that only one input line is active
at a time.
4 × 2 Encoder
8 × 3 Encoder
Encoder Design Issues
There are two ambiguities associated with the design
of a simple encoder:
• Only one input can be active at any given time. If
two inputs are active simultaneously, the output
produces an undefined combination (for example, if
D3 and D6 are 1 simultaneously, the output of the
encoder will be 111.
• An output with all 0's can be generated when all the
inputs are 0's,or when D0 is equal to 1.
Priority Encoder
• Multiple asserted inputs are allowed; one has
priority over all others.
• Separate indication of no asserted inputs.