MODULE - V

Digital Systems

A system which handles and processes the signals in

discrete form is called as digital system.

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 What is signal
 A signal is a function that conveys information about the behavior or
attributes of some phenomenon.
 In the physical world, any quantity exhibiting variation in time or
variation in space (such as an image) is potentially a signal that might
provide information on the status of a physical system, or convey a
message between observers, among other possibilities.
 The term "signal" includes, among others, audio, video, speech, image,
communication, geophysical, sonar, radar, medical and musical
signals.
 Types : Analog Signal & Digital Signal

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 Analog Signals
•Analog signal is a continuous signal which represents physical
measurements (voltage, current, or meter movement).
•Uses continuous range of values to represent information
•Example :Human voice in air, analog electronic devices.

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 Digital Signals
•A digital signal, on the other hand, can take only a finite number of
values.
•Digital signals are discrete time signals generated by digital modulation.
•Uses discrete or discontinuous values to represent information
•Example :Computers, CDs, DVDs, and other digital electronic devices.

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 Binary Signal

The most common digital signals are binary signals. A binary

signal is a signal that can take only one of two discrete values and is
therefore characterized by transitions between two states.

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Analog continuous Digital discrete (step by step)

Analog Vs Digital

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 Different number systems in digital

 Boolean Algebra (set of rules)

 Boolean reduction using identities

 Boolean reduction using K-map

 Combinational logic circuits

 Synthesis of logic circuits

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 Number Systems
 Common Number Systems

Used by Used in
System Base Symbols humans? computers?
Decimal 10 0, 1, … 9 Yes No
Binary 2 0, 1 No Yes
Octal 8 0, 1, … 7 No No
Hexa- 16 0, 1, … 9, No No
decimal A, B, … F

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 Quantities/Counting (1 of 3)
Hexa-
Decimal Binary Octal decimal
0 0 0 0
1 1 1 1
2 10 2 2
3 11 3 3
4 100 4 4
5 101 5 5
6 110 6 6
7 111 7 7
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 Quantities/Counting (2 of 3)
Hexa-
Decimal Binary Octal decimal
8 1000 10 8
9 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
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 Quantities/Counting (3 of 3)
Hexa-
Decimal Binary Octal decimal
16 10000 20 10
17 10001 21 11
18 10010 22 12
19 10011 23 13
20 10100 24 14
21 10101 25 15
22 10110 26 16
23 10111 27 17 Etc.

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 Conversion Among Bases
 The possibilities:

Decimal Octal

Binary

Binary Hexadecimal

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 Binary to Decimal
Octal to Decimal
Hexadecimal to Decimal

Decimal to Binary
Octal to Binary
Hexadecimal to Binary

Decimal to Octal
Decimal to Hexadecimal

Binary to Octal
Binary to Hexadecimal

Octal to Hexadecimal
through binary
Hexadecimal to Octal
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 Binary to Decimal
 Technique

Multiply each bit by 2n, where n is the “weight” of
the bit

The weight is the position of the bit, starting from
0 on the right

Add the results

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 Example
Bit “0”

1010112 => 1 x 20 = 1
1 x 21 = 2
0 x 22 = 0
1 x 23 = 8
0 x 24 = 0
1 x 25 = 32
4310

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 Octal to Decimal
 Technique

Multiply each bit by 8n, where n is the “weight” of
the bit

The weight is the position of the bit, starting from
0 on the right

Add the results

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 Example

7248 => 4 x 80 = 4
2 x 81 = 16
7 x 82 = 448
46810

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 Hexadecimal to Decimal
 Technique

Multiply each bit by 16n, where n is the “weight”
of the bit

The weight is the position of the bit, starting from
0 on the right

Add the results

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 Example

ABC16 => C x 160 = 12 x 1 = 12

B x 161 = 11 x 16 = 176
A x 162 = 10 x 256 = 2560
274810

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 Decimal to Binary
 Technique

Divide by two, keep track of the remainder

First remainder is bit 0 (LSB, least-significant bit)

Second remainder is bit 1

Etc.

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 Example
2 125
2 62 1
12510 = ?2
2 31 0
15 1
2
7 1
2
2 3 1

2 1 1
0 1

12510 = 11111012

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 Octal to Binary
 Technique

Convert each octal digit to a 3-bit equivalent
binary representation

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 Example

7058 = ?2

7 0 5

111 000 101

7058 = 1110001012

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 Hexadecimal to Binary
 Technique

Convert each hexadecimal digit to a 4-bit
equivalent binary representation

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 Example

10AF16 = ?2

1 0 A F

0001 0000 1010 1111

10AF16 = 00010000101011112

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 Decimal to Octal
 Technique

Divide by 8

Keep track of the remainder

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 Example

123410 = ?8
8 1234
154 2
8
19 2
8
2 3
8
0 2

123410 = 23228

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 Decimal to Hexadecimal
 Technique

Divide by 16

Keep track of the remainder

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 Example

123410 = ?16
16 1234
16 77 2

16 4 13 = D
0 4

123410 = 4D216

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 Binary to Octal
 Technique

Group bits in threes, starting on right

Convert to octal digits

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 Example

10110101112 = ?8

1 011 010 111

1 3 2 7

10110101112 = 13278

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 Binary to Hexadecimal
 Technique

Group bits in fours, starting on right

Convert to hexadecimal digits

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 Example

10101110112 = ?16

10 1011 1011

2 B B

10101110112 = 2BB16

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 Octal to Hexadecimal
 Technique

Use binary as an intermediary

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 Example

10768 = ?16
1 0 7 6

001 000 111 110

2 3 E

10768 = 23E16

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 Hexadecimal to Octal
 Technique

Use binary as an intermediary

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 Example

1F0C16 = ?8
1 F 0 C

0001 1111 0000 1100

1 7 4 1 4

1F0C16 = 174148
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 THE BINARY NUMBER SYSTEM

Decimal fraction

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 Examples of
Decimal to Binary conversion

Decimal fraction to binary

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 Exercise – Convert ...
Hexa-
Decimal Binary Octal decimal
33
1110101
703
1AF
Don’t use a calculator!

Skip answer Answer

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 Exercise – Convert …
Answer

Hexa-
Decimal Binary Octal decimal
33 100001 41 21
117 1110101 165 75
451 111000011 703 1C3
431 110101111 657 1AF

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 Multiplication and Division

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 Addition and Subtraction

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 Complements and
Negative Numbers

Two types of complements are used with binary numbers: the

one’s complement and the two’s complement.
The one’s complement of an n-bit binary number is
obtained by subtracting the number itself from

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 The two’s complement of an n-bit binary number is
obtained by subtracting the number itself from

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Another code that finds many applications is the Gray code.
This is simply a reshuffling of the binary code with the
property that any two consecutive numbers differ only by one
bit.
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How to write the logical expression of a digital circuit?

In digital system, the output of a digital circuit is represented by the

logical expression in terms of input variables.

Output = SOP of input variables or POS of input variables

Ex. F= ABC’ + AB’C + A’BC + ABC (SOP form)

or
F= (A+B+C’)(A+B’+C)(A’+B+C )(A+B+C) (POS form)

SOP – sum of products

product terms are called as minterms

POS – product of sums

sum terms are called as maxterms

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 To write the logical expression in SOP form

add the minterms of high outputs

To write the logical expression in POS form

Multiply maxterms of low outputs

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All possible minterms and maxterms of two variable truth table

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Example-1: How to write a function

Minterms present in f (output function) correspond to high output (1)

in the truth table.

Maxterms present in f (output function) correspond to low output (0)

in the truth table.
output function

Proof: Z = X’Y + X (Y+Y’) = X’Y + X = X’Y + X (1+Y)

= X + Y(X+X’) = X+Y
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Example-2: How to write a function

Output can be
1or 0.

1 – is
represented
by product of
inputs.

0 – is
represented
by sum of
inputs.

If the output is high for Row No. 3, 4, 5, 6, 7

What is the expression of logical function?

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In SOP form

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Design a logic circuit to perform 3 bit addition

Which combination of inputs can give ‘1’ on multiplication?

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 SUM=

Carry Out=

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There are set of rules to add or multiply the variables in the
logical expression.

The rules are used to reduce the logical expression in

order to design the digital circuit using minimum number of
logic gates.

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 BOOLEAN ALGEBRA
A set of rules to perform logical addition and multiplication

The basis of Boolean algebra lies in the operations of logical addition,

or the OR operation; and logical multiplication, or the AND operation.
Both of these find a correspondence in simple logic gates.

The variables in a Boolean, or logic, expression can take only one of

two values, usually represented by the numbers 0 and 1.
These variables are sometimes referred to as true (1) and false (0).
This convention is normally referred to as positive logic.

There is also a negative logic convention in which the roles of logic 1

and logic 0 are reversed.

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An "identity" is merely a relationship that is always true, regardless of the
values that any variables involved might take on; similar to laws or
properties.
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Annulment Law – A term AND´ed with a “0” equals 0 or OR´ed with a
“1” will equal 1
A . 0 = 0 A variable AND’ed with 0 is always equal to 0
A + 1 = 1 A variable OR’ed with 1 is always equal to 1

Identity Law – A term OR´ed with a “0” or AND´ed with a “1” will
always equal that term
A + 0 = A A variable OR’ed with 0 is always equal to the variable
A . 1 = A A variable AND’ed with 1 is always equal to the variable

Idempotent Law – An input that is AND´ed or OR´ed with itself is

equal to that input
A + A = A A variable OR’ed with itself is always equal to the variable
A . A = A A variable AND’ed with itself is always equal to the variable

Complement Law – A term AND´ed with its complement equals “0”

and a term OR´ed with its complement equals “1”
A . A’ = 0 A variable AND’ed with its complement is always equal to 0
A + A’ = 1 A variable OR’ed with its complement is always equal to 1

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Proof

X + X.Y = X (Y+Y’) + XY = XY +XY’ + XY = XY + XY’ = X

or

X’ + X.Y = X’ (1+Y) + XY = X’ +X’Y + XY = X’ + Y

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 De Morgan’s theorems

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DeMorgan's theorems provide mathematical verification of the
equivalency of the NAND and negative-OR gates and the equivalency of
the NOR and negative-AND gates.

DeMorgan's first theorem is stated as follows:

The complement of a product of variables is equal to the sum of
the complements of the variables,
Stated another way,
The complement of two or more ANDed variables is equivalent to
the OR of the complements of the individual variables.
The formula for expressing this theorem for two variables is
(XY)’ = X’ + Y’

DeMorgan's second theorem is stated as follows:

The complement of a sum of variables is equal to the product of
the complements of the variables.
Stated another way,
The complement of two or more ORed variables is equivalent to
the AND of the complements of the individual variables,

The formula for expressing this theorem for two variables is

(X + Y)’ = X’ Y’
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The importance of De Morgan’s laws is in the statement of the duality
that exists between AND and OR operations: any function can be realized
by just one of the two basic operations, plus the complement operation.
This gives rise to two families of logic functions: sums of products and
product of sums.

Any logical expression can be reduced to either one of these two forms.
Although the two forms are equivalent, it may well be true that one of
the two has a simpler implementation (fewer gates).

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Exercise-1: Realize XY + X’Y’ using

i)AND and NOT gates only

ii)OR and NOT gates only

Step-1: Realization of XY + X’Y’

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Step-2: Replace the gates by AND and NOT.

OR is changed to AND using

De Morgan’s theorem

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Exercise-2:

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Exercise-3: Design a logic circuit whose output is HIGH only when a
majority of the inputs A, B and C are HIGH.

Exercise-4: Determine the Boolean expression for the logic circuit shown
in Fig. Simplify the Boolean expression using Boolean Laws and De
Morgan’s theorem. Redraw the logic circuit using the simplified Boolean
expression.

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Exercise-4:

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Exercise-4:

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Exercise-5:

Simplify:

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Exercise-6:

1.

2.

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Exercise-7:

Simplify

F= ABC’ + AB’C + A’BC + ABC

Since X+X = X, ABC can be repeated many times

= ABC’ + ABC + AB’C + ABC + A’BC+ABC

= AB(C’+C) + AC(B’+B) + BC(A’+A)
= AB+ AC+BC

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Exercise-8: Determine the logic expression for the output Y, from the
truth table shown. Simplify and sketch the logic circuit for the simplified
expression.

Exercise-9:. Prove the following Boolean identity :

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Exercise-10:. Simplify the following Boolean expression and draw the
logic circuits for the simplified expressions.

(a) (ABC+ABC+ABC+BC ) (b) B(A+C)+C(A+B)+AC

(c) (AB + C) (AB + D)

a)

a) B+AC

b) C+AB’

c) AB+CD

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Exercise-11:

Simplify

F= ((AB)’ + (AC)’)’

Using De Morgan’s Theorem

F= ((AB)’ + (AC)’)’
= (AB)’’ . (AC)’’
= (AB).(AC)
= A.B.C

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Exercise-12:

Simplify

1) F= (A+B).(A+B)’ = 0

2) F= A.B + (A.B)’ = 1

3) F= (A+B.C’).(A+B.C’) =A+B

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 Logic Gates
Logic gates are physical devices that can be used to implement logic
functions.

1. OR
2. AND
3. NOT
4. NOR
5. NAND
6. XOR

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 Truth Table
Analysis of logic functions, that is, functions of logical (Boolean)
variables, can be carried out in terms of truth tables. A truth table is a
listing of all the possible values each of the Boolean variables can take,
and of the corresponding value of the function.

The rules that define a logic function are often represented in tabular
form by means of a truth table

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 NAND and NOR Gates

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 UNIVERSAL GATES

Inverter using NAND AND using NAND

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 UNIVERSAL GATES

Inverter using NOR AND using NOR

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 XOR (Exclusive OR) Gate

XOR gate is used in half and full adder circuits

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 Minimization Technique
Logic Minimization: reduce complexity of the gate level implementation

• reduce number of literals

• reduce number of gates

• reduce number of levels of gates

 KARNAUGH MAP (K-Map)

 TABULATION METHOD
(Quine-McCluskey Method)

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 Karnaugh map
The Karnaugh map (or simply a K-map) is similar to a truth table because it presents
all the possible values of input variables and the resulting output for each value.

The K-map is an array of squares (or cells) in which each square represents
a binary value of the input variables.

The number of squares in a Karnaugh map is equal to (2n) the total number of
possible input variable combinations (i.e number of squares is equal to the number of
rows in a truth table).

Indicate the input variables along the sides of the K-map. The binary values of input
variables are arranged based on gray code.

Ex. for two variables, the number of square is 2 2 = 4, for three variables, the number
of squares is 23 = 8 and for four variables, the number of squares is 2 4 = 16.
Truth Table K-map

A B Z Minterm
0 0 0 A’B’
0 1 1 A’B
1 0 1 AB’
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 Procedure to build the Karnaugh
map
 Find number of squares (or cells), and draw the array

 Assign decimal value and binary equivalent to each square (follow gray code)

 Enter 1’s in the cells corresponding to the minterms of the given expression

 Group 1’s in pairs, quads, octets,… 2n cells (follow rules)

 Write the reduced term corresponding to each group, which gives expression
with minimum number of terms

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Manual Logic reduction K-map

Disadvantages: Advantages:

Finding the suitable pair of In every two adjacent cells, one
terms is difficult. of the variables changes (1 and
If the suitable terms are not 0).
paired, it will lead to long All minterms which differ by
reduction process. one variable are in adjacent
cells.
Through grouping, the
changing variable mapped by
the loop can be eliminated.
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 Two, Three and Four variable Karnaugh map and
Minterms

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2-variable K-map 3-variable K-map

0 1

2 3

4-variable K-map

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Procedure in K-map (continued)

Step-1: Find the minterms

Ex.

Step-2: Find the cells in K-map corresponding to the minterms. Enter 1’s
in that cells.

000 010 101 100 Binary value of input variables

corresponding to the Minterms
0 2 5 4 Cell number

Step-3: Group 1’s in the adjacent cells. Look for largest possible loop.
(8 cell, 4 cell, 2 cell).

Step-4: Form minimum number of loops.

Step-5: Write the reduced function from the K-map.

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 Rules for Grouping adjacent cells
containing ones

1.No zeros allowed.

2.No diagonals.
3.Only power of 2 number of cells in each group.
4.Groups should be as large as possible.
5.Every one must be in at least one group.
6.Overlapping allowed.
7.Wrap around allowed.
8.Number of groups must be as fewer as possible.

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 Rules for Grouping adjacent cells
containing ones
1. Groups may not include any cell containing a zero

2. Groups may be horizontal or vertical, but not diagonal.

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3. Groups must contain 1, 2, 4, 8, or in general 2n cells.

That is if n = 1, a group will contain two 1's since 21 = 2.

If n = 2, a group will contain four 1's since 22 = 4.

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4. Each group should be as large as possible.

5. Each cell containing a one must be in at least one group

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6. Groups may overlap.

7. Groups may wrap around the table. The leftmost cell in a row may be grouped with
the rightmost cell and the top cell in a column may be grouped with the bottom cell.

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8. There should be as few groups as possible, as long as this does not contradict any of
the previous rules.

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 Writing the logic function after grouping
Write the mintems corresponding to each loop by omitting the changing
variables.
for example A is a changing variable in red loop

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Mapping a Standard SOP Expression on the Karnaugh Map

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Mapping a Nonstandard SOP Expression on the Karnaugh Map

(Factorizing)

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Exercise:
Simplify the following SOP expression using the Karnaugh mapping
procedure :

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10/18/24 111
Exercise:

Write the logic functions from the K-map

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Exercise:
Shows a Karnaugh map of a sum-of-products (SOP) function. Determine
the simplified SOP function.

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 Mapping Directly on Karnaugh Map from a Truth Table
Exercise:
Implement the following Boolean expression using minimum number of 3-
input NAND gates.

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Exercise:

Consider a logic circuit with 4 input variables in which the output is high
when at least 3 inputs are high. Reduce the logic function using K-map.

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Exercise: Reduce the expression F = Σm(0,1,2,3,6,7,13,15) by mapping and
implement in NAND logic.

Enter 1 for given minterms in corresponding location and 0 for others.

Group the maximum number of 1s in the order of 2n.
Ensure that all the 1s must come under at least once in a group.
Simplify the resultant minterms using basic laws and OR the Result.
Implement the hardware.

CD 00 01 11 10
AB
Group I = A’B’C’D’ A’B’C’D A’B’CD
00 1 1 1 1 A’B’CD’
0 1 3 2
= A’B’
1 Group II = A’BCD A’BCD’ A’B’CD
0 4 05 1 A’B’CD’
7 6
01 = A’C
Group III = ABC’D ABCD
0 12 113 115 014 = ABD

F = A’B’+A’C+ABD
11 0 8 0 9 011 010
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 NAND Implementation

A’
B’

A’ F = A’B’+A’C+ABD

A
B
D

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1. Simplify the Boolean function
F(x, y, z) = (0, 2, 4, 5, 6)

Ans: Z’+XY’

2. Given the following Boolean function:

F = A'C + A'B + AB'C + BC
(a) Express it in sum of minterms,
(b) Find the minimal sum of products expression,

The function can be expressed in sum of

min terms form: F(A, B, C) = (1, 2, 3, 5, 7)

A ‘C + A 'B + AB'C + BC = C + A 'B

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Exercise:
Simplify the Boolean function

F(w, x, y, z)=  (0,1,2,4,5,6,8,9,12,13,14)

yz
wx 00 01 11 10
0 1 3 2
00

4 5 7 6
01

12 13 15 14
11

8 9 11 10
10

Ans: y' + w'z' + xz'

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Exercise:

Simplify the Boolean function

F = A'B'C' + B'CD' + A'BCD' + AB'C'

CD
AB 00 01 11 10
0 1 3 2
00

4 5 7 6
01

12 13 15 14
11

8 9 11 10
10

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Exercise: Simplify the following Boolean functions
1. F(A, B, C, D) = (0, 2, 3, 5, 7, 8, 9,10,11,13,15)

CD 2. F(A, B, C, D) = (0,1,2,5,8,9,10)
AB

00 0 01 1 11 3 10 2 CD
AB

00 1 1 1 00 0 01 1 11 3 10 2
4 5 7 6
01 1 1 00 1 1 1
4 5 7 6
11 13 15 14
11 1 1 01 1
11 13 15 14
8 9 11 10
10 1 1 1 1 11
8 9 11 10
F = BD + B' D' + CD + AD
10 1 1 1
= BD + B' D' + CD + AB'
= BD + B' D' + B' C + AD
= BD + B' D' + B' C + AB' F = B'D' + B'C' + A'C'D

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Exercise:

CD
AB 00 01 11 10
0 1 3 2
00 1 1 1

4 5 7 6
01 1 1 1

12 13 15 14
11 1 1

8 9 11 10
10 1 1 1

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Exercise:

CD
AB 00 01 11 10
0 1 3 2
00

4 5 7 6
01

12 13 15 14
11

8 9 11 10
10
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 Combinational Logic Circuits

Combinational logic (sometimes also referred to as time-independent logic) is a type of

digital logic which is implemented by Boolean circuits, where the output is a pure
function of the present input only.

Sequential logic is a type of logic circuit whose output depends not only on the present
value of its input signals but on the sequence of past inputs.

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Examples of Combinational Logic Circuits

1.Half adder – to perform two bit binary addition

2.Full adder – to perform three bit binary addition

3. Multiplexer – binary information from one of many input lines and

directs it to a single output line. [2n:1]

4. Demultiplexer - Several output lines, one input line. [1:2n]

5. Encoder – similar to MUX, many input lines and n output lines.

[2n:n]

6. Decoder – similar to DeMUX, n input lines and many output lines.

[n:2n]

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 Half Adder

Sum = X’Y+XY’
= XY

Carry = XY

X  Y  X Y  X Y XOR
X  Y  X Y  X Y XNOR

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 Full Adder

SUM=

Carry Out=

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A simple 4 Bit Ripple Carry Adder is shown below. It is not the most efficient
adder because the higher stages in the cascade have to wait for the previous
stage to compute Carry Out bit.

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 Multiplexers / Data Selectors
 2n data inputs, n control inputs (called "select line"), 1 output
 Used to connect 2n points to a single point
 Control signal pattern forms binary index of input connected to output

2 : 1 mux

Output function Y = S' I0 + S I1

4 : 1 mux

Output function Y = S1' S0' I0 + S1' S0 I1 + S1 S0' I2 + S1 S0 I3

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Why product of input and
select signals

mi – Minterms of control inputs

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 Demultiplexer
It is a digital function that
performs inverse of the multiplexing
operation.
It has one input line (E) and
transmits it to one of 2n possible
output lines (D0, D1, D2, …, D2n -1).
The selection of the specific output is
controlled by the bit combination of n
select inputs.

1 : 4 Demux

Output functions
E
E

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2 : 4 Decoder Decoder
A B

Zi = m iE
A B

E Z0
E

1
Z1
1

1
Z2
1

Z3

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 Encoder
8 : 3 Encoder
 An encoder is a digital circuit that performs the inverse operation of a decoder.
 An encoder has (or fewer) input lines and output lines.
 The encoder can be implemented with OR gate whose inputs are determined
directly from the truth table.

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