Topic for the class: Boolean Algebra laws

Unit II : Boolean Algebra and Logic Circuits

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 1
 Boolean Algebra and Logic
Circuits

 Axiomatic definition of Boolean Algebra,

Basic theorems and Properties of
Boolean Algebra.
 Boolean Functions, Minterms and
Maxterms, Canonical and Standard
Forms.
Digital logic gates, Synthesis using AND,
OR and NOT gates, NAND and NOR logic
networks.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 2
 Learning Outcomes

After completion of this unit, the student will

be able to
 Summarize the properties of Boolean
algebra (L2)
 Solve expressions in the canonical and
standard forms (L3)
 Construct logic circuits with logic gates (L3)
 Construct any Boolean function using
Universal gates (L3)
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 3
 Boolean algebra
• Boolean algebra is mathematics of logic. It is
one of the most basic tools available to the logic
designer and thus can be effectively used for
simplification of complex logic expressions.
• Other useful and widely used techniques based
on Boolean theorems include the use of
Karnaugh maps in what is known as the
mapping method of logic simplification and the
tabular method given by Quine–McCluskey

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 4
 Introduction to Boolean Algebra

Boolean algebra, quite interestingly, is simpler

than ordinary algebra. It is also composed of a set
of symbols and a set of rules to manipulate these
symbols. However, this is the only similarity
between the two.
The differences are many. These include the
following:
1. In ordinary algebra, the letter symbols can take
on any number of values including infinity. In
Boolean algebra, they can take on either of two
values, that is, 0 and 1.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 5
2. The values assigned to a variable have a numerical significance in
ordinary algebra,whereas in its Boolean counterpart they have a
logical significance.
3. While ‘.’ and ‘+’ are respectively the signs of multiplication and
addition in ordinary algebra, in Boolean algebra ‘.’ means an AND
operation and ‘+’ means an OR operation.
For instance, A+B in ordinary algebra is read as A plus B, while the
same in Boolean algebra is read as A OR B.
4. More specifically, Boolean algebra captures the essential properties of
both logic operations such as AND, OR and NOT and set operations
such as intersection, union and complement.
As an illustration, the logical assertion that both a statement and its
negation cannot be true, has a counterpart in set theory, which says
that the intersection of a subset and its complement is a null (or
empty) set.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 6
 Boolean algebra
• Boolean algebra may also be defined to be a
set A supplied with two binary operations of
logical AND, logical OR, a unary operation of
logical NOT and two elements, namely logical
FALSE (0) and logical TRUE (1).
• This set is such that, for all elements of this
set, the postulates or axioms relating to the
associative, commutative, distributive,
absorption and complementation properties
of these elements hold good.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 7
 Variables, Literals and Terms in
Boolean Expressions
Variables are the different symbols in a Boolean expression. They may
take on the value ‘0’ or ‘1’.
For instance, in expression (1),A,B and C are the three variables.
In expression (2),P,Q,R and S are the variables:
A+AB+AC+ABC (1)
P+QR+SP+Q+R (2)
The complement of a variable is not considered as a separate variable.
Each occurrence of a variable or its complement is called a literal.
In expressions (1) and (2) there are eight and seven literals respectively.
A term is the expression formed by literals and operations at one level.
Expression (1) has five terms including four AND terms and the
OR term that combines the first-level AND terms.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 8
 Equivalent and Complement of
Boolean Expressions
• Two given Boolean expressions are said to be
equivalent if one of them equals ‘1’ only when the
other equals ‘1’ and also one equals ‘0’ only when
the other equals ‘0’.
• They are said to be the complement of each other
if one expression equals ‘1’ only when the other
equals ‘0’, and vice versa.
• The complement of a given Boolean expression is
obtained by complementing each literal, changing
all ‘.’ to ‘+’ and all ‘+’ to ‘.’, all 0s to 1s and all 1s
to 0s.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 9
 Examples
Example-1 :Given Boolean expression
AB+AB Corresponding complement is (A+B) . (A+B)
Example2: Given Boolean expression
A+B . A+B Corresponding complement AB+AB
When OR ed with its complement the Boolean
expression yields a ‘1’, and when AND ed, with its
complement it yields a ‘0’.
The ‘.’ sign is usually omitted in writing Boolean
expressions and is implied merely by writing the
literals in just a position. For instance, A.B would
normally be written as AB.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 10
 Dual of a Boolean Expression
• The dual of a Boolean expression is obtained
by replacing all ‘.’ operations with ‘+’
operations, all ‘+’ operations with ‘.’
operations, all 0s with 1s and all 1s with 0s
and leaving all literals unchanged.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 11
 Example

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 Example

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 Postulates of Boolean Algebra

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 Theorems of Boolean Algebra

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 Theorem 2

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 Theorem 3

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 Theorem-4

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 Problem

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 Theorem-5 and 6

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 Circuit representation

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SEN1051 : DIGITAL LOGIC CIRCUITS
 Theorem-7:Distributive Laws

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SEN1051 : DIGITAL LOGIC CIRCUITS
 Distributive Laws representation

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SEN1051 : DIGITAL LOGIC CIRCUITS
 Theorem 8

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SEN1051 : DIGITAL LOGIC CIRCUITS
 Theorem 9 and 10

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SEN1051 : DIGITAL LOGIC CIRCUITS
 Theorem 11

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 Theorem 12

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 Problem

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 Theorem 13 (DeMorgan’s Theorem)

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 29
 Theorem 13 (DeMorgan’s Theorem)

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 Theorem 14

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 Theorem 15

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 32
 Simplification of Boolean Expressions using
Boolean algebra
Rules of Boolean Algebra

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 33
 Problem-1

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 34
 Problem - 2

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 Problem -3

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 36
 Problem - 4

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 37
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 38
 Problem - 5

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 39
 Problem -6

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 40
 REPRESENTATION OF BOOLEAN FUNCTIONS

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 41
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 42
 Minterm and Maxterm Realization

Minterm
• Consider two binary variables A and B
combined with an AND operation. Since each
variable may appear in either form (normal or
complemented), there are four combinations,
that are possible—AB, A′B, AB′, A′B′.
• Each of these four AND terms represent one of
the four distinct combinations and is called a
minterm, or a standard product or fundamental
product.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 43
 3- variable minterm and maxterm

• Now consider three variable—A, B and C. For

a three variable function there are 8
minterms as shown in Table. (Since there are
8 combinations possible).

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 44
• The binary numbers from 0 to 7 are listed
under three varibles. Each minterm is
obtained from an AND term of the three
variables, with each variable being primed
(complemented form) if the corresponding bit
of the binary number is a 0 and unprimed
(normal form) if a 1.
• The symbol is mj, where j denotes the
decimal equivalent of the binary number of
the minterm disignated.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 45
 minterm and Maxterm

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 46
 Example
• Let we have a TV that is connected with three
switches. TV becomes ‘ON’ only when atleast
two of the three switches are ‘ON’ (or high)
and in all other conditions TV is ‘OFF’(or low).
• Let the three switches are represented by
three variable A, B and C. The output of TV is
represented by F. Since there are three
switches (three variables), there are 8 distinct
combinations possible that is shown in Truth
Table.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 47
 Truth table

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 48
• The TV becomes ‘ON’ at four combinations. These
are 011, 101, 110 and 111. We can say that F is
determined by expressing the combinations A′BC, AB
′C, ABC′ and ABC. Since each of these minterms
result in F = 1,
• we should have

• This demonstrates an important property of Boolean

algebra that ‘Any Boolean function can be expressed
as sum of minterms or as ‘Sum of product’
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 49
• However, there is no guarantee that this
SOP expression will be a minimal expression.
• In other words, SOP expressions are likely to
have reduandancies that lead to systems
which requires more hardware that is
necessary.
• This is where the role of theorems and other
reduction techniques come into play.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 50
• As mentioned, any TRUTH-TABLE INPUT/OUTPUT
specifications can be expressed in a SOP expression.
• To facilitate this a shorthand symbology has been
developed to specify such expressions.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 51
This is done by giving each row (MINTERM) in the
TRUTH-TABLE a decimal number that is equivalent to
the binary code of that row, and specifying the
expression thus:

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 52
 Forms for expressing SOP function

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 53
 Maxterms
• Now, continuing with the same example, consider the
complement of Boolean function that can be read from
Truth-table by forming a minterm for each combination
that produces 0 in the function and by 0Ring.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 54
 This demonstrates a second important property of
the Boolean algebra that ‘Any Boolean function can
be expressed as product-of-maxterms or as product
of sums.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 55
• The procedure for obtaining the product of maxterms
directly from Truth-table is as follows:
• Form a maxterm for each combination of the variables
that produces a 0 in the function, and then form the
AND of all those functions. Output will be equal to F
because in case of maxterms 0 is unprimed.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 56
• Boolean functions expressed as sum of
minterms (sum of product terms) SOP or
product of maxterms, (Product of sum terms)
POS are said to be in CANONICAL form or
STANDARD form.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 57
 Standard Forms

• We have seen that for n binary variables, we

can obtain 2n distinct minterms, and that
any Boolean function can be expressed as a
sum of minterms or product of maxterms.
• It is sometimes convenient to express the
Boolean function in one of its standard form
(SOP or POS). If not in this form, it can
coverted into standard or canonical form as
follows.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 58
Conversion Between Canonical Forms
Replace Σ with Π (or vice versa) and replace those j’s
that appeared in the original form with those that do not.
Example:f1(a,b,c)= a’b’c+ a’bc’ + ab’c’+ abc’
= m1+ m2+ m4+ m6
= Σ(1,2,4,6)
= Π(0,3,5,7)
= (a+b+c)•(a+b’+c’)•(a’+b+c’)•(a’+b’+c’)

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 59
 Problem on standard SOP form

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 60
 Problem on standard POS form

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 61
 Conversion between Standard Forms

• Consider the table shown to help you establish the

relationship between the MAXTERM and MINTERM
numbers.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 62
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 63
 Logic gates

The task performed by a logic gate is called its

logic function. Logic functions can be implemented
by hardware (logic gates) or by programming
devices such as microcontrollers or computers.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 64
 AND gate
The AND gate is sometimes called the "all or
nothing gate." Fig. shows the basic idea of
the AND gate using simple switches.
• The term "logic" is usually used to refer to a
decision-making process. A logic gate, then,
is a circuit that can decide to say yes or no
at the output based upon the inputs.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 65
 AND gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 66
 Application of an AND Gate
• An AND gate can be used in a simple seat
belt alarm system in a car to detect when
the ignition switch is ON, and the seat belt is
unbuckled. If the ignition switch is ON, a 1 is
produced on input A of the AND gate shown
in fig

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 67
• If the seat belt is not properly buckled, 1 is
produced on input B of the AND gate. Also when
the ignition switch is turned ON, a timer is
started that produces a 1 on input C for 30
seconds.
• If all the three conditions exist, i.e. if the ignition
switch is ON, and the seat belt is unbuckled and
the time is running, the output of the AND gate
is 1. This will activate the audible alarm to
remind the driver (say to buckle the seat belt).
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 68
 OR gate
• Like AND gate, the OR gate, is another basic logic
gate from which all logic functions are
constructed. It is composed of two or more inputs
and a single output.
• The OR gate is sometimes called the "any or all
gate." Figure illustrates the basic idea of the OR
gate using simple switches.
• Looking at the circuit in Fig, you can see that the
output lamp will light when either or both of the
input switches are closed but not when both are
open.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 69
 Boolean Expression is
Y= A+B+C

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 70
 Pulsed Operation of an OR Gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 71
 Application of an OR Gate
Air Conditioning room alarming system
• The circuit shown in Fig consists of three sensors which can be placed on the doors and windows
within a room (say with one door and two windows). The sensors are magnetic switches that
produces a 1 output when open and a 0 output when closed .

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 72
 OR Gate operation example

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 73
 NOT gate
A NOT gate is a one-input, one-output logic circuit whose output is
always the complement of the input. That is, a LOW input produces a
HIGH output, and vice versa.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 74
 Application of an Inverter

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 75
 NAND gate
• The term NAND is a contraction of NOT-AND.
It implies an AND function with a
complemented (or inverted) output. The
standard logic symbol for a 2-input NAND
gate is as shown in Fig.a

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 76
Notice that this symbol is the same as AND gate symbol
except for a small circle (or a bubble) on its output. This
small circle denotes the invertion operation. Thus the
NAND gate operates like an AND gate followed by
INVERTER as shown in Fig b.
Boolean expression fro NAND is

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 77
 Application of a NAND Gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 78
 NOR Gate
• The term NOR is a contraction of NOT-OR. It
implies an OR function with a complemented
(or inverted) output. The standard logic symbol
for a 2-input NOR gate is as shown in Fig (a).
• Notice that this symbol is the same as OR gate
symbol except for a small circle (or a bubble)
on its output. This small circle denotes the
inversion operation. Thus the NOR gate
operates like an OR gate followed by INVERTER
as shown in Fig (b).
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 79
 NOR gate

Boolean expression for NOR

gate is

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 80
 Application of a NOR Gate
• Fig. shows a NOR-gate circuit required to indicate the
status of the landing gear prior to landing in an aircraft,
as a part of its functional monitoring system.
• In this circuit, when a landing gear is extended, its
sensor produces a LOW(0) voltage. When a landing
gear is retracted, its sensor produces a HIGH (1)
voltage.
• A green LED display turns ON if all the three gears are
properly extended when the “gear down” switch is
activated in preparation for landing. A red LED display
turns ON if any of the gears fail to extend properly prior
to landing.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 81
 NOR gate Example

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 82
• The exclusive –OR (abbreviated as XOR) gate has only
two-inputs. Unlike the other logic gates we have
discussed earlier, the exclusive-OR gate has never more
than two inputs. Fig. shows the logic symbol of an
exclusive –OR gate.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 83
 Operation of Ex-OR gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 84
 Application of an Exclusive–OR
Gate
Fig shows an exclusive –OR gate being used to detect
the failure in either one of the identical circuits
operating in parallel. As long as both the circuits
are operating properly, the outputs of both the
circuits are always the same. Therefore the output
of the exclusive –OR gate is LOW (0).
However, if one of the circuits fails, the outputs of
the two circuits will be at opposite levels, for some
time. Therefore the exclusive –OR gate will
produce a HIGH(1) output indicating failure is one
of the circuits.
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 85
 Application of an Exclusive–OR
Gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 86
 The Exclusive –NOR Gate
• The exclusive –NOR (abbreviated as XNOR)
gate has also only two inputs like exclusive –
OR gate. Fig (a) shows the logic symbol of an
exclusive –NOR(XNOR) gate. The bubble on
the output of the XNOR gate symbol
indicates that its output is opposite to the
output of the XOR gate.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 87
 Operation of Ex-NOR gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 88
 Application of an Exclusive-NOR
Gate
The exclusive –NOR gate can also be used to
detect failure in either one of the identical
circuits operating in parallel (i.e., the same
application as discussed for exclusive –OR gate)
as shown in Fig

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 89
 Determination of Boolean
Expression for a Logic Circuit
Write the Boolean expression for output X for the logic circuit
shown in Fig.

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 90
 Video Box Position

As seen from circuit shown in Fig, we find that the Boolean expression for the output,

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 Determination of a Truth Table for a Logic
Circuit

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October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 93
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 94
 The NAND Gate a Universal Logic Gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 95
 The NOR Gate as a Universal Gate

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 96
 Let us first of all, implement this circuit using the basic logic gates, i.e. using AND, OR and
INVERTER gates

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 97
• Now we can replace each logic gate by its NAND gate
equivalent. Notice that the INVERTER is replaced by
a single NAND gate each AND gate is replaced by two
NAND gates while an OR gate is replaced by three
NAND gates. The resulting circuit is as shown in Fig

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 98
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 99
Removing the two INVERTERs, on the same line
we can simplify the circuit shown

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 100
 Implement following Boolean Expression

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 101
• Now we can replace each logic gate by its NOR gate
equivalent Notice that INVERTER is replaced by
single NOR. While AND is replace by three NOR and
OR gate is replace by two NOR gate. The resulting
circuit is shown in Fig

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 102
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 103
Removing the two INVERTER on the same
line we can simplify the circuit. The
resulting circuit is
shown in

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 104
 Effect of Inverter
Effect of inverting outputs of gate Effect of inverting inputs of gates

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 105
 Alternative logic symbols

Effect of inverting both inputs and outputs of gates

Alternative logic symbols
October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 106
Implement Ex-OR gate using NAND gates only

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 107
 Redraw the logic circuit by using only five 2-input NAND gates. The circuit
should perform the logic A - B + A - B = Y .

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 108
 THANK YOU

October 15, 2024 Department of CSE, GIT Course Code and Course Title: CSEN1051 : DIGITAL LOGIC CIRCUITS 109