Lecture 01
Lecture 01
Design
Lecture 01
40
35
30
temperature0C
25
20
15
10
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
time
30
temperature 0C
29
25 25 25
23 22
20
18
15
10
7
5 4
1 2
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
time
30
temperature0C
29
25 25 25
23 22
20
18
15
10
7
5 4
1 2
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
samples
40
35
30
C
0
temperature
25
20
15
10
0
1 3 5 7 9 11 13 15
samples
8
b1
b2
b3
b4
1mV = 1
0
0
Vcc1
GND
a1
a2
a3
a4
1
6.25 x 1015 V !!
6.25 x 1018 ?
13
12
11
10
7400
NAND Gate IC
GND
4
6
1
Carry
Output
Combinational
2 6
a2 b2
Logic Circuit
1 5
a1 b1
Memory Element
Thermocouple
Reaction
Vessel
Heater
Control
S. BROWN AND Z. VRANESIC, FUNDAMENTALS OF DIGITAL LOGIC WITH
VERILOG DESIGN,PRENTICE-HALL, 2003.
Number Systems and
Codes
Decimal Number System
Caveman Number System
Binary Number System
Hexadecimal Number System
Octal Number System
0 ∑ 10 >∑
1 ∆ 11 >∆
2 > 12 >>
3 Ω 13 >Ω
4 ↑ 14 >↑
5 ∆∑ 15 Ω∑
6 ∆∆ 16 Ω∆
7 ∆> 17 Ω>
8 ∆Ω 18 ΩΩ
9 ∆↑ 19 Ω↑
0 0 10 1010
1 1 11 1011
2 10 12 1100
3 11 13 1101
4 100 14 1110
5 101 15 1111
6 110 16 10000
7 111 17 10001
8 1000 18 10010
9 1001 19 10011