Digital

Fundamentals
Tenth Edition

Floyd

Chapter 3

© 2008 Pearson Education

Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
The Inverter A X

The inverter performs the Boolean NOT operation. When the input is
LOW, the output is HIGH; when the input is HIGH, the output is LOW.

Input Output
A X
LOW (0) HIGH (1)
HIGH (1) LOW(0)

The NOT operation (complement) is shown with an overbar. Thus, the

Boolean expression for an inverter is .
The Inverter

Example waveforms:

A group of inverters can be used to form the 1’s complement of a

binary number: Binary number
1 0 0 0 1 1 0 1

0 1 1 1 0 0 1 0
1’s complement
Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
The AND Gate A X
B

The AND gate produces a HIGH output when all inputs are HIGH;
otherwise, the output is LOW. For a 2-input gate, the truth table is

Inputs Output
A B X
0 0 0
0 1 0
1 0 0
1 1 1

The AND operation is usually shown with a dot between the variables
but it may be implied (no dot). Thus, the AND operation is written as X
= A .B or X = AB.
The AND Gate
A X
B
Example waveforms:

X
The AND operation is used in computer programming as a selective
mask. If you want to retain certain bits of a binary number but reset the
other bits to 0, you could set a mask with 1’s in the position of the
retained bits.

If the binary number 10100011 is ANDed with the mask

00001111, what is the result? 00000011
The AND Gate

In an automobile seat belt alarm system, when will the alarm

go off?
Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
The OR Gate
A X
B

The OR gate produces a HIGH output if any input is HIGH; if all inputs
are LOW, the output is LOW. For a 2-input gate, the truth table is

Inputs Output
A B X
0 0 0
0 1 1
1 0 1
1 1 1

The OR operation is shown with a plus sign (+) between the variables.
Thus, the OR operation is written as X = A + B.
The OR Gate
A X
B
Example waveforms:
A
B
X
The OR operation can be used in computer programming to set certain
bits of a binary number to 1.
ASCII letters have a 1 in the bit 5 position for lower case letters
and a 0 in this position for capitals. (Bit positions are numbered
from right to left starting with 0.) What will be the result if you
OR an ASCII letter with the 8-bit mask 01000000?
ASCII

The resulting letter will be lower case.

The OR Gate

When will the alarm go off in an intrusion detection system?

Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
The NAND Gate
A X
B
The NAND gate produces a LOW output when all inputs are HIGH;
otherwise, the output is HIGH. For a 2-input gate, the truth table is

Inputs Output
A B X
0 0 1
0 1 1
1 0 1
1 1 0

The NAND operation is shown with a dot between the variables and an
overbar covering them. Thus, the NAND operation is written as
(Alternatively, .)
The NAND Gate
A X
B
Example waveforms:

A
B
X

How would you connect a 2-input NAND gate to form a

basic inverter?
The NAND Gate

NAND gate acts as negative-OR gate

Inputs Output Input Intermediate Output

A B X
A B A B X
0 0 1
0 0 1 1 1
0 1 1
0 1 1 0 1
1 0 1
1 0 0 1 1
1 1 0
1 1 0 0 0
The NAND Gate

NAND gate acts as negative-OR gate

Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
The NOR Gate
A X
B
The NOR gate produces a LOW output if any input is HIGH; if all
inputs are HIGH, the output is LOW. For a 2-input gate, the truth
table is

Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 0
The NOR operation is shown with a plus sign (+) between the variables
and an overbar covering them. Thus, the NOR operation is written as .
The NOR Gate
A X
B
Example waveforms:

A
B
X
The NOR operation will produce a LOW if any input is HIGH.
+5.0 V

When is the LED is ON for the circuit shown? 330 W

A
The LED will be on when any of B X
C
the four inputs are HIGH. D
The NOR Gate

NOR gate acts as negative-AND gate

Inputs Output Input Intermediate Output

A B X
A B A B X
0 0 1
0 0 1 1 1
0 1 0
0 1 1 0 0
1 0 0
1 0 0 1 0
1 1 0
1 1 0 0 0
The NOR Gate

Aircraft landing monitoring system

Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
The XOR Gate
A X
B
The XOR gate produces a HIGH output only when both inputs are at
opposite logic levels. The truth table is

Inputs Output
A B X
0 0 0
0 1 1
1 0 1
1 1 0

The XOR operation is written as . Alternatively, it can be written with a

circled plus sign between the variables as .
The XOR Gate
A X
B
Example waveforms:

A
B
X
Notice that the XOR gate will produce a HIGH only when exactly one
input is HIGH.
If the A and B waveforms are both inverted for the above
waveforms, how is the output affected?

There is no change in the output.

The XOR Gate

XOR Gate used as a two-bit modulo-2 adder

The XNOR Gate
A X
B
The XNOR gate produces a HIGH output only when both inputs are at
the same logic level. The truth table is

Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 1

The XNOR operation shown as . Alternatively, the XNOR operation can

be shown with a circled dot between the variables. Thus, it can be shown
as X = A . B.
The XNOR Gate
A X
B
The XNOR gate produces a HIGH output only when both inputs are at
the same logic level. The truth table is

Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 1

The XNOR operation shown as . Alternatively, the XNOR operation can

be shown with a circled dot between the variables. Thus, it can be shown
as .
The XNOR Gate
A X
B
Example waveforms:

A
B
X
Notice that the XNOR gate will produce a HIGH when both inputs are the
same. This makes it useful for comparison functions.
If the A waveform is inverted but B remains the same, how is
the output affected?

The output will be inverted.

Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
Fixed Function Logic

Cannot be programmed
Two Major families:
- TTL: transistor-transistor logic
- CMOS: complementary metal-oxide semi-conductor (more prevalent)
- Examples:
0.335 – 0.334 in.
0.740 – 0.770 in. 14 13 12 11 10 9 8

14 13 12 11 10 9 8

0.250 ±0.010 in. 0.228 – 0.244 in.

1 2 3 4 5 6 7

1 2 3 4 5 6 7
Pin no.1 Lead no.1
identifiers identifier
14
1 14
1

DIP package SOIC package

Fixed Function Logic

Logic symbols show the gates and associated pin numbers.

74xx00 74xx27
74 series NAND gate device 74 series NOR gate device
Fixed Function Logic

Some common gate configurations are shown.

VCC VCC VCC VCC
14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'00 ' 02 '04 '08

VCC VCC VCC VCC

14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'10 '11 '20 '21

VCC VCC VCC VCC

14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'27 '30 '32 '86
Fixed Function Logic

Data sheets include limits and conditions set by the manufacturer as well
as DC and AC characteristics. For example, some maximum ratings for a
74HC00A are:
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) – 0.5 to + 7.0 V V
V in DC InputVoltage (Referenced to GND) – 0.5 to VCC +0.5 V V
V out DC Output Voltage (Referenced to GND) – 0.5 to VCC +0.5 V V
I in DC Input Current, per pin ± 20 mA
Iout DC Output Current, per pin ± 25 mA
ICC DC Supply Current, VCC and GND pins ± 50 mA
PD Power Dissipation in Still Air, Plastic or Ceramic DIP † 750 mW
SOIC Package † 500
TSSOP Package † 450
Tstg Storage Temperature –65 to + 150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds °C
Plastic DIP, SOIC, or TSSOP Package 260
Ceramic DIP 300
Outline
• 3-1 The Inverter
• 3-2 The AND Gate
• 3-3 The OR Gate
• 3-4 The NAND Gate
• 3-5 The NOR Gate
• 3-6 The Exclusive-OR and Exclusive-NOR Gates
• 3-7 Fixed Function Logic
• 3-8 Programmable Logic
Programmable Logic

A Programmable Logic Device (PLD) can be programmed to

implement logic. There are various technologies available for PLDs.
Many use an internal array of AND gates to form logic terms. Many
PLDs can be programmed multiple times.
Programmable Logic

A Programmable Logic Device (PLD) can be programmed to

implement logic. There are various technologies available for PLDs.
Many use an internal array of AND gates to form logic terms. Many
PLDs can be programmed multiple times.

A A B B

SRAM SRAM SRAM SRAM

cell cell cell cell

SRAM SRAM SRAM SRAM

cell cell cell cell
X = AB
Programmable Logic

In general, the required logic for a PLD is developed with the aid of a
computer. The logic can be entered using a Hardware Description
Language (HDL) such as VHDL. Logic can be specified to the HDL as
a text file, a schematic diagram, or a state diagram.
Programmable Logic

entity NandGate is
port(A, B: in bit;
LED: out bit);
end entity NandGate;
architecture GateBehavior of NandGate is
signal A, B: bit;
begin
X <= A nand B;
LED <= X;
end architecture GateBehavior;
Selected Key Terms

Inverter A logic circuit that inverts or complements its inputs.

Truth table A table showing the inputs and corresponding output(s) of a

logic circuit.

Timing A diagram of waveforms showing the proper time

diagram relationship of all of the waveforms.

Boolean The mathematics of logic circuits.

algebra
AND gate A logic gate that produces a HIGH output only when all of its
inputs are HIGH.
 Selected Key Terms

OR gate A logic gate that produces a HIGH output when one or more
inputs are HIGH.

NAND gate A logic gate that produces a LOW output only when all of its
inputs are HIGH.

NOR gate A logic gate that produces a LOW output when one or more
inputs are HIGH.

Exclusive-OR A logic gate that produces a HIGH output only when its two
gate inputs are at opposite levels.
Exclusive-NOR A logic gate that produces a LOW output only when its two
gate inputs are at opposite levels.