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Lab IV Lecture 2: Step 1 Review Introduce Step 2 Course Web Page

This document provides an overview and instructions for Lab IV Lecture 2 on building an audio recording and playback circuit. It outlines the overall goal, provides a step-by-step process, and details for each step. Step 2 involves building the analog to digital converter (ADC) circuit, including designing a floorplan, reading datasheets, and constructing the self-clocked ADC circuit. It provides guidance on testing the ADC with DC inputs and using a logic analyzer to observe the data bus.
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0% found this document useful (0 votes)
46 views

Lab IV Lecture 2: Step 1 Review Introduce Step 2 Course Web Page

This document provides an overview and instructions for Lab IV Lecture 2 on building an audio recording and playback circuit. It outlines the overall goal, provides a step-by-step process, and details for each step. Step 2 involves building the analog to digital converter (ADC) circuit, including designing a floorplan, reading datasheets, and constructing the self-clocked ADC circuit. It provides guidance on testing the ADC with DC inputs and using a logic analyzer to observe the data bus.
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Lab IV Lecture 2

Step 1 Review Introduce Step 2 Course web page


http://www.ece.drexel.edu/courses/ECE-L304

The Overall Idea


Data Bus

8 ADC RAM

8
Signal Output

Signal Input

DAC

Control

The Overall Idea

Ideally we would like to be able to record an audio (voice) message and then play it back. We will see that there are real-world limitations that will limit our success, and some compromises will be needed.

Step by Step

Step 1 Review of ADC and DAC Step 2 Building the ADC Circuit Step 3 Build the DAC Circuit Step 4 Build the On-Board Clock Step 5 Introduce Static RAM Step 6 Introduce Control Logic Step 7 Final Changes
4

Step 2 Prelab

Draw a tentative floorplan for the recording circuit

How to decide?

ADC, DAC, and RAM are hardwired on your board Arrange the other subcircuits (timer, address generator, etc.) so that you minimize the overlap of the connections Since you do not know the details of the all the subcircuits yet, take educated guesses - dont try to force all of your circuit into one corner of your board

You MUST have a floorplan drawing checked before beginning circuit construction
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Step 2 Prelab

Read the ADC0804 datasheet

See the Data Sheets section on the course home page

Read the Tips for Reliable Wirewrapping paper

See Course Documents section on the course home page

Floorplan Elements
Clock DAC RAM

ADC RAM Control

ADC

ADC Display

Resistor array, LED display

Address Generator

16 pin header

8 pin header

Your Custom Design

Hardwired
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Board Center Connectors

ADC Control

CS_, RD_, WR_, INTR_

Power, GND RAM Control

CE1_, CE2, OE_, WE_ A16 - A0

RAM Addresses

Floorplan Design Concerns

Put blocks which interact, such as the memory address generator and the RAM chip, close to one another. Many solutions are possible. Shorter wire lengths will have lower resistance and capacitance and support higher signal speeds. Analog blocks should be kept away from digital blocks if possible. The noise generated by the analog circuits and be picked up by digital lines and corrupt data.
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Step 2 Lab - Start With the ADC


Data Bus

8 ADC RAM

8 DAC

Control

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Step 2 Lab
Self-Clocked ADC

8-pin header Resistor Data Bus Test Port Array

LED Array

Timing & Filter Components

Figure 17/18, ADC0804 data sheet


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What Will You Do?


Design and build circuit Change dc input and record display output

Verify accuracy and determine ADC voltage resolution Using voltage ramp input, observe binary count Observe operation of ADC internal clock

Apply logic analyzer to test port


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ADC Self-Clocked Circuit

Schematic can be found on ADC Data Sheet


15

ADC Design Concerns

What is the bandwidth of human speech? At what frequency should I sample?


High freq high quality short record time Low freq low quality long record time

What are the performance limitation of this ADC chip?


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The Design Decision

Read the ADC data sheet to learn the details of chip operation

Pay particular attention to the Electrical Specifications table

Determine values of external R and C to set the internal clock rate of the ADC

What are the limitations on this rate?


Needs of the circuit Limitations of the ADC chip


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Designing the Self-Clocked Ckt

R between pins 1 and 8 on socket U18 C between pins 2 and 7 on socket U18

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Designing the Self-Clocked Ckt

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DC Measurements

Your ADC will output 8 bits, which can be grouped as 4 high (MS) and 4 low (LS) bits Each group of 4 bits can be represented by a hex character The voltage represented by the digital output is:
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DC Measurements

Lets say your ADC output is 10111001 MS =10112=1110=B16, LS =10012=910=916 The voltage represented by the digital output is:

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DC Measurements

Put your voltage measurements and calculations into a table (or tables) with all proper labels and discussion

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The Logic Analyzer


HP54645D
16 channels of digital input

Analog and digital displays


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The HP Logic Analyzer


There is an HP mixed-signal scope in each rack in 7-208 The digital portion of the scope (logic analyzer) serves the same purpose as the LEDs, but it can do this at high speed

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The HP Logic Analyzer

You will

Observe ADC output bus (bits 7..0) on analyzer channels 0 to 7 for a ramp input. Add an analyzer connection (channel 8) to the INTR pin, Pin 5 of the ADC0804. Use cursors to measure the period between INTR pulses. Download your scope screens for your report.
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Step 2 Deliverables

A functioning circuit

Graded on output, neatness

A copy of your floorplan Report

See details in lab book

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Step 2 Hints

Do your prelab reading. Always check your circuit input for the proper dc offset and amplitude BEFORE connecting it to the input pin. Apply chip power BEFORE signal, remove signal BEFORE removing chip power. This avoids CMOS latchup problems. Not applying Power/Signals/etc in the proper order can damage the chips, and most importantly the RAM, which is not easily replaced.
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Step 2 Hints

Write down in each of your notebooks the reasoning behind choosing the components you used Keep a detailed schematic of each component wiring change and addition that is made. If you do not have a schematic available I will not answer your questions when you are debugging your circuit

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Questions

What is the frequency bandwidth of human speech? What is the minimum sampling rate for digital recording of speech? How many internal clock cycles does this ADC need to take one sample? What is the maximum internal clock rate? What clock rate to you want? Defend this choice. What values of R and C give you this rate?

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DC Testing

Purpose

Test functionality of ADC design Apply dc voltage Record in notebook:


How?

Applied voltage Pattern of LED display

High/low or dark/light

Power supply voltage


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Table of Measurements

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Calculations

Use the equation in your lab notes to calculate the dc voltage, add this to your table, and comment on accuracy Use your data to find the voltage resolution of your system

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Observe Data Bus

Replace your dc input source with a function generator


Voltage ramp output, 0 - 5 V Very low frequency 0.01 to 1 Hz

Observe the progression of the binary count on the display

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Observe Data Bus

Raise the frequency of the function generator to 100 Hz to 1 kHz Observe the status of the data bus on the logic analyzer

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Tech Notes

The anode side of the LED array is the one with the writing on it, pin 1 is marked with a cut corner Apply dc power before applying input signal remove input signal before removing dc power
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Tech Notes

The LED display is indicating negative logic - logic 1 appears dark and a logic 0 appears lit Always connect the ground (black) probe of the logic analyzer to your circuit ground

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Tech Notes

HP provides a basic tutorial on logic analyzers here: http://literature.agilent .com:80/litweb/pdf/5968-8291E.pdf

This link is available from the course web page

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Additional Hints

Do not wirewrap to the top of the board Your calculated internal clock frequency will not match your actual measured frequency, why is this true? (Think about the value of the components used) Always ground both leads of the logic analyzer, even if you are not using one of the leads Do not rely on Autoscale to find your signal for you every time, pay close attention to your triggering signals Think through your debugging plan when the circuit does not work. Create a list of things to check, i.e. power supply, inputs, wiring. 99% of problems are due to construction not broken chips Have the functionality of your circuit checked before you leave and be prepared to answer questions about the circuit when 38 asked

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