INSTRUCTION SET OF 8086

Data Transfer/Copy Instructions

Arithmetic and logical Instructions
Branch instructions
Loop Instructions
Machine control Instructions
String instructions
Flag manipulation Instructions
Shift and Rotate Instructions
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 MOV AX, 5000H Immediate
MOV AX,BX Register
MOV AX, [SI] indirect
MOV AX, [2000H] Direct
MOV AX, 50H[BX] Based relative 50 H displacement
MOV DS, 5000H Not permitted
MOV AX, 5000H
MOV DS, AX

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 Data Transfer/Copy Instructions

Used to transfer data from operand to destination operand.

All the store, move, load, exchange, input and output instructions
belonging to this category.

Arithmetic and logical Instructions

All the instructions performing arithmetic, logical, increment,

decrement, compare and scan instructions belong to this category.
Branch Instructions

These instructions transfer control of execution to the specified address.

All the call, jump, interrupt,instructions belongs to this category and
return
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 Loop Instructions

If these instructions have REP prefix with CX used as count register, they can be used to
implement unconditional and conditional loops.
LOOP, LOOPNZ, and LOOPZ belongs to this category

Machine control Instructions

These instructions controlthe machine status.
NOP, HLT, WAIT, and LOCK instructions belong to this class

Flag manipulation instructions Instructions

All the instructions which directly affect the flag register

CLD, STD, CLI, STI etc.

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 Shift and rotate Instructions

These instructions involve the bitwise shifting or rotation in either direction with or without a
count in CX.

String Instructions
These instructions controlthe machine status.
These instructions involve various string manipulation operatins like load, move, scan, compare,
store, etc.
These instructions are only to be operated upon strings.

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 8086
Microprocess
Data can transfer from
or
1. Data Transfer/copy Instructions 1. Memory to register
2. Register to memory
3. Register to register only.

Instructions that are used to transfer data/ address in to

registers, memory locations and I/O ports.

 Generally involve two operands: Source operand and

Destination operand of the same size.

 Source: Register or a memory location or an immediate data

 Destination : Register or a memory location.

 The size should be a either a byte or a word.

 A 8-bit data can only be moved to 8-bit register/ memory and a

16-bit data can be moved to 16-bit register/ memory.

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 8086
Microprocess Instruction Set
or
1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

MOV reg2/ mem, reg1/ mem

MOV reg2, reg1 (reg2) (reg1)

MOV mem, (mem) (reg1)
reg1 MOV (reg2) (mem)
reg2, mem
MOV reg/ mem, data

MOV reg, data (reg) data

MOV mem, data (mem) data

XCHG reg2/ mem, reg1

XCHG reg2, reg1 (reg2) (reg1)

XCHG mem, (mem) (reg1)
reg1

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 8086
Microprocess Instruction Set
or
1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

PUSH reg16/ mem  Syntax: PUSH source

 Used to store temporary data
PUSH reg16  PUSH BX
 Copy BX to stack and decrement SP by 2
PUSH AX (moves to stack memory)

PUSH mem

POP reg16/ mem  PUSH BX

 Copy stack to 88BX and increment SP by 2
POP reg16

POP AX ( stack memory to source)

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3
 8086
Microprocess Instruction Set
or
1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

IN A, [DX] OUT [DX], A

IN AL, [DX] PORTaddr = (DX) OUT [DX], AL PORTaddr = (DX)

(AL) (PORT) (PORT) (AL)

IN AX, [DX] PORTaddr = (DX) OUT [DX], AX PORTaddr = (DX)

(AX) (PORT) (PORT) (AX)

IN A, addr8 OUT addr8, A

IN AL, addr8 (AL) (addr8) OUT addr8, AL (addr8) (AL)

IN AX, (AX) (addr8) OUT addr8, (addr8) (AX)

addr8 AX

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 8086
Microprocess Instruction Set
or
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

ADD reg2/ mem, reg1/mem

ADC reg2, reg1 (reg2) (reg1) + (reg2)

ADC reg2, (reg2) (reg2) + (mem)
mem ADC (mem) (mem)+(reg1)
mem, reg1
ADD reg/mem, data

ADD reg, data (reg) (reg)+ data

ADD mem, data (mem) (mem)+data

ADD A, data

ADD AL, data8 (AL) (AL) + data8

ADD AX, data16 (AX) (AX) +data16

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 8086
Microprocess Instruction Set
or
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

ADD reg2/ mem, reg1/mem

ADC reg2, reg1 (reg2) (reg1) + (reg2)

ADC reg2, (reg2) (reg2) + (mem)
mem ADC (mem) (mem)+(reg1)
mem, reg1
ADD reg/mem, data

ADD reg, data (reg) (reg)+ data

ADD mem, data (mem) (mem)+data

ADD A, data

ADD AL, data8 (AL) (AL) + data8

ADD AX, data16 (AX) (AX) +data16

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 8086
Microprocess Instruction Set
or
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

ADC reg2/ mem, reg1/mem

ADC reg2, reg1 (reg2) (reg1) + (reg2)+CF

ADC reg2, (reg2) (reg2) + (mem)+CF
mem ADC (mem) (mem)+(reg1)+CF
mem, reg1
ADC reg/mem, data

ADC reg, data (reg) (reg)+ data+CF

ADC mem, (mem) (mem)
data +data+CF

ADC A, data

ADD AL, data8 (AL) (AL) + data8+CF

ADD AX, (AX) (AX)
data16 +data16+CF

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 8086
Microprocess Instruction Set
or
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

SUB reg2/ mem, reg1/mem

SUB reg2, reg1 (reg2) (reg1) - (reg2)

SUB reg2, (reg2) (reg2) - (mem)
mem SUB (mem) (mem) - (reg1)
mem, reg1
SUB reg/mem, data

SUB reg, data (reg) (reg) - data

SUB mem, data (mem) (mem) - data

SUB A, data

SUB AL, data8 (AL) (AL) - data8

SUB AX, data16 (AX) (AX) - data16

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 8086
Microprocess Instruction Set
or
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SBB, INC, DEC, MUL, DIV, CMP…
SUB,
SBB reg2/ mem, reg1/mem

SBB reg2, reg1 (reg2) (reg1) - (reg2) - CF

SBB reg2, (reg2) (reg2) - (mem)- CF
mem SBB (mem) (mem) - (reg1) –CF
mem, reg1
SBB reg/mem, data

SBB reg, data (reg) (reg) – data - CF

SBB mem, (mem) (mem) - data - CF
data

SBB A, data

SBB AL, data8 (AL) (AL) - data8 - CF

SBB AX, (AX) (AX) - data16 - CF
data16

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 8086
Microprocess Instruction Set
or
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

CMP A, data

CMP AL, Modify flags (AL) – data8

data8
If (AL) > data8 then CF=0, ZF=0, SF=0
If (AL) < data8 then CF=1, ZF=0,
SF=1 If (AL) = data8 then CF=0,
ZF=1, SF=0

CMP AX, Modify (AX) – data16

data16 flags
If (AX) > data16 then CF=0, ZF=0,
SF=0
If (mem) < data16 then CF=1, ZF=0, SF=1
If (mem) = data16 then CF=0, ZF=1,
SF=0

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 8086
Microprocess Instruction Set
or
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 8086
Microprocess Instruction Set
or
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 8086
Microprocess Instruction Set
or
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
 Test instruction performs a bit by bit logical AND operation on the two operands
 Each bit of result is set to one. The corresponding bits of both are one. Else result bit reset to 0
 Further AND operation not available
 But flags are effected , flags are OF, CF, SF, ZF, and PF.

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 8086
Microprocess Instruction Set
or
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 8086
Microprocess Instruction Set
or
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 8086
Microprocess Instruction Set
or
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
RCR, Rotate right through carry
RCL, Rotate left through carry
ROL, Rotate left without carry
ROR, Rotate right without carry

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 8086
Microprocess Instruction Set
or
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 8086
Microprocess Instruction Set
or
4. String Manipulation Instructions
To perform string operation two parameter are required
i. Start and end address of the string
ii. Length of the string
iii. Length of the string usually stored in count CX register

 String : Sequence of bytes or words

 8086 instruction set includes instruction string movement, comparison,

scan,
for load and store.

 REP instruction prefix : used to repeat execution of string

instructions
 String instructions end with S or SB or SW.
S represents string, SB string byte and SW string
word.
 Offset or ffective address of the source operand is stored in SI and
e
that of register
destination operand is stored in DI register.
the
 Depending on the status of DF, SI and DI registers are
automatically updated.

 DF = 0 SI and DI are incremented by 1 for byte and 2 for word.

08/31/2024  DF = 1 SI and DI are decremented by 1 for byte and 2 for word. 24

The counter in both cases decrement by ‘1’.
• REP: Repeat
• This allows the string instruction to repeat itself until CX=0
• It decrement CX after execution and if it zero.
• Not it will repeat, continue until CX=0. 0, after next instruction will
perform.
• REPE/REPZ : repeat while equal / zero.
• REPNE/REPNZ : repeat while NOT equal / NOT zero. Both used in CMPS
and SCAS.
• MOVSB/MOVSW: move string byte / string word.
• CMPS: compare string byte or string word
• SCAS: scan string byte or string word
• LODS: LOAD string byte or string word
• STOS: store string byte or string word
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STOS: store string byte or string word
• Stores in AL/AX register contents to a location string pointed by ES:DI register pair.
• DI modified accordingly, Flags NOT affected.
• SI and DI modify after each execution.
• DF=1  AUTODECREMENT
• DF=0  AUTOINCREMENT

SCAA: SCAN string byte or string word

• AL/AX register contents to a location string pointed by ES:DI register pair.
• LENGTH stored in CX.
• If the match is found, stops and ZF is set otherwise reset.
LODS: LOAD string byte or string word
• LOADS the AL/AX register contents to a location string pointed by ES:DI register pair.
• SI is modified automatically depends on the DF
• If it is BYTE, LODSB, SI modified by one. WORD, LODSW, SI modified by two
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 8086
Microprocess Instruction Set
or
4. String Manipulation Instructions
Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
Scan (compare) a string byte or word with accumulator
SCAS

SCASB MAE = (ES) x 1610 + (DI)

Modify flags (AL) - (MAE)

If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0

If (AL) < (MAE), then CF = 1; ZF = 0; SF =
1 If (AL) = (MAE), then CF = 0; ZF = 1; SF
=0
If DF = 0, then (DI) (DI) + 1
If DF = 1, then (DI) (DI) – 1

SCASW MAE = (ES) x 1610 + (DI)

Modify flags (AL) - (MAE)

If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0

If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1
If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0

If DF = 0, then (DI) (DI) + 2

8
If DF = 1, then (DI) (DI) – 2 8
 Branch Instructions

These instructions transfer control of execution to the specified address.

All the call, jump, interrupt,instructions belongs to this category and return
• Normally the processor executes the program in a sequential manner, due to
continuous increment of IP ( instruction pointer ).
• Branch instructions in this 8086 microprocessor are that jumps to another
part of the program without executing in a sequential manner.
• Jump instruction:
• This lets the processor jump to a specified location to execute from. From the
new location again code will be executed sequentially. The address changes
suddenly when jump operation is performed.
• There are two types of jump operation.
• Intrasegment branching
• Intersegment branching
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 This is when jump operation is performed between segments. This is also known as far jump.
As this jump operation is across the segments , both CS and IP ( segment address and offset
address ) will change

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08/31/2024 30
Conditional jumps:
JC:
This stands for Jump if Carry.
Eg: JC next;
If the carry flag = 1, then it will jump to the “next” label.
JNC:
This stands for Jump if No Carry.
Eg: JNC next;
If the carry flag = 0, then it will jump to the “next” label.
JZ:
This stands for Jump if Zero.
Eg: JZ next;
If the zero flag = 1, then it will jump to the “next” label.
JNZ:
This stands for Jump if No Zeroy.
Eg: JNZ next;
If the zero flag = 0, then it will jump to the “next” label.
JPE:
This stands for Jump if Parity is Even.
Eg: JPE next;
If the parity flag = 1, then it will jump to the “next” label.

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JPO:
This stands for Jump if Parity is Odd.
Eg: JPO next;
If the parity flag = 0, then it will jump to the “next” label.
JO:
This stands for Jump if Overflow.
Eg: JO next;
If the overflow flag = 1, then it will jump to the “next” label.
JNO:
This stands for Jump if No Overflow.
Eg: JNO next;
If the overflow flag = 0, then it will jump to the “next” label.
JS:
This stands for Jump if Sign.
Eg: JS next;
If the sign flag = 1, then it will jump to the “next” label.
JNS:
This stands for Jump if No Sign.
Eg: JNS next;
If the sign flag = 0, then it will jump to the “next” label

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Flag manipulation or process control instructions

• Categorized in to 2
• 1. Flag manipulation instructions
• 2. Machine control instruction
• The flag manipulation instructions directly modify some of the flags of
8086.
• The machine control instructions control the bus usage and execution

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Flag manipulation instructions
• 1. CLC --- Clear carry flag, CLCCARRY 0
• 2. CMC --- Complement Carry flag 01, 10.
• 3. STC --- Set Carry Flag STC SET CARRY 1

• 4. CLD --- Clear Direction Flag D0

• 5. SDF --- Set Direction Flag D1

• 6. CLI --- Clear Interrupt Flag, CLEAR INTERRUT 0

• 7. STI --- Set Interrupt Flag, SET INTERRUPT1

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Machine control instructions
• 1. WAIT ---- Wait for the Test input pin to go low. Refer test pin.
• 2. HLT ---- Halt the processor, HALT or PAUSE our programme.
• 3. NOP ---- No operation, be ideal for some time
• 4. ESC ---- Escape to external device like NDP(numeric co-processor),
escape to other processor
• 5. LOCK ---- Bus lock instruction prefix, in max mode to avoid other
processor requisitions.

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WAIT
• This instruction is used to prevent the CPU from accessing memory that may be
temporarily in use by coprocessor
• TEST =0 ;; Processor is busy (ie, working with memory) Else Processor is idle.
• If WAIT is executed during TEST pin 0:: the processor waits for it to return 1
If WAIT is executed during TEST pin 1:: , the processor can continue with execution

LOCK
When the CPU is executing a critical instruction
which requires the system bus, the LOCK prefix
instruction ensures that other processors connected
in the system will not gain the control of the bus

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