CHAPTER 6

Memory and
I/O
INTERFACING
Compiled by:
Wogayehu A.
1
 MEMORY INTERFACING AND
• I/OINTERFACING
An interface is a concept that refers to a point of
interaction between components, and is applicable at
the level of both hardware and software.
• Interface is the path for communication between
two components.
• Interface acts as a communication between user and a
computer. It is an integrated circuit which helps in performing
basic functions of the CPU.
• Interfacing is of two types,
o memory interfacing and I/O interfacing.
• In memory interfacing 16 bit data lines
and 20 bit address lines, control signals
connected to the corresponding lines of
Memory IC.
• In I/O device interfacing 16 bit data lines, 16 bit address
2
lines and control signals are connected to corresponding
 MEMORY INTERFACING AND
I/OINTERFACING
Memory Interfacing
• While executing a program, the microprocessor
needs to access memory frequently to read
instruction code and data stored in memory; the
interfacing circuit enables that access.

• the microprocessor initiates a set of signals

when it wants to read from and write into
memory.

• The primary function of memory interfacing is

that the microprocessor should be able to read
from and write into a given register of a memory
chip 3
 MEMORY INTERFACING AND
I/OINTERFACING
I/O Interfacing
• The Input/output devices such as keyboards
and
displays are the communication channels to the
outside world.
• Latches and buffers are used for I/O interfacing.
• They once hardwired, perform only one function
(either as input device if it is buffer and as output
device if it is a latch). Thus limiting their
capabilities.
• To improve the overall system performance the
Intel
has designed various programmable I/O devices.
4
 MEMORY INTERFACING AND
I/OINTERFACING
• The programmable peripheral device is a
combination of many devices on a single chip.

• The advantage of programmable device is

that
they can be set up to perform specific
functions by writing a code in its internal
register.

• As this code controls the function of the

programmable device, it is called control word
and the register in which it is stored
internally
5
is called control register.
MEMORY INTERFACING AND
I/OINTERFACING
Some of the peripheral devices developed by
Intel for 8085/8086/8088 based system are:

• 8255 - Parallel Communication Interface

• 8251 - Serial Communication Interface
• 8254 - Programmable Timer
• 8279 - Keyboard / Display Controller
• 8257 - DMA Controller
• 8259 - Programmable Interrupt Controller

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Interfacing ………………..
Ways of Communication − Microprocessor with the Outside World?
There are two ways of communication in which the microprocessor can
connect with the outside world.
1. Serial Communication Interface
2. Parallel Communication interface

Serial Communication Interface − In this type of communication, the

interface gets a single byte of data from the microprocessor and sends it
bit by bit to the other system serially and vice-a-versa.

Parallel Communication Interface − In this type of communication, the

interface gets a byte of data from the microprocessor and sends it bit by
bit to the other systems in simultaneous (or) parallel fashion and vice-a-
versa.
7
Memory and IO Interfacing –
Remember…..
BASIC INTERFACING IN MICROPROCESSOR

MEMORY DEVICES I/O 4

DEVICES
read how to demultiplex the common lines (AD0 –
AD15), and read the functions of Latches and
Transreceivers
5
 Interface
• I/O ports are the devices through which the
microprocessor communicates with other
devices or external data sources/destinations.
– Using I/O devices data can be transferred
between the microprocessor and the outside
world.
• Input activity, as one may expect, is the
activity that enables the
microprocessor to read data from
external devices.
• Output activity transfers data from the
microprocessor to the external
devices.
 Memory Interfacing
 When we are executing any instruction, the address of memory
location or an I/O device is sent out by the microprocessor.
 The corresponding memory chip or I/O device is selected by a
decoding circuit.
 Memory requires some signals to read from and write to registers
and microprocessor transmits some signals for reading or writing
data.

I/O interfacing
 As we know, keyboard and displays are used as communication
channel with outside world.
 Therefore, it is necessary that we interface keyboard and displays
with the microprocessor. This is called I/O interfacing.
 For this type of interfacing, we use latches and buffers for
interfacing the keyboards and displays with the microprocessor.
Examples Keyboard Interfacing
 Data Transfer using IO Structure
• There are three major types of data transfer
between the microprocessor and I/O device.
• Programmed I/O : In programmed I/O the
data transfer is accomplished through an I/O
port and controlled by software.
• Interrupt driven I/O : In interrupt driven I/O,
the I/O device itself will interrupt the
processor, and initiate data transfer.
• Direct memory access (DMA) : In DMA, the
data transfer between memory and I/O can be
performed by bypassing the microprocessor.

14
Data Transfer using IO Structure

15
 External Interface
• Two ways of interfacing I/O devices
o Serial
Cheaper
Slower
o Parallel
Faster Data
skew
Limited to small distances

• A UART (Universal
asynchronous
receiver/transmitter) is
used for serial
communications over a 16
computer or peripheral
 External Interface
• IO Communication Methods
1. Serial
Serial communication is the process
of sending data one bit at one time,
sequentially, over a communication
channel or computer bus.
2. Parallel
In parallel communication , on the
other hand, several bits are sent
together on a link comprising of
several wired channels in parallel.
17
 Data Transfers (serial)
• Synchronous ----- Usually occur when
peripherals are located within the
same computer as the CPU. Close
proximity allows all state bits change at
same time on a common clock.
• Asynchronous ----- Do not require that
the source and destination use the
same system clock.

11
 IO Address Space
• In 8086 μP, As with memory,
I/O devices have I/O addresses
(addresses for the I/O port)
• It can generate 16-bit of I/O
address.
• Thus, it can address up to 64K
byte I/O locations or 32 K
word locations.
• The 16-bit port address
appears on address bus bits
A15-A0; A16 to A19 lines are at
logic 0 during the I/O
operations
• This allows I/O devices at
addresses 0000H-FFFFH 12
 Types of parallel Interface
• There are two ways to interface 8086
with I/O devices in parallel data
transfer mode:
– Memory Mapped IO
– IO Mapped IO

13
Types of parallel Interface… Cont’d
• Memory Mapped IO
– It considers them like any other
memory location.
– It uses the same address space to
address both memory and I/O devices.
o In this type of I/O interfacing, the 8086 uses
20 address lines to identify an I/O device.
o The I/O device is connected as if it is a
memory device.
o The 8086 uses same control signals and
instructions to access I/O as those of
memory. Here RD and WR signals are
activated when M/IO signal is high, indicating
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memory bus cycle.
Types of parallel Interface… Cont’d
• IO mapped IO
– sometimes referred to as isolated I/O.
– It treats them separately from memory.
o The user in this case would access these
devices using the IN and OUT
instructions only.

15
Types of parallel Interface… Cont’d
• IO mapped IO
– IN and OUT instructions
o The IN instruction copies data from a port to
the Accumulator.
o If an 8-bit data is read data will go to AL and if
16-bit data is read the data will go to AX.
o The OUT instruction copies a byte from AL or a
word from AX to the specified port.
o The M/IO signal is always low when 8086 is
executing these instructions.
o In this address of I/O device is 8-bit or 16-
bit.
o It is 8-bitaddressing.
Indirect for Direct addressing and 16-bit 16
for
Direct vs Indirect IO
addressing
Direct and Indirect I/O addressing Modes
• In Direct addressing , the 8-bit I/O address (Port)
can be specified immediately in the instruction.
• we can address 28 = 256 ports only.
• In Indirect I/O addressing, the 16-bit I/O address
is indirectly accessed through the 16-bit DX
register.
• DX register is used as 16-bit I/O address
space pointer to address up to 64K= 65536
locations.
17
Isolated IO vs Memory-Mapped
IO
Memory Mapped IO
• Memory mapped IO is one where the
processor and the IO device share the same
memory location (memory) i.e., there is no
separate space for IO.
• Some space gets wasted and due to this
addressing capability becomes less.
•Port numbers are stored in memory area.
IO Mapped IO (Isolated IO)
• IO mapped is one where the processor and
the IO device have different memory
locations to each other. 18
 Isolated IO vs Memory-Mapped
IO FFFFF Memory IO port specified in DX,
either explicitly or implicitly
IO
FFFF

1M x 8 64K x 8 64K IO
bytes
00FF
0000
00000
Memory + IO
FFFFF Port specified immediately as a
byte in the I/O instruction
b. memory-mapped IO
Using ordinary
memory transfer IO Range of memory addresses
instructions
e.g. MOVE (MOV)
assigned for IO transfers

00000 19
Isolated IO vs Memory-Mapped
IO

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Isolated IO

28
Memory-Mapped IO

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IO mapped IO V/s Memory Mapped
IO
Memory Mapped IO IO Mapped IO
• IO is treated as memory. • IO is treated IO.
• More Decoder • Less Decoder
Hardware. Hardware.
• Less memory is • Whole memory address
available. space is available.

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Memory Mapped IO IO Mapped
IO
• Memory Instructions • Special Instructions are
areused. used like IN, OUT.
• Memory control • Special control signals
signals (MEMR and are used. (IORC and
MEMW) are IOWC)
used. • Arithmetic and logic
• Arithmetic and operations can not
logic be performed on
operations can be data.
performed on
data. • Data
accumulator
transfer b/w IO 24
and
Memory Mapped IO IO Mapped
IO
• Advantage • Advantage
o I/O transfers can o Complete memory
take place between address space available
I/O port and any for use by memory.
of the registers. o I/O instructions
maximizes the
• Disadvantage performance.
o Memory
perform slower.
instructions • Disadvantage
o Part of the memory address o
All inputs/outputs
space cannot be used to must take place
implement memory.
o a portion of memory system is used between an I/O port
as the I/O map, reducing and accumulator
available memory register.
 The IO Interface
• Input / Output (I/O) devices provide the means by
which the computer system can interact with the
outside world.
• Computers use I/O devices (also called peripheral
devices) for two major purposes:
1. To communicate with the outside world and,
2. Store data.
• Devices that are used to communicate like, printer,
keyboard, modem.
• Devices that are used to store data like disk drive.

33
 The IO Interface
• I/O devices are connected to the system bus
through I/O controller (interface)
–which acts as an interface between the system
bus and I/O devices.
• The 8086μP employs two different types of
input/output (I/O): Isolated I/O and Memory-
mapped I/O. (Refer slides 18 & 19)
– These I/O methods differ in how I/O ports
are mapped into the 8086's address spaces.

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 The IO Interface
Refer back slides 18 & 19
• Two different methods of interfacing I/O are
isolated I/O and memory-mapped I/O.
• In isolated I/O instructions transfer data between
the microprocessor’s accumulator and the I/O
device.
– Uses IN & OUT instructions
• In memory-mapped I/O, any instruction that
references memory can accomplish the
transfer.

35
 The IO Mapped IO Instructions
• Instructions that transfer data between an I/O
device and the microprocessor’s accumulator
(AL, AX) are called IN and OUT.
• The I/O address is stored in either:
– Register DX as a 16 -bit I/O address (variable addressing)
or,
– The byte, (p8), immediately following the opcode as an
8-bit address (fixed address)
• IN AX, p8; Reads a word from port p8
– 0000H-00FFH (can only see the first 256 addresses)
• OUT DX, AL; outputs the byte in AL to the port whose
address is in DX
– 0000H-FFFFH (up to 16K addresses). i.e. high port
addresses are accessible only through DX addressing 36
 The IO Mapped Instructions
2 Formats
Inputting Data IN Outputting Data OUT
dest, source dest, source
1. Direct Addressing Mode: port# is the address of the port and
can be from 00 to FFH ( allowing up to 256 ports). In this
format, the 8-bit port address is carried on address bus A0 - A7.
Outputting Data OUT
Inputting Data IN AL, port# port#, AL
2. Indirect Addressing Mode : port# is the address of the port, in
the range from 0000H to FFFFH( allowingup to 65, 536 ports).
In this format, the 8-bit port address is carried on address bus
A0 – A5.
Inputting Data Outputting Data
MOV DX, port# MOV DX, port#
IN AL, DX OUT DX, AL
 The IO Mapped Instructions
• IN AL, 19H ;8-bits are saved to AL from I/O port
19H.
• IN AX, DX ;16-bits are saved to AX.
• OUT DX, AX ;16-bits are written to port DX
from AX.
• OUT 19H, AX ;16-bits are written to I/O port
0019H.
The IO Ports Width
• I/O ports are 8 bits in width.
– a 16-bit port is actually two consecutive 8 -bit
ports being addressed
• So I/O ports could be 8-bit or 16-bit. 38
Examples

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 Examples
• Data are to be read in from two byte-wide input
ports at address AA and A9, respectively, and then
output as a word to a word-wide Output port at
address B000. Write a sequence of instructions to
Perform this I/O operation
IN AL, AA ; move data in from port address AA
MOV AH,AL ; move data from AL to AH
IN AL,A9 ; move data from port address A9
MOV DX, B000 ; move port address B000 to DX
OUT DX, AX ; can I do OUT B000, AX instead ??????
AH AL

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 Examples
• The following code transfers the contents of
register BL to port address 378H.

MOV DX,378H MOV;DX=378 the port address

AL,BL OUT DX,AL ;load data into accumulator
;write contents of AL to port
;whose address is in DX

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 Examples
• The following program sends values 55H and AAH
to I/O port address 300H (a 16-bit port address);
the program toggles the bits of port address 300H
continuously.
BACK: MOV DX, 300H ;DX = port address 300H
MOV AL, 55H
OUT DX, AL ;toggle the bits
MOV AL,0AAH
OUT DX, AL ;toggle the bits
JMP BACK

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 Examples
• Example: In a given 8088-based system, port
address 22H is an input port for monitoring the
temperature. Write Assembly language instructions
to monitor that port continuously for the
temperature of 100 degrees. If it reaches 100, then
BH should contain ‘Y’.
• Solution:
BACK: IN AL,22H ;get the temperature from port #
22H CMP AL,100 ;is temp = 100?
JNZ BACK ;if not, keep monitoring
MOV BH,’Y’ ;temp = 100, load ‘Y’ into BH
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 Examples
• The following program gets data from port address
300H and sends it to port address 302H.

MOV DX, 300H ;load port address

IN AL, DX ;bring in data
MOV DX, 302H ; load port address
OUT DX, AL ;send it out

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 How I/O Data Transfer
Occurs
• When data are transferred using IN or OUT, the
I/O address, (port number or simply port),
appears on the address bus.
• External I/O interface decodes the port number in
the same manner as a memory address.
– the 8-bit fixed port number (p8) appears on
address bus connections A7–A0 with bits A15–A8
equal to 000000002
• Address connections above A15 are undefined for
I/O instructions

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 How I/O Data Transfer Occurs
• The 16-bit variable port number (DX) appears on
address connections A15–A0.
• The first 256 I/O port addresses (00H –FFH) are
accessed by both fixed and variable I/O
instructions.
– any I/O address from 0100H to FFFFH is only
accessed by the variable I/O address

46
 Basic Input and Output Interfaces
• How can you connect a keyboard, or a mouse, to
an 8086 microprocessor?
• In the 8086 microprocessor, I/O devices are
connected via the address and data buses and
the mechanism is similar to the memory
interface.
• Data transfer takes place over the multiplexed
address/data bus.

47
 Basic Input and Output Interfaces
• All I/O devices are connected to the address bus
and data bus. However, we still use the term I/O
port to describe the connection between the
8086 and an I/O device.
• Since only address lines A0 to A15 are used by
I/O devices so a total of 64K devices can be
connected to the system.
• Similar to memory devices, byte is the basic unit
for data transfer so if an I/O device transfers 16-
bit data then it will occupy 2 ports.
o So I/O ports could be 8-bit or 16-bit.
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 Basic Input and Output Interfaces
• I/O port number (16-bit) are generated by
microprocessor via the ADn lines and after
proper decoding, correct I/O port can be
selected.
• AD16 to AD19 are held at 0 for I/O
operations.
• When accessing memory, we use move (MOV)
operations.
• When accessing I/O port, we use IN and OUT.
There are two forms of IN OUT instructions:
direct and indirect.
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 Basic Input and Output Interfaces
Minimum-Mode 8086 System Isolated IO interface

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 Basic Input and Output Interfaces
Maximum-Mode 8086 System Isolated IO interface

51
Basic Input and Output Interfaces
Example - 64 Output lines (8 Ports) Circuit I/O

52
Basic Input and Output Interfaces
Example
• Refer to the previous diagram
I. To which port are data being written when
the address put on the bus during an output
bus cycle is 8002(Hex)
II. How to output the byte contents of the
memory location called DATA to output Port 0
by simple assembly language?

53
Basic Input and Output Interfaces
Solution: I
• A15…A0 = 1000 0000 0000 00010B
A15L = 1, A0L = 0
A3L A2L A1L = 001
P1 = 0
• The input select for the 8205 is driven by A1L A2L
and A3L
• For the address 8002, the 3 bits are 001
• So Port 1 is selected

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Basic Input and Output Interfaces
Solution: II
• The control required to select the Port 0 is 8000
(refer to previous slide, Port 1 is 8002)

• The instruction is
Mov DX, 8000
Mov AL, DATA
Out DX, AL

55
Basic Input and Output Interfaces
• The basic input device (to the microprocessor) is a set of
three-state buffers.
• The basic output device (from the microprocessor

) is a set of data latches.

• The term IN refers to moving data from the

I/O device into the microprocessor and,

• The term OUT refers to moving data out of
the
microprocessor to the I/O device.
Basic Input and Output Interfaces
Example - 64 INPUT lines (8 Ports) Circuit
 Handshaking
• Many I/O devices accept or release information slower than
the microprocessor.
• A method of I/O control called handshaking or polling,
synchronizes the I/O device with the microprocessor.
– A device indicates that it is ready for a command or data
(through some I/O pin or port).
– The processor issues a command to the device, and
the device indicates it is busy (not ready).
– The I/O device finishes its task and indicates a ready condition,
and the cycle continues.
• This process of interrogating the device is called
handshaking.
 Handshaking
• There are two basic mechanisms for the processor to
service a device.
• Polling: Processor initiated. Device indicates it is ready by
setting some status bit and the processor periodically
checks it.
• Interrupts: Device initiated. The act of setting a status bit
causes an interrupt, and the processor calls an ISR to
service the device.
• An example is a parallel printer that prints a few hundred
characters per second (CPS).
• The processor can send data much faster.
– a way to slow the microprocessor down to match
speeds with the printer must be developed
59
 Decoding IO port Addresses
• For memory-mapped I/O, decoding is identical to
memory decoding.
• For isolated I/O, IORC and IOWC control signals are
developed using M/IO, WR and RD pins of the
microprocessor.
• The difference between memory decoding and
isolated I/O decoding is the number of address
pins connected to the decoder.

60
Decoding IO port Addresses
• For Fixed an 8 -bit I/O port addresses (on the
range 0000H – 00FFH), immediate addressing is
used, that is on the address bits A7–A0
– we often decode only address connections
A7–A0 for an 8-bit I/O port address
• For indirect IO addressing modes, since 16- bit I/O
port addresses (Ports on the range 0000H – FFFFH)
are used, we decode address connections A0-A15
 Decoding IO port Addresses
74LS373 In an output port design
• When a data is sent out by the CPU via the data bus the data
must be latched by the receiving device
• While Memories have an internal latch to grab data,
however;
• a latching system must be designed for simple I/O ports (
E.g. Design of input output port using TTL logic gates
74SL373 and 74LS244)
• Steps for IO Address bus decoding
1. The control signals IOW and IOR are used along decoder
2. for 8 bit port, A0-A7 are decoded, then again
ANDed with one of the signals in 1. (if operation is
Out , control signal is IOW; if operation is IN, control signal is
IOR)
3. If port is 16 bit (using DX register), A0-A15 are
decoded,
then again ANDed with one of the signals in 1
 Decoding IO port Addresses
74LS373 In an output port design
 Decoding IO port Addresses
74LS373 In an output port design
Analyze Figure below Under what condition(s)
74LS373 is activated?
Figure Design for “OUT 99H,AL”
This part is for what
you are supposed to
give more attention

For an output latch, it is common to

AND the output of the address
Address Decoder decoder with control signal IOW.

Control Signal
 Decoding IO port Addresses
74LS373 In an output port design
• The design of an output port with an address of 31FH
using the 74LS373 is shown below.

Design for Output port address of 31FH

 Decoding IO port Addresses
74LS373 In an output port design
• Question: Change this design into sequence of
instructions

Address: A9 A8 … A1 A0 = 11 0001 1111 = 31FH

• it’s not 8-bit port address, so we need
to use indirect addressing IO mode.
Control Signal: IOW , i.e., it’s IO write operation
• we need to use OUT instruction

MOV DX, 31FH

OUT DX, AL; or OUT DX, AX
 Decoding IO port Addresses
IN port design using the 74LS244

• When data is coming in by way of a data bus, it must

come in through a three-state buffer.
• This is referred to as tristated, which comes from the
term tri-state buffer.
• “tri-state” is a registered trademark of National
Semiconductor Corp.

60
 Decoding IO port Addresses
• IN port design using the 74LS244
• A tri-state buffer is internal and
therefore invisible.
• For the simple input ports we
use the 74LS244 chip. See
Figure 11-4.
• Notice that since 1G and 2G
each control only 4 bits of the
74LS244, they both must be
activated for the 8-bit input
Figure 11-4. 74LS244 Octal Buffer
 Decoding IO port Addresses
• IN port design using the 74LS244

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 Decoding IO port Addresses
• Problem; Show the design of an input port with an
I/O address of 9FH using 74LS244

Address
Control
Decoder signal

• Exercise. What change(s) would you do to change the

design to “IN AL,6AH”?
End of Chapter-6