Demo 2 Boolean - Algebra - & - Logic - Gates
Demo 2 Boolean - Algebra - & - Logic - Gates
Chapter 2:
Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Basic Definitions
Binary Operators
● AND
z=x•y=xy z=1 if x=1 AND y=1
● OR
z=x+y z=1 if x=1 OR y=1
● NOT
z = x = x’ z=1 if x=0
Boolean Algebra
● Binary Variables: only ‘0’ and ‘1’ values
● Algebraic Manipulation 2 / 28
Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Boolean Algebra Postulates
Commutative Law
x•y=y•x x+y=y+x
Identity Element
x•1=x x+0=x
Complement
x • x’ = 0 x + x’ = 1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Boolean Algebra Theorems
Duality
● The dual of a Boolean algebraic expression is obtained
by interchanging the AND and the OR operators and
replacing the 1’s by 0’s and the 0’s by 1’s.
● x•(y+z)=(x•y)+(x•z) Applied to a valid
equation produces
● x+(y•z)=(x+y)•(x+z) a valid equation
Theorem 1
● x•x=x x+x=x
Theorem 2
● x•0=0 x+1=1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Boolean Algebra Theorems
Theorem 3: Involution
● ( x’ )’ = x (x)=x
Theorem 4: Associative & Distributive
● (x•y)•z=x•(y•z) (x+y)+z=x+(y+z)
● x•(y+z)=(x•y)+(x•z)
x+(y•z)=(x+y)•(x
+z)
Theorem 5: DeMorgan
● ( x • y )’ = x’ + y’ ( x + y )’ = x’ • y’
● (x•y) =x +y (x+y) = x•y
Theorem 6: Absorption
● x•(x+y)=x x+(x•y)=x 5 / 28
Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Operator Precedence
Parentheses
x [ y z ( w x )]
( . . . ) • ( . . .)
NOT ( w x)
x’ + y ( w x)
AND z ( w x)
x+x•y
y z ( w x)
OR
x [ y z ( w x )]
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
DeMorgan’s Theorem
a [b c (d e )]
a [b c (d e )]
a b (c ( d e ))
a b (c (d e ))
a b (c (d e))
a b (c d e) 7 / 28
Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Boolean Functions
Boolean Expression
x y z F
Example: F = x + y’ z 0 0 0 0
Truth Table 0 0 1 1
0 1 0 0
All possible combinations
of input variables 0 1 1 0
1 0 0 1
Logic Circuit
1 0 1 1
x F 1 1 0 1
y
z 1 1 1 1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Algebraic Manipulation
Literal:
A single variable within a term that may be complemented
or not.
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Canonical Forms
Maxterm
A B C Maxterm
● Sum (OR function)
0 0 0 0 M0 A B C
● Contains all variables
1 0 0 1 M1 A B C
● Evaluates to ‘0’ for a
2 0 1 0 M2 A B C
specific combination
3 0 1 1 M3 A B C
Example
4 1 0 0 M4 A B C
A=1 A B C
5 1 0 1 M5 A B C
B=1 (1) + (1) + (1)
6 1 1 0 M6 A B C
C=1 7 1 1 1 M7 A B C
0 + 0 + 0=0
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Canonical Forms
Truth Table to Boolean Function
A B C F F A BC A BC A BC ABC
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Canonical Forms
Sum of Minterms A B C F F
F A BC A BC A BC ABC 0 0 0 0 0 1
F m1 m4 m5 m7 1 0 0 1 1 0
2 0 1 0 0 1
F (1,4,5,7)
3 0 1 1 0 1
Product of Maxterms 4 1 0 0 1 0
F A BC ABC ABC ABC 5 1 0 1 1 0
F A BC ABC ABC ABC 6 1 1 0 0 1
7 1 1 1 1 0
F A BC ABC ABC ABC
F ( A B C )( A B C )( A B C )( A B C )
F M0 M2 M3 M6
F (0,2,3,6) 14 / 28
Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Standard Forms
Sum of Products (SOP)
A B (C C )
A B (1)
F A BC A BC A BC ABC
AB
AC ( B B)
AC
BC ( A A)
BC
F BC ( A A) A B (C C ) AC ( B B )
F BC A B AC
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Standard Forms
Product of Sums (POS)
AB (C C )
BC ( A A)
AC ( B B )
F AC ( B B ) AB (C C ) BC ( A A)
F AC AB BC
F ( A C )( A B )( B C )
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Two - Level Implementations
Sum of Products (SOP) B’
C
F BC A B AC A
B’ F
A
C
Product of Sums (POS) A
C
A
F ( A C )( A B )( B C ) B’ F
B’
C
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Logic Operators
AND x y AND
0 0 0
x x•y 0 1 0
y 1 0 0
1 1 1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Logic Operators
OR x y OR
0 0 0
x x+y 0 1 1
y 1 0 1
1 1 1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Logic Operators
XOR (Exclusive-OR) x y XOR
0 0 0
x xÅ y 0 1 1
y xy+xy 1 0 1
1 1 0
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Logic Operators
NOT (Inverter) x NOT
0 1
x x
1 0
Buffer x Buffer
0 0
x x
1 1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Multiple Input Gates
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
DeMorgan’s Theorem on Gates
AND Gate
●F=x•y F = (x • y) F=x
+y
OR Gate
●F=x+y F = (x + y) F=x
•y
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Homework
2-6 Find the complement of the following expressions:
(a) xy’ + x’y (b) (AB’ + C)D’ + E
(c) (x + y’ + z) (x’ + z’) (x + y)
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Homework
2-10 Draw the logic diagrams for the following Boolean
expressions:
(a) Y = A’B’ + B (A + C) (b) Y = BC + AC’
(c) Y = A + CD (d) Y = (A + B) (C’ + D)
0 0 0 1 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 0 1
1 0 1 0 1
1 1 0 0 1
1 1 1 0 1
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Homework
2-15 Given the Boolean function
F = xy’z + x’y’z + w’xy + wx’y + wxy
(a) Obtain the truth table of the function.
(b) Draw the logic diagram using the original Boolean
expression.
(c) Simplify the function to a minimum number of literals
using Boolean algebra.
(d) Obtain the truth table of the function from the
simplified expression and show that it is the same as
the one in part (a)
(e) Draw the logic diagram from the simplified expression
and compare the total number of gates with the
diagram of part (b).
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Princess Sumaya University 4241 – Digital Logic Design Computer Engineering
Dept.
Homework
2-18 Convert the following to the other canonical form:
(a) F (x, y, z) = ∑ (1, 3, 7)
(b) F (A, B, C, D) = ∏ (0, 1, 2, 3, 4, 6, 12)
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