Computer Organization & Architecture

(COA)
GTU # 3140707

Unit-4
Microprogrammed
Control

Prof. Krunal D. Vyas

Computer Engineering Department
Darshan Institute of Engineering & Technology, Rajkot
[email protected]
9601901005
 Outline
Looping
• Control Memory
• Address Sequencing
• Microinstruction Code Format
• Questions asked in GTU exam
Control Memory
Section - 1
Microprogrammed Control Organization

Externa Control
l word
input Next- Control
Control Control
address data
address memory
generator register
register (ROM)
(Sequencer)

Next-address information

Prof. Krunal D. Vyas #3140707 (COA)  Unit 4 – Microprogrammed Control 4

Control Memory
 A computer that employs a microprogrammed control unit will have two separate memories:
a main memory and a control memory.
 The control memory holds a fixed microprogram that can not be altered by the occasional
user.
 The microprogram consists of microinstructions that specify various internal control signals
for execution of register microoperation.
 Microinstructions generates the microoperations to fetch instruction from main memory; to
evaluate the effective address, to execute the operation specified by the instruction, and to
return control to the fetch of next instruction.

Prof. Krunal D. Vyas #3140707 (COA)  Unit 4 – Microprogrammed Control 5

Address Sequencing
Section - 2
Address Sequencing
 Microinstructions are stored in control memory in groups, with each group specifying a
routine.
 The transformation from the instruction code bits to an address in control memory where the
routine is located is referred to as a mapping process.
 The address sequencing capabilities required in a control memory are:
1. Incrementing of the control address register.
2. Unconditional branch or conditional branch, depending on status bit conditions.
3. A mapping process from the bits of the instruction to an address for control memory.
4. A facility for subroutine call and return.

Prof. Krunal D. Vyas #3140707 (COA)  Unit 4 – Microprogrammed Control 7

Address Sequencing
Instruction code

Mapping
logic

Status Branch Mux

bits select
Multiplexer
logic
Subroutine
register
(SBR)
Cloc
Control address register
k (CAR)
Incrementer

Control memory

Select a status bit

Branch address
Microoperations

Prof. Krunal D. Vyas #3140707 (COA)  Unit 4 – Microprogrammed Control 8

Microinstruction Code Format
Section - 3
Microinstruction Code Format

3 3 3 2 2 7
F1 F2 F3 CD BR AD

 F1, F2, F3: Microoperation fields

 CD: Condition for branching
 BR: Branch field
 AD: Address field

Prof. Krunal D. Vyas #3140707 (COA)  Unit 4 – Microprogrammed Control 10

Symbols & Binary Code for Microinstruction Fields

F1 Microoperation Symbol F2 Microoperation Symbol

000 None NOP 000 None NOP
001 AC AC + DR ADD 001 AC AC - DR SUB
010 AC 0 CLRAC 010 AC AC DR OR
011 AC AC + 1 INCAC 011 AC AC DR AND
100 AC DR DRTAC 100 DR M[AR] READ
101 AR DR(0-10) DRTAR 101 DR AC ACTDR
110 AR PC PCTAR 110 DR DR + 1 INCDR
111 M[AR] DR WRITE 111 DR(0-10) PC PCTDR

Prof. Krunal D. Vyas #3140707 (COA)  Unit 4 – Microprogrammed Control 11

Symbols & Binary Code for Microinstruction Fields
F3 Microoperation Symbol
000 None NOP
001 AC AC + DR XOR CD Symbol Comments
010 AC AC’ COM 00 U-1 Unconditional branch
011 AC shl AC SHL 01 I- Indirect address bit
100 AC shr AC SHR DR(15)
101 PC PC + 1 INCPC 10 S- Sign bit of AC
AC(15)
110 PC AR ARTPC
11 Z - AC = Zero value in AC
111 Reserved 0

BR Symbo Function
l
00 JMP CAR AD if condition = 1, CAR CAR+1 if condition = 0
01 CALL CAR AD, SBR CAR+1 if condition=1, CAR CAR+1 if
condition=0
10 RET CAR SBR (Return from subroutine)
Prof.11
KrunalMAP
D. Vyas CAR(2-5) DR(11-14),
#3140707 CAR(0,1,6) 0
(COA)  Unit 4 – Microprogrammed Control 12
Questions asked in GTU exam
Section - 4
Questions asked in GTU exam
1. Draw and explain flow chart of address sequencing.
2. Draw and explain 20 bits microinstruction code format.
3. What is micro-programmed control architecture?
4. Explain Control Memory.

Prof. Krunal D. Vyas #3140707 (COA)  Unit 4 – Microprogrammed Control 14