Chapter 2 : Introduction to Assembly

Programming The Intel 8086 ISA

Instruction Set Architecture
 Outline
 Types of instructions
 Arithmetic instructions
 Shift and Rotation instructions
 Boolean Instructions
 Branching Instructions
 Unconditional Jump Instructions
 Conditional Jump Instructions
 Translating Conditional Structures

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 Types of instructions (2)

 Assignment statements (Mov):

 Transfer CPU  Main Memory (reading);
• Transfer CPU  Main Memory (writing);
• Register to Register
 Arithmetic and logical instructions :
• Transactions between data and the accumulator AX (Certain operation only).
• The result is placed in the accumulator.
• The data can be a constant or a value in a memory location.
 Comparison Instructions
• Comparison of AX register to a data and updating Flags
 Branching instructions
• The next instruction to execute in memory is indicated by the IP register
• Branching instructions can change the value of IP to execute another instruction
• There are two types of branching:
Unconditional branching: IP  address of a new instruction
Conditional branching: If a condition is satisfied, then branching, otherwise go to next instruction

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 Next ...
 Types of instructions
 Arithmetic instructions
 Shift and Rotation instructions
 Boolean Instructions
 Branching Instructions
 Unconditional Jump Instructions
 Conditional Jump Instructions
 Translating Conditional Structures

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 Arithmetic instructions (1)
 The basic arithmetic instructions are addition, subtraction, multiplication and division
that includes variants. Several addressing modes are possible

 Addition: ADD destination , source ; destination = destination + source

 Examples
ADD AH, [1100H] ;Adds the contents of the memory cell 1100H in AH (direct addressing)
ADD AH, [BX] ;Adds the contents of the cell pointed by BX in AH (based addressing)
ADD BYTE PTR [1200H], 05H ; adds 05H to content of the memory offset (immediate addressing)
 Destination can be a register or a memory location
 Source can be a register, memory location, or a constant
 Destination and source must be of the same size
 Memory-to-memory arithmetic is not allowed
 Examples
ADD Tab1, Tab2 ; not allowed
; will be replaced by:
MOV AX, Tab2
ADD Tab1, AX
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 Arithmetic instructions (2)
 Increment: INC Destination ; Destination =Destination + 1
 Examples:
INC AX ; AX = AX + 1 (increment of 16 bits)
INC AL ; AL = AL + 1 (increments of 8 bits)
INC [SI] ; the contents of the memory cell pointed by SI is incremented

 Subtraction : SUB destination , source ; destination = destination – source

 Examples :
SUB AX, BX ; AX = AX - BX (Subtract 16-bit)
SUB AL, BH ; AL = AL - BH (Subtract 8-bit)
SUB AL, [SI] ; AL = AL - the contents of the memory cell pointed by SI
SUB [DI], AL ; the contents of the memory cell pointed by DI, Is subtracted from AL,
the result is set in the memory cell pointed by DI
 Same restrictions like ADD instruction

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 Arithmetic instructions (3)
 Decrement: DEC Destination ; Destination = Destination - 1
 Examples:
DEC AX ; AX = AX - 1 (decrement of 16 bits)
DEC AL ; AL = AL - 1 (decrements of 8 bits)
DEC [SI] ; the contents of the memory cell pointed by SI is decremented
 Note: You can’t decrement an immediate value

 Negation: NEG Destination ; Destination = 0 – Destination

 Examples: Note: The indicators
NEG AX ; AX = 0 - AX affected by this
NEG AL ; AL = 0 - AL operation are: AF,
NEG [IF] ; [IF] = 0 - [IF] CF, OF, PF, SF, ZF
 Comparing : CMP Destination, Source ; Destination - Source
• It subtracts the source from destination, which can be a byte or a word
• The result is not set in the destination, because that instruction affects only the indicators
to be tested later with another conditional jump instruction (AF, CF, OF, PF, SF, ZF)
• Only effect the flags. For example after CMP AX, 5 we will have ZF = 1 if AX
contains the value 5, and ZF = 0 if AX is different from 5
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 Arithmetic instructions (4)
 Affected Flags (ADD and SUB)
For each of the following marked entries, show the values of the destination
operand and the six status flags:
mov al,0FFh ; AL=-1
add al,1 ; AL= 00h C= 1 O= 0 S= 0 Z= 1 A= 1 P= 1
sub al,1 ; AL= FFh C= 1 O= 0 S= 1 Z= 0 A= 1 P= 1
mov al,+127 ; AL=7Fh
add al,1 ; AL= -128C= 0 O= 1 S=1 Z=0 A= 1 P=0
mov al,26h
sub al,95h ; AL= 91h C= 1 O= 1 S=1 Z=0 A=0 P=0

1 0 0 1 0 0 0 1 0 1 1 0 1 1 1 0

0 0 1 0 0 1 1 0 26h (38) 0 0 1 0 0 1 1 0 26h (38)

– +
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1 0 0 1 0 1 0 1 95h (- 0 1 1 0 1 0 1 1 6Bh
107) (107)
1 0 0 1 0 0 0 1 91h (- 1 0 0 1 0 0 0 1 91h (-
111) 111)
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 Arithmetic instructions (5)
 Multiply: MUL operand ; there is two cases :
 Performs the multiplication of the AL’s contents by an operand of 1 byte
 The result is placed in AX (16 bit result) if operands are multiplied on a byte
MUL Op8 ; AL x Op8 → AX

 Performs the multiplication of the contents of AX by an operand of 2 bytes

 The result is placed in (DX:AX) (32 bit result) if operands are multiplied on a 2-byte
MUL Op16 ; AX x Op16 → DX:AX

 The operand Op cannot be immediate, it is either a register or a memory position

 If Op is memory position you must specify the size (byte or word)
MUL BL ; AL x BL → AX
MUL CX ; AX x CX → DX:AX
MUL BYTE [BX] ; AL x (byte referenced by BX) → AX
MUL WORD [BX] ; AX x (word referenced by BX) → DX :AX
 The flags O and C are positioned if the higher part of the result is not zero
 The higher part is AH for 8-bit multiplication and DX for 16-bit multiplication
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 Arithmetic instructions (6)
 Examples
1. MOV AL,51 3. MOV AL ,43
MOV BL,32 MOV BYTE PTR [1200H],28
MUL BL ; → AX = 51 × 32 MUL BYTE PTR [1200H] ; → AX = 43 × 28

2. MOV AX,4253 4. MOV AX,1234

MOV BX,1689 MOV WORD PTR [1200H],5678
MUL BX ; → (DX, AX) = 4253 × 1689 MUL WORD PTR [1200H]
; → (DX, AX) = 1234 × 5678

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 Next ...
 Types of instructions
 Arithmetic instructions
 Shift and Rotation instructions
 Boolean Instructions
 Branching Instructions
 Unconditional Jump Instructions
 Conditional Jump Instructions
 Translating Conditional Structures

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 Shift and Rotation instructions (1)
 We discuss here the instructions that work on the binary representation:
• bit shifts
• bitwise logical operations
 They are used to
• A decode bitwise data
• divide or multiply rapidly by a power of 2
 All these operations change the state indicators
 These operations shift to the left or to the right Cste-bits of the accumulator
 They can operate on AX, BX or DX (16 bits) or AH, AL, BH,BL, DH or DL (8 bits)
 In shifts, the bits that are moved are replaced by zeros
 There are logical shifts (unsigned operations) and arithmetic shifts (signed operations)
 In the shift instructions, the operand can be  To shift the contents of a memory cell
a constant Cste (immediate) or the CL register: you must specify the size :
INST AX, 1 ; 1-bit shift AX INST byte [BX], 1 ; 1-bit shift of the
INST BL, 4 ; 4-bits shift BL contents of memory cell referenced by
INST BX, CL ; CL-bits shift BX BX

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 Shift and Rotation instructions (2)
SHL ; Shift Left instruction
 Shifting left 1 bit multiplies a number by 2
 The last bit shifted out from the left becomes the Carry Flag
 Shifting left n bits multiplies the operand by 2n (fast multiplication)

0
CF

Carry Flag

 Example : 5 * 22 = 20
MOV DL,5 ; DL = 00000101b
SHL DL,2 ; DL = 00010100b = 20, Carry Flag = 0
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 Shift and Rotation instructions (3)
SHR ; Shift Right instruction
 Performs a logical right shift on the destination operand
 The last bit shifted out from the right becomes the Carry Flag
 Shifting right n bits divides the operand by 2n (fast division)

0
CF

 Example : (80 / 2)/4 = 10

MOV DL, 80 ; DL = 01010000b = 80
SHR DL, 1 ; DL = 00101000b = 40, CF = 0
SHR DL, 2 ; DL = 00001010b = 10, CF = 0

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 Shift and Rotation instructions (4)
SAR ; Shift Arithmetic Right
 Performs a right arithmetic shift on the destination operand
 Fills the newly created bit position with a copy of the sign bit
 SAR preserves the number's sign
CF

 Example
MOV DL,-80 ; DL = 10110000b
SAR DL,1 ; DL = 11011000b = -40, CF = 0
SAR DL,2 ; DL = 11110110b = -10, CF = 0

SAL : Shift Arithmetic Left is identical to SHL

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 Shift and Rotation instructions (5)
ROL ; Rotate Left instruction
 Rotates each bit to the left, according to the count operand
 Highest bit is copied into the Carry Flag and into the Lowest Bit
 No bits are lost
 Example CF

MOV AL,11110000b
ROL AL,1 ; AL = 11100001b, CF = 1
MOV DL,3Fh ; DL = 00111111b  Provide finer control
ROL DL,4 ; DL = 11110011b = F3h, CF = 1 over bits than HLL

ROR ; Rotate Right instruction

 Rotates each bit to the right, according to the count operand
 Lowest bit is copied into the Carry flag and into the highest bit
 No bits are lost
Other shift/rotate instr:
 Example CF

• RCL ; Rotate Carry Left

MOV AL,11110000b • RCR ; Rotate Carry Right
ROR AL, 1 ; AL = 01111000b, CF = 0 • SHLD ; Shift Left Double
MOV DL, 3Fh ; DL = 00111111b • SHRD ; Shift Right Double
ROR DL, 4 ; DL = F3h, CF = 1 16
 Next ...
 Types of instructions
 Arithmetic instructions
 Shift and Rotation instructions
 Boolean Instructions
 Branching Instructions
 Unconditional Jump Instructions
 Conditional Jump Instructions
 Translating Conditional Structures

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 Boolean Instructions (1)
AND destination, source ; Bitwise AND between each pair of matching bits
Following operand combinations are allowed
AND R, R  We use the following abbreviations:
AND R, Adr INST: Instruction, Off: Offset address
R: any Register, Cste: given (Constant)
AND R, Cste SR: Segment Register disp: Displacement (Constant)
AND Cste, R OR: Offset Register Op: Operand
Adr: Address SO: Source Operand
AND Cste, Cste [Adr]: Memory content DO: Destination Operand
Operands can be 8 or 16 bits and they must be of the same size AND
AND instruction is often used to clear selected bits

00111011
AND0 0 0 0 1 1 1 1
cleared 00001011 unchanged

 Forcing a bit at 0 without changing the other bits

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 Boolean Instructions (2)
OR destination, source ; Bitwise OR between each pair of matching bits
Following operand combinations are allowed
OR R, R
OR R, Adr OR
OR R, Cste
OR Cste, R
OR Cste, Cste
Operands can be 8 or 16 bits and they must be of the same size
OR instruction is often used to set selected bits
00111011
OR 11110000
set 11111011 unchanged

 Forcing a bit at 1 without changing the other bits

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 Boolean Instructions (3)
 Converting Characters to Uppercase Use the AND instruction to clear bit 5

AND instruction can convert MOV CX, LENGTHOF mystring

characters to uppercase MOV SI, OFFSET mystring
'a'= 0 1 1 0 0 0 0 1 'b’ = 0 1 1 0 0 0 1 0 L1: AND BYTE PTR [SI], 11011111b ;clear bit 5
'A’= 0 1 0 0 0 0 0 1 'B’ = 0 1 0 0 0 0 1 0 INC SI
LOOP L1

 Converting Characters to Lowercase Use the OR instruction to set bit 5

OR instruction can convert characters to MOV CX, LENGTHOF mystring

lowercase MOV SI, OFFSET mystring
'A'= 0 1 0 0 0 0 0 1 'B' = 0 1 0 0 0 0 1 0 L1: OR BYTE PTR [SI], 20h ; set bit 5
'a'= 0 1 1 0 0 0 0 1 'b' = 0 1 1 0 0 0 1 0 INC SI
LOOP L1

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 Boolean Instructions (4)
XOR destination, source ; Bitwise XOR between each pair of matching bits
Following operand combinations are allowed
XOR R, R
XOR R, Adr
XOR R, Cste XOR
XOR Cste, R
XOR Cste, Cste
Operands can be 8 or 16 bits and they must be of the same size
XOR instruction is often used to invert selected bits

00111011
XOR 1 1 1 1 0 0 0 0

inverted 11001011 unchanged

 Inversing a bit without changing the other bits

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 Boolean Instructions (5)
NOT destination ; Inverts all the bits in a destination operand
 Result is called the 1's complement NOT 00111011

 Destination can be a register or memory 11000100 inverted

NOT R
NOT Adr

 None of the Flags is affected by the NOT instruction

Affected Status Flags

The six status flags are affected
1) Carry Flag: cleared by AND, OR, and XOR
2) Overflow Flag: cleared by AND, OR, and XOR
3) Sign Flag: Copy of the sign bit in result
4) Zero Flag: Set when result is zero
5) Parity Flag: Set when parity in least-significant byte is even
6) Auxiliary Flag: Undefined by AND, OR, and XOR
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