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Module4 Part1

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0% found this document useful (0 votes)
21 views

Module4 Part1

Uploaded by

shivasstvm
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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MODULE 4 : ARM

PROGRAMMING
Contents
2
 Architectural Support for High-Level Languages
 Abstraction in software design
 Data Types & Floating Point Data Types
 ARM Floating Point architecture
 Expressions, Conditional Statements, Loops , Functions & Procedures
 Use of memory & Run-Time Environment.
 Thumb Instruction Set
 Thumb bit and Thumb Programmer’s model
 Thumb Instructions
 Thumb Implementation
 Thumb Applications
 Architectural Support for System Development
 ARM Memory Interface

Architectural Support for High-Level Languages
Abstraction in Software Design
3

 Assembly- level
 Instructions, addresses,registers,bytes and words
 High-Level Languages
 Compiler
Data Types (Self – Study)
4

 Decimal, BCD, Hexadecimal, Signed Integers, Real


Numbers, ASCII
 ANSI C Basic datatypes- Signed and unsigned charcters,
short integers, integers,long integers, floating
point,double and long double, enumerated type and bit
fields
 ANSI C Derived datatypes- Arrays, functions,structures,
pointers, unions
Data Types - ARM
5

 Characters – unsigned byte load and store instructions.


 ARM pointers are 32 bits long
 ARM C Compiler aligns charcters on byte boundaries , short
integers at even addresses and all other types on word boundaries
 Structure starts on word boundary and are closely packed with
alignment rules.
 ARM integer core provides native support for signed and
unsigned 32-bit integers and for unsigned bytes, covering the C
integer long integer and unsigned character types
Floating-point data types (Self-Study)
6

 IEEE 754 – single precision, double precision, double extended precision,


packed decimal floating-point number and extended packed decimal
floating-point.
 ARM Limited has defined a set of floating point instructions within the
coprocessor instruction space.
 These instructions are normally implemented entirely in software through
the undefined instruction trap (which collects any coprocessor
instructions that are not accepted by a hardware coprocessor), but a subset
may be handled in hardware by the FPA10 floating-point coprocessor.
 ARM Limited also supplies a C floating-point library which supports
IEEE single and double precision formats
ARM Floating-Point Architecture
7

 FPA10 floating-point accelerator


 An interpretation of the coprocessor instruction set when the coprocessor
number is 1 or 2. (The floating-point system uses two logical coprocessor
numbers.)
 Eight 80-bit floating-point registers in coprocessors 1 and 2 (the same
physical registers appear in both logical coprocessors).
 A user-visible floating-point status register (FPSR) which controls various
operating options and indicates error conditions.
 Optionally, a floating-point control register (FPCR) which is user-
invisible and should be used only by the support software specific to the
hardware accelerator.
Floating Point Instructions
8

P – pre-/post-index (to compute address)


U – up/down (add (1) or subtract(0) offset)
W- write-back (auto – index)
L – load/store (1/0)
Load and store floating binary encoding. Rn- base register
FRd- the first register to be transferred

Load and store multiple floating binary encoding.


Floating Point Instructions
9

Floating-point data processing binary encoding.

Floating-point register transfer binary encoding.


FPA10 organization
10

The FPA10 arithmetic unit operates in four pipeline


stages:
1. Prepare: align operands.
2. Calculate: add, multiply or divide.
3. Align: normalize the result.
4. Round: apply appropriate rounding to the result.
11

 Its external interface is to the ARM data bus and the coprocessor
handshake signals
 The major components are:
 • The coprocessor pipeline follower

 • The load/store unit that carries out format conversion on floating-

point data types as they are loaded from and stored to memory.
 • The register bank which stores eight 80-bit extended precision

floating-point operands.
 • The arithmetic unit which incorporates an adder, a multiplier and a

divider, together with rounding and normalizing hardware.


Expressions- Basics
12

 ARM integer data processing instructions implement most


of the C integer arithmetic, bit-wise and shift primitives
directly.
 The 3-address instruction format used by the ARM gives
the compiler the maximum flexibility in how it preserves
or re-uses registers during expression evaluation.
 Thumb instructions are generally 2-address, which restricts
the compiler's freedom to some extent, and the smaller
number of general registers also makes its job harder
Expressions-Accessing operands
13

 A procedure will normally work with operands that are


presented in one of the following ways, and can be
accessed as indicated
 As an argument passed through a register.
 As an argument passed on the stack.
 As a constant in the procedure's literal pool.
 As a local variable.
 As a global variable.
Expressions - Pointers
14

 int *p; p = p+1; will increase the value of p by 4 bytes


 int i = 4 ;p = p + i;

- If p is held in r0 and i in r1, the change to p may be


compiled as:
 ADD r0, r0, r1, LSL #2 ; scale r1 to int
Conditional Statements -if...else
15

 if (a>b) c=a; else c=b;


 CMP r0, r1
 MOVGT r2, r0
 MOVLE r2, rl
Conditional Statements -Switch
16
Loops- for(el;e2;e3){..}
17

 for (i=0; i<10; i++) {a[i] = 0}


Loops- while (el) {..}
18
Loops- do {..} while (el)
19

 LOOP . . ; loop body


 ; evaluate expression
 BNE LOOP
 EXIT
Functions and procedures
20
Use of Memory
21

 An ARM system, like most computer systems, has its


memory arranged as a linear set of logical addresses.
 A C program expects to have access to a fixed area of
program memory (where the application image resides)
and to memory to support two data areas that grow
dynamically and where the compiler often cannot work
out a maximum size.
 The stack
 The heap.
The standard ARM C program address space model.
22
Stack Behaviour
23
Run-time environment
24

 A C program requires an environment in which to operate;


this is usually provided through a library of functions that
the C program can call.
 Division and remainder functions.
 Stack-limit checking functions.
 Stack and heap management
 Program start up.
 Program termination.
Thumb Instruction Set - Basics
25

 The Thumb instruction set addresses the issue of code density.


 It may be viewed as a compressed form of a subset of the ARM
instruction set.
 Thumb instructions map onto ARM instructions, and the Thumb
programmer's model maps onto the ARM programmer's model.
 Implementations of Thumb use dynamic decompression in an
ARM instruction pipeline and then instructions execute as
standard ARM instructions within the processor.
Thumb Instruction Set - Basics
26

 Bit 5 of CPSR – T bit if set thumb mode


 Not all ARM processors are capable of executing Thumb
instructions; those that are have a T in their name, such as the
ARM7TDMI.
 Thumb Entry
 Branch and Exchange instruction (BX). - sets the T bit, Change PC,
Flush instruction pipeline
 Exception returns (special form of data processing instruction or a
special form of load multiple register instruction)
Thumb Instruction Set - Basics
27

 Thumb Exit
 Explicit – BX instruction
 Implicit- Exception Entry (Exceptions are handled in ARM mode
only)
 Thumb System
 Thumb systems include some ARM code, if only to handle
initialization and exception entry.
 A typical embedded system will include a small amount of fast 32-bit
memory on the same chip as the ARM core and bulk of the code will
not be speed critical and may execute from a 16-bit off-chip ROM.
The Thumb programmer's model
28
Thumb-ARM similarities
29

 The load-store architecture with data processing, data


transfer and control flow instructions.
 Support for 8-bit byte, 16-bit half-word and 32-bit word
data types where half-words are aligned on 2-byte
boundaries and words are aligned on 4-byte boundaries.
 A 32-bit unsegmented memory.
Thumb-ARM differences
30

 Most Thumb instructions are executed unconditionally.


 Many Thumb data processing instructions use a 2-address
format
 the destination register is the same as one of the source registers
 ARM data processing instructions, with the exception of the 64-
bit multiplies, use a 3-address format.
 Thumb instruction formats are less regular than ARM
instruction formats, as a result of the dense encoding.

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