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Chapter 3A

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0% found this document useful (0 votes)
14 views45 pages

Chapter 3A

Uploaded by

rummyflappy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Faculty of Computer and Mathematical

Sciences

Assembly Level Machine


Organization
CHAPTER 3 (A)
Microprocessor Architecture

July 3, 2024 CSC159 - COMPUTER ORGANIZATION 1


Faculty of Computer and Mathematical
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Topic Outline
Introduction to Microprocessor
Processor Machine Cycle
CPU Components
Processor
Clock
Register

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Microprocessor Architecture
What is a microprocessor?
– Contained on a single integrated circuit called a
processor (micro) that is located on the motherboard.
– Brain of the computer
– It interprets and carries out the basic instructions that
operate a computer.

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Microprocessor Architecture
– Also called the CPU
– A microprocessor or processor is the heart of the
computer or any computing device
– It is a semiconductor chip which can be
programmed to do various functions and performs
all the computational tasks, calculations and data
processing etc. inside the computer.

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Microprocessor Architecture
Today, there are several different manufactures of
computer processors. However, Intel and AMD are the
leaders in the PC market.
Example of microprocessor are Intel Core i7-3770K Quad-

Core Processor, AMD FX-8120 8-Core

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Microprocessor Architecture

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CPU Components
– Contains 4 major components :
• Control unit (CU)
• Arithmetic Logic Unit (ALU)
• Registers
• System Clock

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CPU Component

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Processor Machine Cycle


CPU can be programmed to do various functions and
performs all the computational tasks, calculations and
data processing, etc.
Functions :
 execute programs stored in the main memory by
fetching their instruction
 decoding : translate the program instruction into
the commands that computer can process
 execute them one after another and store back into
main memory 7-9
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Processor Machine Cycle


The CPU deals with each instruction it is given in a series of
steps.
Each step is repeated for each instruction. This series of steps
is called the machine cycle.
machine cycle involves:
fetching an instruction from main memory
decoding the instruction (Translate the program
instruction into the commands that computer can process)
executing the instruction (Carry out the commands one
after another )
Store the result into main memory
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Processor Machine Cycle


Step 1. Fetch
Obtain program
instruction or data item
from memory

Memory

Step 4. Store Step 2.


Write result to memory Decode
Translate
instruction into
Processor commands
ALU Control Unit
Step 3. Execute
Carry out command

Four operations of the CPU comprise a machine cycle 7-11


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CPU: 2 Major Components


CU (control unit): performs fetch/execute cycle
Functions:
Moves data to and from CPU registers and other
hardware components (no change in data)
Accesses program instructions and issues
commands to the ALU

ALU (arithmetic logic unit) :


Performs calculations and comparisons (data
changed)

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Control Unit (CU)


• It works with the central processing unit (CPU) to
instruct, maintain and control the flow of information.
• CU is the “brain” of the microprocessor.
• It contains all that the microprocessor microprograms
(reside in an internal ROM that cannot be accessed by
the user. It contains the entire instruction set which are
permanently embedded by the manufacturer.)
• CU will controls and interprets the execution of
instructions, by following a sequence of actions that
corresponds to fetch-execute instruction cycle
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Control Unit (CU)


• To determine which instruction to be executed, CU
reads the contents of the program counter (PC)/
instruction pointer (IP).
• The instructions are then decoded by the Instruction
Decoder in the CU.
• Instructions are executed sequentially unless told
otherwise
• CU has a Memory Management Unit to supervise
the fetching of instructions and data from memory.
• The I/O interface is also part of the control unit.
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Control Unit (CU)


Instruction Decoder
Is properly part of the CU that decodes instructions
that are sent to the microprocessor.
When an instruction is fetched from the memory, the
instruction is then sent to the instruction decoder to
be decoded or interpreted. Control signals will then
be issued to perform the necessary operation.
The interpretation process is called instruction
decoding.
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Arithmetic Logic Unit (ALU)


ALU is a digital circuit that performs many different
arithmetic and logical operation on input data. It
performs these operations as directed by the CU.
All computation performed by the microprocessor is
done by the ALU
ALU is the ‘heart’ of a processor.
In short ALU performs :
 arithmetic operations such as ADD, SUB, DIV
and MUL
 all logic operations such as AND, OR, XOR etc
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Arithmetic Logic Unit (ALU)


Four Components of ALU:

Comparator

Shifter
AL Logic

U
Register

Control of ALU
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• Compares the magnitude of two numbers


placed in buffer registers. The comparator, used
Comparator in conjunction with Status Register, will output
the results of the comparison.

Logic • Performs such logic operations as AND, OR,


Register XOR, etc.

• provides input path for control signals and


Control of facilitate the sequencing and operation of each
ALU individual block of circuits.

• move the contents of a register one or more


positions left or right. Can also perform a
Shifter unique operation called rotate when used with
status register.
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Registers
• A single, permanent storage location within the CPU
used for particular defined purpose.
• Used to hold binary value (shorten using Hexadecimal)
temporarily for
– Storage,
– Manipulation, and/or
– Simple calculations.
• Register is the basic working components of the CPU.
• Each register serves a particular purpose.
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Registers
A register may hold:

data being processed

instruction being executed

memory or I/O address to accessed

keeps track of the status of the computer or


conditions of calculations
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Registers
Four primary operations by registers:

Register can be Loaded with values from other locations (from


other registers or memory location)

Data from other location can be Added or subtracted

Data can be Shifted or rotated right or left by one or more bits.


Important in implementing of multiplication and division

The value of data in register can be tested for certain


conditions (zeros, negative, etc).
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Registers
Control Unit contains several important register :-
• Instruction Register (IR)
– Holds the actual/current instruction being executed by
computer.
• Program Counter (PC)
– Both a counter and a register.
– The address in the program counter register is always
the address of the next instruction to be executed.
– The counter portion of the device generates sequential
address numbers.
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Registers
• Program Counter (cont)
– When the current instruction is finished, It then
increments, (adds 1 to the address)
– It then generate and puts the number (new address) in
the counter register (PC).
– the program counter generates an address and places
it on the address bus.
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Registers
• Program Counter (cont)
– When the current instruction is finished, the above
steps are repeated.
– Thus, the program counter continually generates
sequential address.
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Registers
• Memory Address Register (MAR)
– Holds the address of a memory location.

• Memory Data Register (MDR)


– Also known as Memory Buffer Register (MBR).
– Holds data/instruction value that is being stored to or
retrieved from the memory location currently
addressed by the memory address register.
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Registers
• Status Register (Flags)
– Allow computers to keep track of special condition
such as:
Arithmetic carry, sign and
overflow

Power failure

Internal computer error


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Registers
• Status Register (Flags) - cont

– The Status register contains individual flags (1 bit for


each flag)
– Status flags indicate the outcome of execution of
arithmetic and logical operations
– The control unit set (1) or reset (0) flags as a result of
conditions that arise during the execution of
instructions.
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System Clock
• The system clock is a device that produces periodic
sequence of pulses to control the timing of all computer
operations.
• These pulses define machine cycles.
• During each machine cycle, some activity occurs, such
as the execution of a micro-instruction.
• The interval between corresponding edges of two
consecutive pulses is called the clock cycle time.
• The pace of the clock or the clock speed is measured by
the number of cycles (ticks) per second.
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System Clock
• Each tick is a clock cycle that determines when the next
step in the machine cycle will occur
– MHz – one million ticks per second of system clock
theoretically, capable of executing one million
instructions per second
– GHz – one billion ticks per second of system clock
(MHz : 1 MHz = 1 million pulses per second)
• Therefore the faster the clock speed, the more
instructions the processor can execute per second.
• In some cases several instructions can be executed in a
single clock tick.
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• An instruction is fetched by the Control Unit during


instruction time (i-time) and executed by the ALU during
execution time (e-time)
• Together, both steps make up a single machine cycle & the
process is repeated until the program is finished the clock
drives
• The clock drives the process by generating pulses at
precisely timed intervals.
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Bus
• All of the CPU elements are connected together in a
bus structure
• A bus:
– Parallel electrical lines or paths connecting a
source to a destination
– A common path used for specific exchange of data
between various parts of CPU

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Fetch-Execute Instruction Cycle


• Basis for every capability of a computer
• Ultimately the operation of a computer as a whole is
defined by the primary operations that can be
performed with registers
 to move data between registers
 to add or subtract data to a register
 to shift data within a register
 to test the value in a register for certain conditions such
as negative, positive or zero.
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Fetch-Execute Instruction Cycle

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Fetch-Execute Instruction Cycle

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Fetch-Execute Instruction Cycle


• The most important registers :
1. General purpose (GP) registers /accumulator (A)
 used to hold data values between instructions
2. Program counter (PC) :
 hold the address of the current instruction
3. Instruction register (IR) :
 hold the current instruction while it is being
executed
4. Memory address register and memory data
register (MAR & MDR) :
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 used for accessing memory
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Instruction Cycle - Fetch Cycle


To execute an instruction, 2 phases involve :
1. Fetched the instruction from memory
- address of the current instruction to be executed
identified by the value in PC register
- this value transferred into MAR so that the
computer can retrieve the instruction located at that
address

STEP 1 : PC  MAR
- this will result in the instruction being
transferred from the specified memory location to MDR 7-37
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Instruction Cycle - Execute Cycle


2. Interpret the instruction and perform the action
- address portion of the instruction is loaded in MAR

STEP 3 : IR [address]  MAR


- actual data (MDR) is copied into the accumulator

STEP 4 : MDR  Acc

- Program Counter incremented


STEP 5 : PC + 1  PC
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Fetch-Execute Instruction Cycle


• Two-cycle process because both instructions and data
are in memory
• Fetch
– Decode or find instruction, load from memory into
register and signal ALU
• Execute
– Performs operation that instruction requires
– Move/transform data

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LOAD Fetch/Execute Cycle


1. PC -> MAR Transfer the address from the PC
to the MAR
2. MDR -> IR Transfer the instruction to the IR

3. IR [address] -> MAR Address portion of the instruction


loaded in MAR
4. MDR -> A Actual data copied into the
accumulator
5. PC + 1 -> PC Program Counter incremented

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Example: Load Fetch/Execute Cycle

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ADD Fetch/Execute Cycle


1. PC -> MAR Transfer the address from the PC
to the MAR
2. MDR -> IR Transfer the instruction to the IR

3. IR [address] -> MAR Address portion of the instruction


loaded in MAR
4. A + MDR -> A Contents of MDR added to
contents of accumulator
5. PC + 1 -> PC Program Counter incremented

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Example: ADD Fetch/Execute Cycle

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STORE Fetch/Execute Cycle


1. PC -> MAR Transfer the address from the PC
to the MAR
2. MDR -> IR Transfer the instruction to the IR
3. IR(address) -> MAR Address portion of the instruction
loaded in MAR
4. A -> MDR* Accumulator copies data into
MDR
5. PC + 1 -> PC Program Counter incremented
*Notice how Step #4 differs for LOAD and STORE

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Example: STORE Fetch/Execute Cycle

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