1 Architecture
1 Architecture
AND
EMBEDDED SYSTEMS
BY
ANISHA RODRIGUES
Associate Professor
DEPT OF CSE
NMAMIT, NITTE
06/29/24 1
Architecture of 8086
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20
A dder
B us Interface
ES U nit
CS
SS
In stru ction
DS qu eu e
IP
SP E xecution
BP
ALU U nit
DI
SI
Flag s
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The BIU sends out addresses, fetches
instructions from memory, reads data from
memory and ports, and writes data to ports
and memory.
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Execution Unit
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General Registers
They are:
(a) The data register file and
(b) The pointer and index register file
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AH AL AX
BH BL BX
CH CL CX
DH DL DX
Data Register File
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The upper and lower halves of the data
registers are individually addressable
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The index register file consists of the Stack
Pointer (SP), the Base Pointer (BP), Source
Index (SI) and Destination Index (DI) registers
all are of 16-bits.
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The three registers BP,SI,DI can be used for
temporary storage of data just as general-
purpose registers.
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Unless otherwise specified in the instruction, stack
pointer registers refer to the current stack segment
while index register refers to the current data
segment.
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SI and DI are both 16-bits wide and are used by
string manipulation instructions and in building some
of the more powerful 8086/8088 data structures and
addressing modes.
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Arithmetic Logic Unit (ALU)
ALU is 16-bits wide. It can do the following 16-bits
arithmetic operations
Addition
Subtraction
Multiplication
Division
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The ALU can also perform logical operations
such as
NOT
AND
OR
EXCLUSIVE OR
TEST
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Flag Register
The Execution Unit has a 16-bit flag register which
indicates some conditions affected by the execution of
an instruction
Some bits of the flag register control certain operations
of the EU
Conditional Flags
indicate some condition produced by an instruction
Control Flags
used to control certain operations of the processor.
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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
U U U U OF DF IF TF SF ZF U AF U PF U CF
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Conditional Flags:
Six of the nine flags are used to indicate some
condition produced by an instruction and are set or
reset by the EU on the basis of results of some
arithmetic or logic operation
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Carry Flag (CF)
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Parity Flag (PF)
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Auxiliary Carry Flag (AF)
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Zero Flag (Z)
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Overflow Flag (O)
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Sign flag (S)
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Control Flags
The three remaining flags in the flag register are used to
control certain operations of the processor.
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Trap flag (T)
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Interrupt Flag (I)
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Direction Flag (D)
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Bus Interface Unit (BIU)
The BIU sends out addresses, fetches instructions
from memory, reads data from memory and ports,
and writes data to ports and memory.
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Instruction Queue
To speed up program execution, the BIU fetches as
many as 6 instruction bytes ahead of time from
memory.
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Fetching the next instruction while the
current instruction executes, is called
pipelining.
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Segment Registers
The 8086 BIU sends out 20-bit addresses, so it
can address any 220 Or 1,048,576 bytes(1
Mbyte) in memory.
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A segment is a logical unit of memory that may
be up to 64K bytes long
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The four segment registers are the code
segment(CS) register, the stack segment(SS)
register, the extra segment(ES) register and
the data segment(DS) register.
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The BIU always inserts zeros for the lowest 4
bits (nibble) of the 20-bit starting address for a
segment
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FFFFFH HIGHEST ADDRESS
64k
64k
64k
64k
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64KByte segment can be located anywhere
within 1MByte address space, but the
segment will start at an address with zeros in
the lowest 4 bits.
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Instruction Pointer (IP)
The code segment register holds the upper 16
bits of the starting address of the segment from
which the BIU is currently fetching instruction .
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The value contained in the IP is referred to as an
offset because this value must be offset from
(added to) the segment base address in CS to
produce the required 20-bit physical address
sent out by the BIU
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Stack segment register and Stack
pointer register
A stack is a section of memory set aside to store
address and data while subprogram is executing
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Given that the EA is 2359 H and the DS =
490B H, what is the physical address?
DS: 490B0 H
EA: 2359 H
Physical add: 4B409
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Thank You..