CAO - Mod1 Mymry, Adress, Adressing Modes

Computer Organization and Architecture
Module -1 Part -2
Memory Locations, Addresses, and Operations

Addressing Modes
Memory Location, Addresses, and
Operation
n bits
first word
Memory consists of
second word
many millions of
storage cells, each of
which can store 1 bit.
•
Data is usually •
•
accessed in n-bit
i th word
groups called word.
n is called word length.
•
•
•
last word
Figure 2.5. Memory words.

Memory Location, Addresses, and
Operation
 32-bit word length example
32 bits
b 31 b 30 b1 b0
•
•
•
Sign bit: b 31= 0 for positive numbers
b 31= 1 for negative numbers
(a) A signed integer
8 bits 8 bits 8 bits 8 bits
ASCII ASCII ASCII ASCII

character character character character
(b) Four characters

0-3 0-15
0-7 0-31
Byte addressability
• It is impractical to assign distinct addresses to individual bit
locations in the memory.
• The most practical assignment is to have successive
addresses refer to successive byte locations in the memory
is called byte-addressable memory.
• Word alignment - Words are said to be aligned in memory if
they begin at a byte address that is a multiple of the number
of bytes in a word.
• Byte locations have addresses - 0,1, 2, 3, etc …
• word length is 16 bits, the successive words are located at
addresses - 0, 2, 4, 6, etc…
• word length is 32 bits, the successive words are located at
addresses - 0, 4, 8,12, etc…
Big-Endian and Little-Endian Assignments
Big-Endian: lower byte addresses are used for the most significant bytes
of the word
Little-Endian: opposite ordering. lower byte addresses are used for the
least significant bytes of the word
BYTE ADDRESSING
msb lsb HEX

LITTLE ENDIAN
0 15 BIG ENDIAN 0 79
1 36 1 58
MSB->LOWR
2 58 2 36
3 79 15
3
‘’
4
‘
‘’
15 79
n-2 36 n-2 58
n-1 58 n-1 36
79 n 15
n
Memory Operations
 Both program instructions and data operands are stored in the
memory.
 Two basic operations involving the memory are needed, namely,
Read and Write.
 To start a Read operation, the processor sends the address of the
desired location to the memory and requests that its contents be
read.
 The memory reads the data stored at that address and sends them
to the processor.
 The Write operation transfers an item of information from the
processor to a specific memory location.
 To initiate a Write operation, the processor sends the address of the
desired location to the memory, together with the data to be written
into that location. The memory then uses the address and data to
perform the write.
Load (or Read or Fetch)
Copy the content
Memory content doesn’t change
Address  MAR, read frm mem, content  MDR
Registers can be used
Store (or Write)
Overwrite the content in memory
Address  MAR and Data  MDR, write to mem
Registers can be used
Instruction and Instruction Sequencing
A computer must have instruction capable of performing 4

types of operation
Data transfers between the memory and the processor

registers
Arithmetic and logic operations on data
Program sequencing and control
I/O transfers
Register Transfer Notation
 Identify a location by a symbolic name standing for its

hardware binary address (LOC, R0,…)
 Contents of a location are denoted by placing square
brackets around the name of the location
 R1← [LOC] Register Transfer Notation (RTN)
 R3 ← [R1] + [R2]
Assembly Language Notation
 Represent machine instructions and programs

 Move R1, LOC => R1← [LOC]
transfer described above, from memory location LOC to
processor register R1,
 ADD R1, R2, R3 => R1 ← [R2] + [R3]
In this case, registers R1 and R2 hold the source operands,
while R3 is the destination
Instruction cycle
Instruction cycle consists of following phases:
Fetching an instruction from memory.

Decoding the instruction.
Reading the effective address from memory in case of the
instruction having an indirect address.
Execution of the instruction.
Connection Between the Processor and Memory
Computer Components: Top Level View
Instruction Execution and Straight-Line Sequencing
• Let’s consider task C = A + B, implemented as

C←[A] + [B].
• Figure shows a possible program segment for this
task as it appears in the memory of a computer.
• We assume that the word length is 32 bits and the
memory is byte-addressable.
• The three instructions of the program are in
successive word locations, starting at location i.
• Since each instruction is 4 bytes long, the
second and third instructions are at addresses i
+ 4 and i + 8.
• Let us consider how this program is executed.
Addressing Modes
• Opcode field - specifies the operation to be performed.
• Operand - data on which the operation is to be performed.
• operand(data) may be in accumulator, general purpose register or at some
specified memory location
• Addressing mode -The way the operands are chosen during
program execution is dependent on the addressing mode of
the instruction.
• The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the
operand is actually referenced.
 Effective Address - is the actual location of an operand of an
instruction.
Types of Addressing Modes
1. Immediate mode
2. Register mode
3. Absolute/ Direct mode
4. Indirect mode
5. Index mode
6. Base with index
7. Base with index and offset
8. Relative mode
9. Auto - increment mode
10.Auto - decrement mode
Indexed / Displacement Addressing
Indexing and Arrays
Index mode – the effective address of the operand is
generated by adding a constant value to the contents of a
register.
 X( Ri ) ; EA = [ Ri ] + X
Ri  Index register
X  constant given either as an explicit number or as a
symbolic name representing a numerical value.
 Effective address= start address + displacement
 (Index register holds address of a new location and value
of X defines an offset (displacement))
 Good for accessing arrays
Indexing and Arrays…
 Index mode facilitates access to an operand whose location is
defined relative to a reference point within the data structure in
which the operand appears.
 Several variations:
 X( Ri ) ; EA = [ Ri ] + X (Index)
EA is the sum of two values; one is given explicitly in the
instruction, and the other is stored in a register.
 ( Ri, Rj ) ; EA = [ Ri ] + [ Rj ] (Base with Index)
a A second register (base register) may be used to contain the
offset X. EA is the sum of the contents of registers Ri and Rj.
 X( Ri, Rj ) ; EA = X + [ Ri ] + [ Rj ] (Base with Index and
offset)
EA is sum of constant X and contents of registers Ri and Rj .
It is useful in accessing multiple components inside each item
in a record, where the beginning of an item is specified by
(Ri, Rj) part of addressing mode (3D arrays).
Relative Addressing (PC-Relative)
 PC relative addressing mode is used to implement intra segment transfer

of control, In this mode effective address is obtained by adding
displacement to PC.
 EA= PC + Address field value
 PC= PC + Relative value.
 Effective address is determined by Index mode using the program

counter in place of the general-purpose register.
 Can be used to access data operands. But, mostly used to specify the
target address in branch instructions
 X( PC ) ; EA = [ PC ] + X (X is a signed number)
eg. Branch>0 LOOP
branch target location (LOOP) is computed by specifying it as an offset
from the current value of PC
 Branch target may be either before or after the branch instruction, the
offset is given as a singed number.
Autodecrement mode
• Effective address of the operand is the contents of a register specified in
the instruction.
• Before accessing the operand, the contents of this register are
automatically decremented to point to the previous consecutive memory
location. –(R1)
(Ri)  Decrement Ri ;
EA = [ Ri ];
• Here one register reference, one memory reference and one ALU
operation is required to access the data.
Example: Add R1,-(R2) //OR
R2 = R2-d
R1 = R1 + M[R2]
Auto decrement mode is same as auto increment mode. Both can also be
used to implement a stack as push and pop . Auto increment and Auto
decrement modes are useful for implementing “Last-In-First-Out” data
structures
-
Addressing Modes
 The different ways in which the location of an operand is specified in an
instruction are referred to as addressing modes.

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Computer Organization and Architecture

Memory Locations, Addresses, and Operations

Figure 2.5. Memory words.

8 bits 8 bits 8 bits 8 bits

ASCII ASCII ASCII ASCII

(b) Four characters

msb lsb HEX

A computer must have instruction capable of performing 4

Data transfers between the memory and the processor

Arithmetic and logic operations on data

Program sequencing and control

 Identify a location by a symbolic name standing for its

 Represent machine instructions and programs

Instruction cycle consists of following phases:

Fetching an instruction from memory.

• Let’s consider task C = A + B, implemented as

 PC relative addressing mode is used to implement intra segment transfer

 Effective address is determined by Index mode using the program

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