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Lecture 16 ALU Design

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12 views20 pages

Lecture 16 ALU Design

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lewissikanyika35
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Lecture 16: ALU design

Processor design is complex and designed as


individual modules i.e.
ALU design
Control Unit design
ALU design
The ALU deals with all arithmetic and logic
operations in the digital computer systems
ALU design
ALU is the processor module that is usually
designed first
A simple 1-bit ALU has the following
components/modules:
• Decoder
• Logic unit
• Full Adder
(See diagram next slide)
Component purpose/operation
• The Decoder is used to select one of the four
possible operations as determined by the
control inputs F0 and F1
• The Logic unit(LU) is used to carry out logic
operations
• The Full Adder does all the addition
operations in the digital computer.
Logic circuit operation
A and B are the common inputs, F0 and F1 are
the control signals which feed in the decoder.
The operation of the 1-bit ALU can b
summarized by the truth table below:
F1 F0 Operation Expected result
0, 0 AND AB
0, 1 NOT B
1 0 ORing A+B
Logic circuit operation

F1 F0 Operation Result
1 1 XORing A⊕B ⊕Cin
Building 4 a bit addition machine
Use the previous knowledge of half adders and
full adders
Half Adder symbol
• Use of symbols is encouraged as opposed to
circuits
Use of Half Adder as an Incrementor

The half adder can be used build a 4-bit


incrementer
An incrementer is one of the popular
components in ALU
• It has 4 input lines
• An incremental flag
Incrementoroperation
It operates as follows:
• If the increment flag is set to one, it output
the input+1
• if the flag is 0, it just outputs the input.
• The output is just 4 output lines, and a carry
line
Incrementer symbol
We introduce a Hexadecimal Pad to the 4-bit
incrementer
2’s complement
This device will be used to generate our two's
compliment numbers
Lets take a look using binary switches, and
probes
4-bit Adder
• To design a 4-bit adder, we will take the carry
out from one adder, and bring it into the carry
in to the next. Each 1bit adder will then have 2
input lines, and the device will have 1 carry in
for all the adders.
Reminder:
Cascaded full adder
4-bit Adder operation
The 4- bit full adder operates as follows:
When flag is 1:
• Adds the input to give a sum
• Increments the sum( the output) by 1
For example in the diagram:
4-bit Adder
Diagram description
In the diagram we have:
• Two hexadecimal pads and in the first (top)
hexapad 5 is selected(pressed) and in the lower
hexapad 1 is selected(pressed)
• Incremental flag is set to 1(Cin of LSB FA)
• The full adder computes the sum of 5 and 1
• The sum is 6 and the incremented by 1 to give a
7(see diagram)
• The carry out is zero (0).
If the incremental flag is 0
The cascaded full adder operates as a
conventional summer i.e. just computes the
sum of 1 and 5 and outputs a 6
2’s Complement design
Design of 2’s complement logic circuit

Consider a 4-bit input and a 4-bit output


2’slement logic circuit
Design a logic circuit that would convert any
unsigned 4-bit binary number to 2’s
complement

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