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Chapter 1 - Computer System

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0% found this document useful (0 votes)
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Chapter 1 - Computer System

Uploaded by

s.kedrick07
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Why study this subject?

“The computer lies at the heart of computing. Without it


most of the computing disciplines today would be a
branch of theoretical mathematics. To be a professional
in any field of computing today, one should not regard the
computer as just a black box that executes programs by
magic. All students of computing should acquire some
understanding and appreciation of a computer system’s
functional components, their characteristics, their
performance, and their interactions. There are practical
implication as well. …” JTF01 cited in Stallings 2006, pp. 10
Chapter 1

COMPUTER SYSTEM

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Topics
1.1) Computer Main Components
1.2) Computer Functions
1.3) Interconnection Structure
1.4) Bus Interconnection
Learning Outcome:
At the end of this chapter, student should be able to:
Describe main computer components
Describe functions of the components
Describe on how the components communicate with
each other to perform a task

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Structure – top level

Peripherals

Computer

Communication
lines

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Structure – top level
Controls computer operations and
performs data processing functions;
often simply referred to as processor Computer
Peripherals

Central Main
Processing Memory
Unit
Temporarily stores data and
instructions that are being executed or Systems
Computer will be executed by the CPU Interconnection

Connects the user and the computer


Input
through peripherals and controls the Output
Communication peripherals
lines

Figure 1: Internal structure of a computer

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Computer Function
 The basic computer function is to execute programs,
which includes:
 Data Processing
 Must be able to process data
 The data may take a wide variety of forms and the range of
processing requirements is broad
 Data Storage
 It is also essential that a computer store data at least temporarily store
those pieces of data that are being worked on at any given moment.
 Data Movement
 Must be able to move data between itself and the outside world
 Control
 Control all the above three functions.

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Computer Function
 There are 3 main computer components, i.e. CPU, MM
and I/O unit that are interdependent when performing
their respective tasks.

 CPU will perform the processing tasks based on the


instructions given by programs and control the operation
of the computer.

 The instructions are stored in MM and the CPU will fetch


and execute them one at a time until all of them are
completed.
 I/O Unit moves data between the computer and its external
environment.

 Generally, computers use Stored Program Concept to


perform their tasks. This concept was introduced by John
Von Newmann (1945)

 Stored Program Concept - perform a variety of tasks in


sequence or intermittently

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Stored Program Concept

1. Data and instructions that will be executed are stored in a


single read-write memory.

2. The contents of this memory are addressable by the location,


without regard to the type of data contained there.

3. Instructions are executed sequentially based on their position


in the memory (unless explicitly modified)

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System Interconnection
 The components communicate with each other to perform a
task.

 The collection of paths connecting the various modules is


called the System Interconnection Structure

 The design of this structure will depend on the exchanges that


must be made between modules

 A line or pathway that connects the 3 main computer


components is called System Bus.

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There are 3 types of bus that work together to perform the task:

1. Data Bus -- Used to transfer data/instructions from one


component to another

2. Address Bus -- Used to transfer the destination address of the


data that is inside the Data Bus

3. Control Bus -- Used to transfer signals that control data and


address in Data Bus and Address Bus

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 A bus consists of multiple communication pathways, or lines and
each line is capable of transmitting signals representing binary 1
and binary 0.
 For example, an 8-bit unit of data can be transmitted over 8 data bus lines.
 The size or width of a bus is how many bits it carries in parallel. Common bus sizes are: 4 bits,
8 bits, 12 bits, 16 bits, 24 bits, 32 bits, 64 bits, 80 bits, 96 bits, and 128 bits.
 The speed of a bus is how fast it moves data along the path. This is usually measured in
MegaHertz (MHz) or millions of times a second.
 The capacity of a bus is how much data it can carry in a second. In theory this is determined
by multiplying the size of the bus by the speed of the bus, but in practice there are many factors
that slow down a bus, including wait cycles (waiting for memory or another device to have
information ready).
 Generally, there are 4 ways to connect the 3 components with the
I/O module acting as the control point :
 I/O to CPU  I/O to MM
 I/O to Central Switch  I/O to Bus

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i. I/O to CPU MM ii. I/O to MM CPU

CPU MM

I/O U I/O U

iii. I/O to Central Switch CPU

Central MM
Switch

I/O U
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iv. I/O to Bus

CPU MM I/O U

System Bus

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The followings are 3 types of bus interconnection:
i. Bus Interconnection Scheme
ii. Traditional Bus Architecture
iii. High-Performance Architecture

Bus Interconnection Scheme

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Multiple-Bus Hierarchies
Performance degrades if great number of devices are connected to the bus:
1. The more device attached, the greater the bus length
and greater propagation delay
2. The bus may become bottleneck – aggregate data
transfer demand capacity of the bus

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Traditional Bus Architecture
a bus for items closely
connected to the processor I/O local devices
that can run at or near the connects the main processor
same speed as the processor with its primary support
itself. components, in particular
connecting the processor to its
memory.

I/O devices

Buffers data transfers between the system


bus and the I/O controller

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• Build to overcome the problem of high performance devices been
introduced significantly, that request for faster response and greater speed.

High-performance architecture
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High-performance architecture
Cache controller
integrated into a
bridge (buffering
device)

High-capacity
I/O devices

lower-speed
I/O devices

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