Creation ofChapter 2

Online and Blended Course

Instructions: Language of the Computer

 Creation ofInstruction Set Course
Online and Blended

 The repertoire of instructions of a computer

 Different computers have different
instruction sets
 Early computers had very simple
instruction sets
 Simplified implementation
 Many modern computers also have simple
instruction sets
 Arithmetic
Creation Operations
of Online and Blended Course

 Add and subtract, three operands

 Two sources and one destination
add a, b, c # a gets b + c
 All arithmetic operations have this form
 CreationArithmetic Example
of Online and Blended Course

 C code:
f = (g + h) - (i + j);
 Compiled MIPS code:
add t0, g, h # temp t0 = g + h
add t1, i, j # temp t1 = i + j
sub f, t0, t1 # f = t0 - t1
 CreationRegister
of Online Operands
and Blended Course

 Arithmetic instructions use register operands

 MIPS has a 32 × 32-bit register file
 Use for frequently accessed data
 Numbered 0 to 31
 32-bit data called a “word”
 Assembler names
 $t0, $t1, … , $t9 for temporary values
 $s0, $s1, … , $s7 for saved variables
 Design Principle 2: Smaller is faster
 c.f. main memory: millions of locations
 Register
Creation Operand
of Online Example
and Blended Course

 C code:
f = (g + h) - (i + j);
 f, … , j in $s0, … , $s4

 Compiled MIPS code:

add $t0, $s1, $s2
add $t1, $s3, $s4
sub $s0, $t0, $t1
 CreationMemory Operands
of Online and Blended Course

 Main memory used for composite data

 Arrays, structures, dynamic data
 To apply arithmetic operations
 Load values from memory into
registers
 Store result from register to
memory
 Memory is byte addressed
 Each address identifies an 8-bit
byte
 Words are aligned in memory
 Address must be a multiple of 4
 MIPS is Big Endian
 Memory
Creation Operand
of Online Example
and Blended 1
Course

 C code:
g = h + A[8];
 g in $s1, h in $s2, base address of A in $s3

 Compiled MIPS code:

 Index 8 requires offset of 32
 4 bytes per word
lw $t0, 32($s3) # load
word add $s1, $s2, $t0
offset base register
 Memory
Creation Operand
of Online Example
and Blended 2
Course

 C code:
A[12] = h + A[8];
 h in $s2, base address of A in $s3

 Compiled MIPS code:

 Index 8 requires offset of 32
lw $t0, 32($s3) # load word
add $t0, $s2, $t0
sw $t0, 48($s3) # store word
 Registers
Creation of Online vs.
andMemory
Blended Course

 Registers are faster to access than

memory
 Operating on memory data requires loads
and stores
 More instructions to be executed
 Compiler must use registers for variables
as much as possible
 Only spill to memory for less frequently used
variables
 Register optimization is important!
 Immediate
Creation Operands
of Online and Blended Course

 Constant data specified in an instruction

addi $s3, $s3, 4
 No subtract immediate instruction
 Just use a negative constant
addi $s2, $s1, -1
 Design Principle 3: Make the common
case fast
 Small constants are common
 Immediate operand avoids a load
instruction
 CreationThe Constant
of Online Zero Course
and Blended

 MIPS register 0 ($zero) is the constant 0

 Cannot be overwritten
 Useful for common operations
 E.g., move between registers
add $t2, $s1, $zero
 Unsigned
Creation Binary
of Online Integers
and Blended Course

 Given an n-bit number

x  xn12n1  xn2 2n2  x 12 1  x0 20
 Range: 0 to +2n – 1
 Example
 0000 0000 0000 0000 0000 0000 0000 10112
= 0 + … + 1×23 + 0×22 +1×21 +1×20
= 0 + … + 8 + 0 + 2 + 1 = 1110
 Using 32 bits
 0 to +4,294,967,295
 2s-Complement
Creation Signed
of Online and Integers
Blended Course

 Given an n-bit number

x  x n1 2n1  x n2 2n2  x 12 1  0 2 0

x
 Range: –2 n – 1 to +2n – 1 – 1
 Example
 1111 1111 1111 1111 1111 1111 1111 11002
= –1×2 3 1 + 1×230 + … + 1×22 +0×21 +0×20
= –2,147,483,648 + 2,147,483,644 = –4 1 0
 Using 32 bits
 –2,147,483,648 to +2,147,483,647
2s-Complement Signed
Creation of Online and Integers (Cont’d)
Blended Course

 Bit 31 is sign bit

 1 for negative numbers
 0 for non-negative numbers
 – ( – 2 n – 1) can’t be represented
 Non-negative numbers have the same unsigned
and 2s-complement representation
 Some specific numbers
 0: 0000 0000 … 0000
 –1: 1111 1111 … 1111
 Most-negative: 1000 0000 … 0000
 Most-positive: 0111 1111 … 1111
 Signed
Creation of Online Negation
and Blended Course

 Complement and add 1

 Complement means 1 → 0, 0 → 1

x  x  1111...1112 
1
x 1 x
 Example: negate +2
 +2 = 0000 0000 …
00102
 – 2 = 1111 1111 … 11012 + 1
 Creation ofSign Extension
Online and Blended Course

 Representing a number using more bits

 Preserve the numeric value
 In MIPS instruction set
 addi: extend immediate value
 lb, lh: extend loaded byte/halfword
 beq, bne: extend the displacement
 Replicate the sign bit to the left
 c.f. unsigned values: extend with 0s
 Examples: 8-bit to 16-bit
 +2: 0000 0010 => 0000 0000 0000
0010
 –2: 1111 1110 => 1111 1111 1111 1110
 Representing
Creation Instructions
of Online and Blended Course

 Instructions are encoded in binary

 Called machine code
 MIPS instructions
 Encoded as 32-bit instruction words
 Small number of formats encoding operation code
(opcode), register numbers, …
 Regularity!
 Register numbers
 $t0 – $t7 are reg’s 8 – 15
 $t8 – $t9 are reg’s 24 – 25
 $s0 – $s7 are reg’s 16 – 23
 MIPSofR-format
Creation Online andInstructions
Blended Course

op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits
6 bits

 Instruction fields
 op: operation code (opcode)
 rs: first source register number
 rt: second source register number
 rd: destination register number
 shamt: shift amount (00000 for now)
 funct: function code (extends opcode)
 CreationR-format Example
of Online and Blended Course

op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

add $t0, $s1, $s2

special $s1 $s2 $t0 0 add

0 17 18 8 0 32

000000 10001 10010 01000 00000 100000

000000100011001001000000001000002 = 0232402016
 Hexadecimal
Creation of Online and Blended Course

 Base 16
 Compact representation of bit strings
 4 bits per hex digit
0 0000 4 0100 8 1000 c 1100
1 0001 5 0101 9 1001 d 1101
2 0010 6 0110 a 1010 e 1110
3 0011 7 0111 b 1011 f 1111

 Example: eca8 6420

 1110 1100 1010 1000 0110 0100 0010
0000
 MIPSofI-format
Creation Online andInstructions
Blended Course

op rs rt constant or address
6 bits 5 bits 5 bits 16 bits

 Immediate arithmetic and load/store instructions

 rt: destination or source register number
 Constant: –2 1 5 to +215 – 1
 Address: offset added to base address in rs
 Design Principle 4: Good design demands good
compromises
 Different formats complicate decoding, but allow 32-bit
instructions uniformly
 Keep formats as similar as possible
 CreationLogical
of OnlineOperations
and Blended Course

 Instructions for bitwise manipulation

Operation C Java MIPS
Shift left << << sll
Shift right >> >>> srl
Bitwise AND & & and, andi
Bitwise OR | | or, ori
Bitwise NOT ~ ~ nor

 Useful for extracting and inserting

groups of bits in a word
 Shift
Creation of Operations
Online and Blended Course

op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits
6 bits

 shamt: how many positions to shift

 Shift left logical
 Shift left and fill with 0 bits
 sll by i bits multiplies by 2i
 Shift right logical
 Shift right and fill with 0 bits
 srl by i bits divides by 2i (unsigned
only)
 AND
Creation of Operations
Online and Blended Course

 Useful to mask bits in a word

 Select some bits, clear others to 0
and $t0, $t1, $t2

$t2 0000 0000 0000 0000 000 0 110 1 1100 0000

$t1 0000 0000 0000 0000 00 11 0 0000 0000

110
$t0 0000 0000 0000 0000 000 0 110 0 0000 0000
 Creation ofOR Operations
Online and Blended Course

 Useful to include bits in a word

 Set some bits to 1, leave others unchanged
or $t0, $t1, $t2

$t2 0000 0000 0000 0000 000 0 110 1 1100 0000

$t1 0000 0000 0000 0000 00 11 0 0000 0000

110
$t0 0000 0000 0000 0000 00 11 1 1100 0000
110
 NOT
Creation of Operations
Online and Blended Course

 Useful to invert bits in a word

 Change 0 to 1, and 1 to 0
 MIPS has NOR 3-operand instruction
 a NOR b == NOT ( a OR b )
nor $t0, $t1, $zero Register 0: always
read as zero

$t1 0000 0000 0000 0000 0011 1100 0000 0000

$t0 1111 1111 1111 1111 1100 0011 1111 1111

 Conditional
Creation Operations
of Online and Blended Course

 Branch to a labeled instruction if a

condition is true
 Otherwise, continue sequentially
 beq rs, rt, L1
 if (rs == rt) branch to instruction
labeled L1;
 bne rs, rt, L1
 if (rs != rt) branch to instruction
labeled L1;
 j L1
 Compiling
Creation of Online If
andStatements
Blended Course

 C code:
if (i==j) f = g+h;
else f = g-h;
 f, g, … in $s0, $s1, …
 Compiled MIPS
code: bne $s3, $s4, Else
add $s1, $s2
$s0, j
Else: Exit $s1, $s2
sub $s0,
Exit: … Assembler calculates addresses
 Compiling
Creation Loop
of Online and Statements
Blended Course

 C code:
while (save[i] == k) i += 1;
 i in $s3, k in $s5, address of save in $s6
 Compiled MIPS code:
Loop: sll $t1, $s3, 2
add $t1, $t1, $s6
lw $t0, 0($t1)
bne $t0, $s5, Exit
addi $s3, $s3, 1
j Loop
Exit: …
 Basic Blocks
Creation of Online and Blended Course

 A basic block is a sequence of instructions

with
 No embedded branches (except at end)
 No branch targets (except at beginning)

 A compiler identifies basic

blocks for optimization
 An advanced processor
can accelerate execution
of basic blocks
 More Conditional
Creation Operations
of Online and Blended Course

 Set result to 1 if a condition is true

 Otherwise, set to 0
 slt rd, rs, rt
 if (rs < rt) rd = 1; else rd = 0;
 slti rt, rs, constant
 if (rs < constant) rt = 1; else rt = 0;
 Use in combination with beq, bne
slt $t0, $s1, $s2 # if ($s1 < $s2)
bne $t0,$zero, L # branch to L
 Branch
Creation Instruction
of Online Design
and Blended Course

 Why not blt, bge, etc?

 Hardware for <, ≥, … slower than =, ≠
 Combining with branch involves more work
per instruction, requiring a slower clock
 All instructions penalized!
 beq and bne are the common case
 This is a good design compromise
 CreationSigned vs.and
of Online Unsigned
Blended Course

 Signed comparison: slt, slti

 Unsigned comparison: sltu, sltui
 Example
 $s0 = 1111 1111 1111 1111 1111 1111 1111 1111
 $s1 = 0000 0000 0000 0000 0000 0000 0000 0001
 slt $t0, $s0, $s1 # signed
 – 1 < +1  $t0 = 1
 sltu $t0, $s0, $s1 #
unsigned
 +4,294,967,295 > +1  $t0 = 0
Creation Procedure
of Online andCalling
Blended Course

 Steps required
1. Place parameters in registers
2. Transfer control to procedure
3. Acquire storage for procedure
4. Perform procedure’s operations
5. Place result in register for caller
6. Return to place of call
Creation ofRegister Usage
Online and Blended Course

 $a0 – $a3: arguments (reg’s 4 – 7)

 $v0, $v1: result values (reg’s 2 and 3)
 $t0 – $t9: temporaries
 Can be overwritten by callee
 $s0 – $s7: saved
 Must be saved/restored by callee
 $gp: global pointer for static data (reg 28)
 $sp: stack pointer (reg 29)
 $fp: frame pointer (reg 30)
 $ra: return address (reg 31)
 Procedure
Creation Call
of Online andInstructions
Blended Course

 Procedure call: jump and link

jal ProcedureLabel
 Address of following instruction put in $ra

 Jumps to target address

 Procedure return: jump register

jr $ra
 Copies $ra to program counter

 Can also be used for computed jumps

 e.g., for case/switch statements

 LeafofProcedure
Creation Example
Online and Blended Course

 C code:
int leaf_example (int g, h, i, j)
{ int f;
f = + h) - (i + j);
(g return f;
}
 Arguments g, … , j in $a0, … , $a3

 f in $s0 (hence, need to save $s0 on stack)

 Result in $v0
Leaf Procedure
Creation of OnlineExample (Cont’d)
and Blended Course

 MIPS code:
leaf_example:
addi $sp, $sp, -4
Save $s0 on stack
sw $s0, 0($sp)
add $t0, $a0, $a1
add $t1, $a2, $a3 Procedure body
$s0, $t0, $t1
sub Result
add $v0, $s0, $zero
Restore $s0
lw $s0, 0($sp)
addi $sp, $sp, 4 Return
jr $ra
 Non-Leaf
Creation Procedures
of Online and Blended Course

 Procedures that call other procedures

 For nested call, caller needs to save on the
stack:
 Its return address
 Any arguments and temporaries needed after
the call
 Restore from the stack after the call
 Non-Leaf
Creation Procedure
of Online Example
and Blended Course

 C code:
int fact (int n)
{
if (n < 1) return (1);
else return n * fact(n - 1);
}
 Argument n in $a0

 Result in $v0
Non-Leaf
CreationProcedure
of Online andExample (Cont’d)
Blended Course

 MIPS code:
fact:
addi $sp, $sp, -8 # adjust stack for 2 items
sw $ra, 4($sp) # save return address
sw $a0, 0($sp) # save argument
slti $t0, $a0, 1 # test for n < 1
beq $t0, $zero, L1
addi $v0, $zero, 1 # if so, result is 1
addi $sp, $sp, 8 # pop 2 items from stack
jr $ra and return
#
L1: addi $a0, $a0, -1 # else decrement n
jal fact # recursive call
lw $a0, 0($sp) # restore original n
lw $ra, 4($sp) # and return address
addi $sp, $sp, 8 pop 2 items from stack
#
mul $v0, $a0, $v0 # multiply to get
 Local
Creation Data and
of Online on the Stack
Blended Course

 Local data allocated by callee

 e.g., C automatic variables
 Procedure frame (activation record)
 Used by some compilers to manage stack storage
 Byte/Halfword
Creation of Online andOperations
Blended Course

 Could use bitwise operations

 MIPS byte/halfword load/store
 String processing is a common case
lb rt, offset(rs) lh rt, offset(rs)
 Sign extend to 32 bits in rt
lbu rt, offset(rs) lhu rt,
offset(rs)
 Zero extend to 32 bits in rt
sb rt, offset(rs) sh rt, offset(rs)
 Store just rightmost byte/halfword
 String
Creation Copy
of Online andExample
Blended Course

 C code (naïve):
 Null-terminated string
void strcpy (char x[], char y[])
{ int i;
i =0;
while ((x[i]=y[i])!='\0')
i += 1;
}
 Addresses of x, y in $a0, $a1
 i in $s0
 String Copy
Creation Example
of Online (Cont’d)
and Blended Course

 MIPS code:
strcpy:
addi $sp, $sp, -4 # adjust stack for 1 item
sw $s0, 0($sp) # save $s0
add $s0, $zero, $zero # i = 0
L1: add $t1, $s0, $a1 # addr of y[i] in $t1
lbu $t2, 0($t1) # $t2 = y[i]
add $t3, $s0, $a0 # addr of x[i] in $t3
sb $t2, 0($t3) # x[i] = y[i]
beq $t2, $zero, L2 # exit loop if y[i] == 0
addi $s0, $s0, 1 # i = i + 1
j L1 # next iteration of loop
L2: lw $s0, 0($sp) # restore saved $s0
addi $sp, $sp, 4 # pop 1 item from stack
jr $ra # and return
 32-bit
Creation of OnlineConstants
and Blended Course

 Most constants are small

 16-bit immediate is sufficient
 For the occasional 32-bit constant
lui rt, constant
 Copies 16-bit constant to left 16 bits of rt
 Clears right 16 bits of rt to 0

lui $s0, 61 0000 0000 0011 1101 0000 0000 0000 0000

ori $s0, $s0, 2304 0000 0000 0011 1101 0000 1001 0000 0000
 CreationBranch
of OnlineAddressing
and Blended Course

 Branch instructions specify

 Opcode, two registers, target address
 Most branch targets are near branch
 Forward or backward

op rs rt constant or address

6 bits 5 bits 5 bits 16 bits

 PC-relative addressing
 Target address = PC + offset × 4
 PC already incremented by 4 by this time
 Creation Jump Addressing
of Online and Blended Course

 Jump (j and jal) targets could

be anywhere in text segment
 Encode full address in instruction

op address
6 bits 26 bits

 (Pseudo)Direct jump addressing

 Target address = PC 3 1 … 2 8 : (address × 4)
 Target
Creation Addressing
of Online Example
and Blended Course

 Loop code from earlier example

 Assume Loop at location 80000

Loop: sll $t1, $s3, 2 80000 0 0 19 9 4 0

add $t1, $t1, $s6 80004 0 9 22 9 0 32
lw $t0, 0($t1) 80008 35 9 8 0
bne $t0, $s5, Exit 80012 5 8 21 2
addi $s3, $s3, 1 80016 8 19 19 1
j Loop 80020 2 20000
Exit: … 80024
 Branching
Creation Far
of Online and AwayCourse
Blended

 If branch target is too far to encode with

16-bit offset, assembler rewrites the code
 Example
beq $s0,$s1, L1
↓
bne $s0,$s1, L2
j L1
L2: …
 Addressing
Creation Mode
of Online Summary
and Blended Course
 Synchronization
Creation of Online and Blended Course

 Two processors sharing an area of memory

 P1 writes, then P2 reads
 Data race if P1 and P2 don’t synchronize
 Result depends of order of accesses
 Hardware support required
 Atomic read/write memory operation
 No other access to the location allowed between the
read and write
 Could be a single instruction
 E.g., atomic swap of register ↔ memory
 Or an atomic pair of instructions
 COnline
Creation of Sort Example
and Blended Course

 Illustrates use of assembly instructions

for a C bubble sort function
 Swap procedure (leaf)
void swap(int v[], int k)
{
int temp;
temp = v[k];
= v[k+1];
v[k+1] = temp;
v[k]
}
 v in $a0, k in $a1, temp in $t0
 The
Creation Procedure
of Online SwapCourse
and Blended

swap: sll $t1, $a1, 2 # $t1 = k * 4

add $t1, $a0, $t1 # $t1 = v+(k*4)
(address of
# v[k])
lw $t0, 0($t1) # $t0 (temp) = v[k]
lw $t2, 4($t1) # $t2 = v[k+1]
sw $t2, 0($t1) # v[k] = $t2 (v[k+1])
sw $t0, 4($t1) # v[k+1] = $t0 (temp)
jr $ra # return to calling routine
 TheofSort
Creation Procedure
Online in Course
and Blended C

 Non-leaf (calls swap)

void sort (int v[], int n)
{
int i, j;
for (i =0; i < n; i += 1) {
for (j = i – 1;
j >= 0 && v[j] > v[j + 1];
-= 1) {
swap(v,j);
j
}
}
}
 v in $a0, k in $a1, i in $s0, j in $s1
 The
Creation Procedure
of Online BodyCourse
and Blended
move $s2, $a0 # save $a0 into $s2 Move
move $s3, $a1 # save $a1 into $s3 params
move $s0, $zero # i = 0
for1tst: slt $t0, $s0, $s3 # $t0 = 0 if $s0 ≥ $s3 (i ≥ n) Outer loop
beq $t0, $zero, exit1 # go to exit1 if $s0 ≥ $s3 (i ≥ n)
addi $s1, $s0, –1 # j = i – 1
for2tst: slti $t0, $s1, 0 # $t0 = 1 if $s1 < 0 (j < 0)
bne $t0, $zero, exit2 # go to exit2 if $s1 < 0 (j < 0)
sll $t1, $s1, 2 # $t1 = j * 4
Inner loop
add $t2, $s2, $t1 # $t2 = v + (j * 4)
lw $t3, 0($t2) # $t3 = v[j]
lw $t4, 4($t2) # $t4 = v[j + 1]
slt $t0, $t4, $t3 # $t0 = 0 if $t4 ≥ $t3
beq $t0, $zero, exit2 # go to exit2 if $t4 ≥ $t3
move $a0, $s2 # 1st param of swap is v (old $a0) Pass
move $a1, $s1 # 2nd param of swap is j params
jal swap # call swap procedure & call
addi $s1, $s1, –1 # j –= 1
Inner loop
j for2tst # jump to test of inner loop
exit2: addi $s0, $s0, 1 # i += 1
Outer loop
j for1tst # jump to test of outer loop
 CreationThe Full and
of Online Procedure
Blended Course

sort: addi $sp,$sp, –20 # make room on stack for 5 registers

sw $ra, 16($sp) # save $ra on stack
sw $s3,12($sp) # save $s3 on stack
sw $s2, 8($sp) # save $s2 on stack
sw $s1, 4($sp) # save $s1 on stack
sw $s0, 0($sp) # save $s0 on stack
… # procedure body
…
exit1: lw $s0, 0($sp) # restore $s0 from stack
lw $s1, 4($sp) # restore $s1 from stack
lw $s2, 8($sp) # restore $s2 from stack
lw $s3,12($sp) # restore $s3 from stack
lw $ra,16($sp) # restore $ra from stack
addi $sp,$sp, 20 # restore stack pointer
jr $ra # return to calling routine
 CreationArrays
of Onlinevs.
andPointers
Blended Course

 Array indexing involves

 Multiplying index by element size
 Adding to array base address
 Pointers correspond directly to memory
addresses
 Can avoid indexing complexity
 Example:
Creation Clearing
of Online and Array
and Blended Course

clear1(int array[], int size) { clear2(int *array, int size) {

int i; int *p;
for (i = 0; i < size; i += 1) for (p = &array[0]; p < &array[size];
array[i] = 0; p = p + 1)
} *p = 0;
}

move $t0,$zero # i = 0 move $t0,$a0 # p = &

array[0]
loop1: sll $t1,$t0,2 # $t1 = i * sll $t1,$a1,2 # $t1 =
4 size * 4 add $t2,$a0,$t1 # $t2
add $t2,$a0,$t1 # $t2 =
= # &array[size]
# loop2: sw $zero,0($t0) # Memory[p] = 0
&array[i] sw $zero, 0($t2) # addi
array[i] = 0 addi $t0,$t0,1 $t0,$t0,4 # p
# i = i + 1 slt = p + 4 slt $t3,$t0,$t2 #
$t3,$t0,$a1 # $t3 = $t3 =
# (i < #(p<&array[size])
size) bne $t3,$zero,loop1 # if bne $t3,$zero,loop2 # if (…)
(…)
# #
goto loop1 goto loop2
 Comparison
Creation of Onlineof Array
and vs.Course
Blended Ptr
 Multiply “strength reduced” to shift
 Array version requires shift to be inside
loop
 Part of index calculation for incremented i
 c.f. incrementing pointer
 Compiler can achieve same effect as
manual use of pointers
 Induction variable elimination
 Better to make program clearer and
safer
 ARMof&
Creation MIPS
Online andSimilarities
Blended Course

 ARM: the most popular embedded core

 Similar basic set of instructions to MIPS
ARM MIPS
Date announced 1985 1985
Instruction size 32 bits 32 bits
Address space 32-bit flat 32-bit flat
Data alignment Aligned Aligned
Data addressing modes 9 3
Registers 15 × 32-bit 31 × 32-bit
Input/output Memory Memory

mapped mapped
 Compare
Creation and Branch
of Online in ARM
and Blended Course

 Uses condition codes for result of an

arithmetic/logical instruction
 Negative, zero, carry, overflow
 Compare instructions to set condition codes
without keeping the result
 Each instruction can be conditional
 Top 4 bits of instruction word: condition
value
 Can avoid branches over single instructions
 Concluding
Creation Remarks
of Online and Blended Course

 Measure MIPS instruction executions in

benchmark programs
 Consider making the common case fast
 Consider compromises
In struction class MIPS examples SPEC2006 Int SPEC2006 FP
Arithmetic add, sub, addi 16% 48%
Data transfer lw, sw, lb, lbu, 35% 36%
lh, lhu, sb,
lui
Logical and, or, nor, andi, 12% 4%
ori, sll, srl
Cond. Branch beq, bne, slt, 34% 8%
slti, sltiu
Jump j, jr, jal 2% 0%