Lecture 19marked
Lecture 19marked
ANNOUNCEMENTS
• For Problem 4 of HW10, use VDD = 1.8V and VTH = 0.4V
• Note: Midterm #2 will be held on Thursday 11/15
OUTLINE
• Common-gate stage
• Source follower
1 1
RX ro1 RY ro 2
g m1 gm2
Av g m RD
1
Rin Rout RD
gm
EE105 Fall 2007 Lecture 19, Slide 6 Prof. Liu, UC Berkeley
CG Stage with Source Resistance
Small-signal equivalent
circuit seen at input 1
gm
vX vin
1
RS
gm
For= 0:
vout vout v X 1 RD
g m RD Av
vin v X vin g m RS 1 1
RS
gm
EE105 Fall 2007 Lecture 19, Slide 7 Prof. Liu, UC Berkeley
• The output impedance of a CG stage with source resistance is
identical to that of CS stage with degeneration.
Small-signal analysis circuit for
determining output resistance, Rout
Rout rO 1 g m RS RS 1 g m rO RS rO
EE105 Fall 2007 Lecture 19, Slide 8 Prof. Liu, UC Berkeley
CG Stage with Biasing
• R1 and R2 establish the gate bias voltage.
• R3 provides a path for the bias current of M1 to flow.
vout R3 || 1 / g m
g m RD
vin R3 || 1 / g m RS
vout v X g m1 RD 1
Av Rout g m1rO1 || RS rO1 || RD
v X vin 1 g m1 g m 2 RS gm2
EE105 Fall 2007 Lecture 19, Slide 11 Prof. Liu, UC Berkeley
Source Follower Stage
vout rO || RL
Av 1
vin 1 r || R
O L
gm
Small-signal analysis circuit for
determining voltage gain, Av Equivalent circuit
vout g m v1 ro RL
vin v1 vout
g m vin vout ro RL
EE105 Fall 2007 Lecture 19, Slide 12 Prof. Liu, UC Berkeley
Source Follower Example
• In this example, M2 acts as a current source.
rO1 || rO 2
Av
1
rO1 || rO 2
g m1
EE105 Fall 2007 Lecture 19, Slide 13 Prof. Liu, UC Berkeley
Rout of Source Follower
• The output impedance of a source follower is relatively low,
whereas the input impedance is infinite (at low frequencies);
thus, it is useful as a voltage buffer.
Small-signal analysis circuit for
determining output resistance, Rout
1 1
Rout || rO || RL || RL
gm gm
Assuming = 0:
1 W
I D nCox VDD I D RS VTH
2
2 L