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Unit 6

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5 views23 pages

Unit 6

Uploaded by

Aditya Konnur
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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UNIT 6

Embedded System & Other Microcontrollers


Lecture No.29
Lecture N

PIC Microcontrollers
 Peripheral Interface Controllers (PIC) is a family of microcontrollers
by Microchip Technology.
 PIC microcontrollers are RISC processors and use Harvard
architecture.
 The data memory of PIC is 8 bit wide.
 There are only 35 PIC instructions.
 Pic executes most of its instructions within 0.2 microsec., when
operated at its maximum clock rate.
 PIC machine cycle consists of 4 clock pulses in contrast with the 12
clock pulses per machine cycle in Intel 8051.
 PIC instruction set is highly orthogonal means non-overlapping or
mutually independent.
Fig 1. PIC 16C61 Block Diagram
Lecture
Lecture No.31
No. 31

Addressing Modes
 Direct Addressing
- Direct addressing mode uses 7 bits of the instruction and
the 8th bit from RP0 bit.
- If RP0 bit is ‘0’, then accessed location is from bank 0,
otherwise the location from bank 1 is accessed.
- Direct addressing is shown in fig. 2
- The lower 7 bits of instruction code along with RP0 bit
forms the 8 bit address.
Fig 2.Direct Addressing Mode
 Indirect Addressing
- In indirect addressing, the 8-bit address of the location in
register file to be accessed is written in file selection register
(FSR) & the instruction that uses 00H as the direct address,
which is INDF, results into indirect addressing.
- In fact the location pointed by FSR is actually accessed.
- For making the access indirect addressing independent of
bank selection procedure, the FSR is loaded with 8-bit
address directly.
- Fig 3. shows the operation of indirect addressing.
Fig 3. Indirect Addressing Mode
Lecture No.32

Timers
 Timer 0
- Timer 0 is a simple counter, 8 bit wide.
- The clocking source for timer 0 can either be the internal
system clock or an external clock.
- External clock to timer 0 can be given at pin RA4/TOCKI
as shown in fig.4
- Timer 0 overflow from 0FFH to 00H sets a flag TOIF in
INTCON. Further it causes an interrupt if the timer 0
interrupt is enabled.
i.e. if TOIE bit along with GIE bit in INTCON are set.
- Fig 5. explains the interrupt generation because of timer 0
overflow.
Fig 4. External clock source connections for Timer 0 for Timing/Counting
Fig 5. Timer 0 Overflow and Timer 0 Interrupt
 Watchdog Timer (WDT)
- Watchdog timer is used to prevent the processor from
endless loop.
- Watchdog timer will reset PIC microcontroller if the
instruction CLRWDT is not executed periodically.
- The CLRDWT instruction sets the timeout bit (TO) in the
STATUS register.
- The WDT timer can reset this TO bit.
- The normal timeout period of PIC watchdog timer is
around 18ms.
- The operation of WDT is shown in fig 6.
Fig 6. Watchdog Timer in 16CXX
Lecture No.34
Interrupts
• PIC 16C61 supports three interrupts.
1. External Interrupt:
- INT is the interrupt due to external source.
- A transition at pin RB0/INT causes this interrupt. This is an
edge-sensitive interrupt.
- When a valid interrupt signal appears at INT pin, INTF bit
is set in INTCON. INTF bit then must be reset in interrupt
service routine. Further this interrupt can wake the processor
from SLEEP mode.
- Fig 7. shows the general interrupt logic diagram for PIC
16C61
Fig 7. Interrupt logic diagram for PIC 16C61
2. Timer 0 Interrupt:
- Timer 0 overflow interrupt is generated when counter/timer
0 overflows from 0FFH to 00H.
- This will set the TOIF flag in INTCON.
- For this purpose, TOIE bit in INTCON must be set along
with GIE bit.
- This interrupt has importance in the sense that many real
problems can be solved using timer interrupt.
3. PORTB Change Interrupt:
- A change from high to low or low to high on PORTB pins
RB4 to RB7 causes this interrupt.
- It is possible to have PORTB change interrupt, if pins RB4 to
RB7 are configured as inputs.
- Interrupt on change function compares the current pin status
with the last one, and if there is any mismatch, the PORTB
change interrupt is generated setting the flag bit RBIF.
PIC 16C71 has one more interrupt associated with the ADC
operation.
ADC Interrupt:
- This interrupt is generated when the analog-to-digital
conversion ends.
- ADIE is the bit that enables this interrupt in INTCON
register.
Lecture No.35

Serial Communication

Serial versus Parallel Data Transfer


 Serial communication uses single data line making it much
cheaper
 Enables two computers in different cities to communicate
over the telephone
 Byte of data must be converted to serial bits using a parallel-
in-serial-out shift register and transmitted over a single data
line
 Receiving end there must be a serial-in-parallel-out shift
register
 If transferred on the telephone line, it must be converted to
audio tones by modem.
2 methods, asynchronous and synchronous
 synchronous method transfers a block of data (characters) at
a time.
 asynchronous method transfers a single byte at a time
 Uses special IC chips called UART (universal asynchronous
receiver-transmitter) and USART (universal synchronous­
asynchronous receiver-transmitter)
 8051 chip has a built-in UART
There are several popular types of serial communications.
 RS232. Peer-to-peer (i.e. communications between two
devices)
 RS485. Multi-point (i.e. communications between two or
more devices)
 USB (Universal Serial Bus). Replaced RS232 on desktop
computers.
 CAN (Controller Area Network). Multi-point. Popular in the
automotive industry.
 SPI (Serial Peripheral Interface). Developed by Motorola.
Synchronous master/slave communications.
 I2C (Inter-Integrated Circuit).Developed by Philips. Multi-
master communications.
Difference between Microprocessors and Microcontrollers
General block diagram of microprocessor
Block diagram of Microcontroller

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