Module – 1

Microprocessor vs Microcontroller
 Microcontrollers for Embedded Systems
• An embedded product uses a microprocessor (or microcontroller) to do one task and one task only
• o There is only one application software that is typically burned into ROM
• A PC, in contrast with the embedded system, can be used for any number of applications
• o It has RAM memory and an operating system that loads a variety of applications into RAM and lets the CPU
run them
• o A PC contains or is connected to various embedded products
• Each one peripheral has a microcontroller inside it that performs only one task

 Criteria for Choosing a Microcontroller

• Meeting the computing needs of the task at hand efficiently and cost effectively
• o Speed
• o Packaging
• o Power consumption
• o The amount of RAM and ROM on chip
• o The number of I/O pins and the timer on chip
• o How easy to upgrade to higher performance or lower power-consumption versions
• o Cost per unit
• Availability of software development tools, such as compilers, assemblers, and debuggers
• Wide availability and reliable sources of the microcontroller
• The 8051 family has the largest number of diversified (multiple source) suppliers
• o Intel (original)
• o Atmel
• o Philips/Signetics
• o AMD
• o Infineon (formerly Siemens)
• o Matra
8051 Architecture
 Salient features of 8051 microcontroller are given below.
• Eight bit CPU
• On chip clock oscillator
• 4Kbytes of internal program memory (code memory) [ROM]
• 128 bytes of internal data memory [RAM]
• 64 Kbytes of external program memory address space.
• 64 Kbytes of external data memory address space.
• 32 bi directional I/O lines (can be used as four 8 bit ports or 32 individually addressable I/O
lines)
• Two 16 Bit Timer/Counter :T0, T1
• Full Duplex serial data receiver/transmitter
• Four Register banks with 8 registers in each bank.
• Sixteen bit Program counter (PC) and a data pointer (DPTR)
• 8 Bit Program Status Word (PSW)
• 8 Bit Stack Pointer
• Five vector interrupt structure (RESET not considered as an interrupt.)
• 8051 CPU consists of 8 bit ALU with associated registers like accumulator ‘A’, B register, PSW,
SP, 16 bit program counter, stack pointer.
• ALU can perform arithmetic and logic functions on 8 bit variables.
• 8051 has 128 bytes of internal RAM which is divided into
o Working registers [00 – 1F]
o Bit addressable memory area [20 – 2F]
• 8051 has 4 K Bytes of internal ROM. The address space is
from 0000 to 0FFFh. If the program size is more than 4 K
Bytes 8051 will fetch the code automatically from
external memory.
• Accumulator is an 8 bit register widely used for all
arithmetic and logical operations. Accumulator is also
used to transfer data between external memory. B
register is used along with Accumulator for multiplication
and division. A and B registers together is also called
MATH registers.
• PSW (Program Status Word). This is an 8 bit register
which contains the arithmetic status of ALU and the bank
select bits of register banks.
 The heart of the 8051 is the circuitry that generates the clock
pulses by which all internal operations are synchronized.
• Pins XTALI and XTAL2 are provided for connecting a resonant
network to form an oscillator.
• The 8051 requires an external oscillator circuit. The oscillator
circuit usually runs around 12MHz. the crystal generates 12M
pulses in one second. The pulse is used to synchronize the
system operation in a controlled pace.
• A machine cycle is minimum amount time a simplest machine
instruction must take.
• An 8051 machine cycle consists of 12 crystal pulses (ticks).
• Instruction with a memory operand needs multiple memory
accesses (machine cycles).

• Typically, a quartz crystal and capacitors are employed, as shown

in Figure.
 Program Counter (PC) and Data Pointer (DPTR)
• • Program instruction bytes are fetched from locations in
memory that are addressed by the PC.
• • The PC is automatically incremented after every instruction
byte is fetched and may also be altered by certain instructions.
• • The PC is the only register that does not have an internal
address.
• • The DPTR register is made up of two 8-bit registers, named
DPH and DPL
• • Are used to furnish memory addresses for internal and
external code access and external data access.
• • The DPTR is under the control of program instructions
• • Can be specified by its 16-bit name, DPTR, or by each
individual byte name, DPH and DPL.
• • DPTR does not have a single internal address; DPH and DPL
are each assigned an address.
 Flags and the Program Status Word (PSW)
• • Flags are 1-bit registers provided to store the results of
certain program instructions.
• • Other instructions can test the condition of the flags
and make decisions based upon the flag states.
• • The 8051 has four math flags that respond
automatically to the outcomes of math operations and
three general-purpose user flags that can be set to 1 or
cleared to 0 by the programmer as desired.
• • The math flags include carry (C), auxiliary carry (AC),
overflow (OY), and parity (P).
• • User flags are named FO, GFO, and GFI; they are
general-purpose flags.
• • Note that all of the flags can be set and cleared by the
programmer.
• The Stack and the Stack Pointer
• The stack refers to an area of internal RAM that is used in
conjunction with certain opcodes to store and retrieve data
quickly.
• The 8-bit stack pointer (SP) register is used by the 8051 to
hold an internal RAM address that is called the "top of the
stack."
• The top of the stack is the location in internal RAM where the
last byte of data was stored by a stack operation.
• The SP increments before storing data on the stack so that
the stack grows up as data is stored.
• As data is retrieved from the stack, the byte is read from the
stack, and then the SP decrements to point to the next
available byte of stored data.
• The SP is set to 07h when the 8051 is reset and can be
changed to any internal RAM address by the programmer.
• Special Function Registers
• • The 8051 has a group of specific internal registers, each called a special-
function register (SFR), which may be addressed much like internal RAM,
using addresses from 80h to FFh.
• • Some SFRs (marked with an asterisk*) are also bit addressable; this
feature allows the programmer to change only what needs to be altered,
leaving the remaining bits in that SFR unchanged.

• Not all of the addresses from 80h to FFh are used for SFRs, and
attempting to use an address that is not defined, or "empty" results in
unpredictable results.
• • SFRs are named in certain opcodes by their functional names, such as A
or TH0, and are referenced by other opcodes by their addresses, such as
0E0h or 8Ch.
• • Note that any address used in the program must start with a number;
thus address E0h for the A SFR begins with 0.
• • Failure to use this number convention will result in an assembler error
when the program is assembled.
Pinout Description
Pins 1-8 PORT 1. Each of these pins can be configured as an input or an
output.
Pin 9 RESET. A logic one on this pin disables the microcontroller and
clears the contents of most registers. In other words, the
positive voltage on this pin resets the microcontroller. By
applying logic zero to this pin, the program starts execution
from the beginning.
Pins10-17 PORT 3. Similar to port 1, each of these pins can serve as
general input or output. Besides, all of them have alternative
functions
Pin 10 RXD. Serial asynchronous communication input or Serial
synchronous communication output.
Pin 11 TXD. Serial asynchronous communication output or Serial
synchronous communication clock output.
Pin 12 INT0.External Interrupt 0 input

Pin 13 INT1. External Interrupt 1 input

Pin 14 T0. Counter 0 clock input

Pin 15 T1. Counter 1 clock input

Pin 16 WR. Write to external (additional) RAM

Pin 17 RD. Read from external RAM

Pin 18, 19 XTAL2, XTAL1. Internal oscillator input and output. A quartz crystal
which specifies operating frequency is usually connected to these pins.

Pin 20 GND. Ground.

Pin 21-28 Port 2. If there is no intention to use external memory then these port
pins are configured as general inputs/outputs. In case external memory
is used, the higher address byte, i.e. addresses A8-A15 will appear on
this port. Even though memory with capacity of 64Kb is not used, which
means that not all eight port bits are used for its addressing, the rest of
them are not available as inputs/outputs.
Pin 29 PSEN. If external ROM is used for storing program then a logic zero (0)
appears on it every time the microcontroller reads a byte from
memory.
Pin 30 ALE. Prior to reading from external memory, the microcontroller puts
the lower address byte (A0-A7) on P0 and activates the ALE output.
After receiving signal from the ALE pin, the external latch latches the
state of P0 and uses it as a memory chip address. Immediately after
that, the ALE pin is returned its previous logic state and P0 is now
used as a Data Bus.
Pin 31 EA. By applying logic zero to this pin, P2 and P3 are used for data and
address transmission with no regard to whether there is internal
memory or not. It means that even there is a program written to the
microcontroller, it will not be executed. Instead, the program written
to external ROM will be executed. By applying logic one to the EA pin,
the microcontroller will use both memories, first internal then
external (if exists).
Pin 32-39 PORT 0. Similar to P2, if external memory is not used, these pins can
be used as general inputs/outputs. Otherwise, P0 is configured as
address output (A0-A7) when the ALE pin is driven high (1) or as data
output (Data Bus) when the ALE pin is driven low (0).
Pin 40 VCC. +5V power supply.
Input/ Output Pins, Ports, and Circuits
 Ports can be accessed directly by instructions during program execution
 I/O ports are memory mapped, they are treated as memory locations
 All ports are bit addressable
 Each PIN consists of a D latch, I/P buffer and O/P driver
 SFRs for each port is made of 8-latches
 The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins
 All the ports upon RESET are configured as output, ready to be used as

output ports
o When the first 0 is written to a port, it becomes an output
o To reconfigure it as an input, a 1 must be sent to the port
To use any of these ports as an input port, it must be programmed
 External Memory (ROM & RAM)
interfacing
• Eg. Interfacing of 16 K Byte of RAM and 32 K
Byte of EPROM to 8051
• Number of address lines required for 16 Kbyte
memory is 14 lines and that of 32Kbytes of
memory is 15 lines.
The connections of external memory is shown below.

ROM
Timers/Counters are used generally for
 Time reference
 Creating delay
 Wave form properties measurement
 Periodic interrupt generation
 The 8051 has two timers/counters, they can be
used either as Timers to generate a time delay
or as Event counters to count events happening
outside the microcontroller
8051 has two timers, Timer 0 and Timer 1.
 Timer 0 and Timer 1 are 16 bits.
 8051 has an 8-bit architecture, each 16-bits
timer is accessed as two separate registers of
low byte and high byte.
 The low byte register is called TL0/TL1 and
The high byte register is called TH0/TH1.
 Accessed like any other register.
Timer in 8051 is used as timer, counter and baud rate
generator. Timer always counts up irrespective of whether
it is used as timer, counter, or baud rate generator: Timer is
always incremented by the microcontroller. The time taken
to count one digit up is based on master clock frequency.
 If Master CLK=12 MHz,
 Timer Clock frequency = Master CLK/12 = 1 MHz
 Timer Clock Period = 1micro second
 This indicates that one increment in count will take 1
microsecond.
 The two timers in 8051 share two SFRs (TMOD and
TCON) which control the timers, and each timer also
has two SFRs dedicated solely to itself (TH0/TL0 and
TH1/TL1).
TMOD Register
 Both timers 0 and 1 use the same register, called
TMOD (timer mode), to set the various timer
operation modes
 TMOD is an 8-bit register
 The lower 4 bits are for Timer 0, the upper 4 bits are
for Timer 1
 In each case, the lower 2 bits are used to set the
timer mode, the upper 2 bits to specify the operation.
TMOD Register
TCON register
 TCON (timer control) register is an 8bit
register
 SERIAL COMMUNICATION
• The 8051 microcontroller is parallel device that transfers
eight bits of data simultaneously over eight data lines to
parallel I/O devices.
• Parallel data transfer over a long is very expensive.
Hence, a serial communication is widely used in long
distance communication.
• In serial data communication, 8-bit data is converted to
serial bits using a parallel in serial out shift register and
then it is transmitted over a single data line.
• The data byte is always transmitted with least significant
bit first.
Basics of serial data communication
Communication Links
1. Simplex communication link: In simplex
transmission, the line is dedicated for
transmission. The transmitter sends and the
receiver receives the data.
2. Half duplex communication link: In half
duplex, the communication link can be used for
either transmission or reception. Data is
transmitted in only one direction at a time.
3. Full duplex communication link: If the data
is transmitted in both ways at the same time, it is
a full duplex i.e. transmission and reception can
proceed simultaneously. This communication
link requires two wires for data, one for
transmission and one for reception.
• SCON register
• SM0, SM1:They determine the framing of data by specifying
the number of bits per character, and the start and stop bits

• SM2: This enables the multiprocessing capability of the 8051

• REN (receive enable) : It is a bit-addressable register ƒ When
it is high, it allows 8051 to receive data on RxD pin ƒ If low,
the receiver is disable
• TI (transmit interrupt) : When 8051 finishes the transfer of
8-bit character ƒ It raises TI flag to indicate that it is ready to
transfer another byte ƒ TI bit is raised at the beginning of the
stop bit.
• RI (receive interrupt) : When 8051 receives data serially via
RxD, it gets rid of the start and stop bits and places the byte in
SBUF register ƒ It raises the RI flag bit to indicate that a byte
has been received and should be picked up before it is lost ƒ
RI is raised halfway through the stop bit.
3. PCON register: The SMOD bit (bit 7) of
PCON register controls the baud rate in
asynchronous mode transmission
What is an Interrupt?
An interrupt refers to a notification, communicated to
the controller, by a hardware device or software, on
receipt of which controller momentarily stops and
responds to the interrupt. Whenever an interrupt occurs
the controller completes the execution of the current
instruction and starts the execution of an Interrupt
Service Routine (ISR) or Interrupt Handler.
ISR is a piece of code that tells the processor or
controller what to do when the interrupt occurs. After
the execution of ISR, controller returns back to the
instruction it has jumped from (before the interrupt was
received). The interrupts can be either hardware
interrupts or software interrupts.
Interrupt Enable
While programming interrupts, first thing to do is to specify the
microcontroller which interrupts must be served. This is done by
configuring the Interrupt Enable (IE) register which enables or
disables the various available interrupts. The Interrupt Enable
register has following bits to enable/disable the hardware
interrupts of the 8051 controller.
• To enable any of the interrupts, first the EA bit must be set to 1.
After that the bits corresponding to the desired interrupts are
enabled. ET0, ET1 and ET2 bits are used to enable the Timer
Interrupts 0, 1 and 2, respectively. In AT89C51, there are only
two timers, so ET2 is not used. EX0 and EX1 are used to enable
the external interrupts 0 and 1. ES is used for serial interrupt.
• EA bit acts as a lock bit. If any of the interrupt bits are enabled
but EA bit is not set, the interrupt will not function. By default
all the interrupts are in disabled mode.
• Note that the IE register is bit addressable and individual
interrupt bits can also be accessed.
For example –
IE = 0x81; enables External Interrupt0 (EX0)
IE = 0x88; enables Serial Interrupt
• A subroutine for a particular interrupt is identified by
this number.
• These subroutine numbers corresponding to different
interrupts are tabulated below.