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Phase 1

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0% found this document useful (0 votes)
23 views23 pages

Phase 1

Uploaded by

mischiff305
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We take content rights seriously. If you suspect this is your content, claim it here.
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Bansilal Ramnath Agarwal Charitable Trust‘s

Vishwakarma Institute of Technology


Bibwewadi, Pune
Accredited with ‘A++’ Grade by NAAC
Presentation
On
Subject: Operating Systems (CS2008)
Course Project
by
Mrs. Archana Burujwale
Department of Computer Engineering
CS2008:: Operating Systems Laboratory
Lab: 2 Hours/Week
CS2008:: Operating Systems

Course Prerequisites: Computer Architecture & organization, Data Structure

Course Objectives:
1.To learn functions of Operating System
2.To learn the importance of concurrency and how to implement concurrent
abstractions correctly in an OS.
3.To learn OS scheduling policies and mechanisms.
4.To deal with deadlock
5.To learn memory management schemes in various ways to improve performance,
and how this impacts system complexity
6. To learn design & develop the Operating system from a scratch.
Scenario: Construct a small virtual machine

CPU

Input Output Memory


device device

4
Scenario:
R

IR 0
1
IC

99

Memory
CPU

Input Output
device device
5
Specifications

• Main memory: 100 words * 4 byes


• Block: 10 words * 4 bytes
• Input device: CPU can read multiple cards
• Card reader: It can read multiple cards
• Size of each card: 1 block: 10* 4 bytes= 40 bytes
• Output device: eg. Line printer
• Can print one line = 1 card = 40 bytes
• Size of each card: Max. 40 bytes
• Except H all other instructions are of 4 bytes.
Types of cards
• Control Card
• Program Card
• Data Card
Instruction Set
• GD <10>: Get data from the data card and put it in the memory block
whose starting address is 10
• PD <10>: Print the data from block whose starting address is 10 and
print it in output file for display. It prints complete block.
• LR <10>: Load register with the contents of memory location <10>.
Register is general purpose register.
• SR <10>: Store the contents of register to memory location <10>
• CR <10>: Compare content of register R and memory location <10>.
Result will be stored in Toggle register, if both values are equal: Toggle
=True (T)
• BT <05>: Branch on Toggle
If toggle is true, jump to memory location <05> and start executing
instructions from this location.
• H: Halt: stop the execution
First Program
• Write jobs in input file: input.txt
• Group of cards is known as job

$AMJ 0001 00030001


GD 10 PD 10 H
$DTA
Hello World
$END 0001
First Program

$AMJ 0001 00030001


• $AMJ: control card
• $AMJ: A multiprogramming job
• 0001: Job ID
• 0003: TTL: Total time limit; Time required to execute the program
• 0001: TLL: Time line limit: Total number of output lines
First Program

GD 10 PD 10 H

• Program Card having 3 instructions

$DTA
• Data card
• It indicates end of program. Follow actual data of program.

$END 0001
• Job end
Second Program

$AMJ 0002
GD 20 GD 30 GD 40 GD50 LR 20 CR 30 BT 09 PD50 H PD 40 H
$DTA
VIT
VIIT
SAME
NOT SAME
$END 0002
Memory Entry
Second Program Location
0 GD 20
Memory Entry
Location 1 GD 30
0 First instruction of 2 GD 40
program
3 GD 50
4 LR 20
20 VIT
5 CR 30
6 BT 09
30 VIIT
7 PD 50
8 H
40 SAME
9 PD 40
10 H
50 NOT
11 …
51 SAME
Unit-I Multiprogramming Operating System (MOS) Project
(First Version)
Assumptions:
• Jobs entered without error in input file
• No physical separation between jobs
• Job outputs separated in output file by 2 blank lines
• Program loaded in memory starting at location 00
• No multiprogramming, load and run one program at a time
• SI interrupt for service request
Notation
• Copy program card into buffer then load into memory, every time m is
incremented by 1
• To start execution follow instruction execution cycle fetch-decode-execute
• M: memory; IR: Instruction Register (4 bytes)
• IR [1, 2]: Bytes 1, 2 of IR/Operation Code
• IR [3, 4]: Bytes 3, 4 of IR/Operand Address
• M[&]: Content of memory location &
• IC: Instruction Counter Register (2 bytes)
• R: General Purpose Register (4 bytes)
• C: Toggle (1 byte)
• : Loaded/stored/placed into
How to write program
• input.txt: Load the program code
• Write another program which works like OS
• Declare buff[40]- 1 D array
• M[100][4] – char array for memory
• IR- 1 D array
• IC – 1 D array
• Toggle- 1 byte boolean
• Writ init() function to flush off everything
Check if $ AMJ
Init()
$DTA
start execution
$END
Continue
• Copy program card into buffer then load into memory.
• Every time m is incremented by 1
OS Program
LOAD
m=0
While not e-o-f
Read next (program or control) card from input file in a buffer
Control card: $AMJ, end-while
$DTA, MOS/START EXECUTION
$END, end-while
Program Card: If m = 100, abort (memory exceeded)
Store buffer in memory locations m through m + 9
m = m + 10
End-While
STOP
OS Program EXECUTEUSERPROGRAM (SLAVE
MOS MODE)
STARTEXECUTION Loop
IR = M [IC] //instruction fetched into IR
IC = 00
IC = IC+1
EXECUTEUSERPROGRAM Examine IR[1,2]
LR: R  M [IR[3,4]]
SR: R  M [IR[3,4]]
CR: Compare R and M [IR[3,4]]
If equal C  T else C  F
BT: If C = T then IC  IR [3,4]
GD: SI = 1
PD: SI = 2
H: SI = 3
End-Examine
End-Loop
OS Program

MOS (MASTER MODE)


SI = 3 (Initialization)
Case SI of
1: Read
2: Write
3: Terminate
Endcase
OS Program
READ
IR [4]  0
Read next (data) card from input file in memory locations IR [3,4]

through IR [3,4] +9

If M [IR [3,4]] = $END, abort (out-of-data)


EXECUTEUSERPROGRAM

Buffer-> Memory
OS Program
WRITE
IR [4]  0
Write one block (10 words of memory) from memory locations IR
[3,4] through IR [3,4] + 9 to output file
EXECUTEUSERPROGRAM

Memory->Buffer->output file

TERMINATE
Write 2 blank lines in output file
MOS/LOAD
Assignment 1
• Write a program to display pyramid of *
Input:
$DTA
*

Output:
*
* *
* * *

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