ProgrammableDevices 2
ProgrammableDevices 2
· -6 is 1110 -4 1100
-3 1011
-2 1010
16 different bit patterns -1 1001
Only 15 different numbers -0 1000
0 0000
can be represented because 1 0001
+0 and -0 are different 2 0010
numbers (that’s awkward) 3 0011
4 0100
5 0101
6 0110
7 0111
Signed Magnitude
· Difficult to construct adder circuit:
· Check sign bit
(+5) + (+2) = +(5+2) = +7
If same (-5) + (-2) = -(5+2) = -7
Add numbers and give result same sign bit
If different
(+5) + (-2) = +(5-2) = +3
Find which is larger and smaller (-5) + (+2) = -(5-2) = -3
zero when we add one to it
1100
1101
1110 This is the number that gives
1111 zero when we add one
0000 Use this to represent -1
…
2s Complement
· Basic idea:
· 4-bit counter follows sequence
0000
0001
-2 means the number that gives
…
zero when we add 2 to it
1100
1101 This is the number that gives
1110 zero when we add 2
1111 Use this to represent -2
0000
2s complement
· 2s complement gives most significant bit negative weight
2s comp addition 0
1
0000
0001
-8
-7
1000
1001
2 0010 -6 1010
· Unsigned binary 3 0011 -5 1011
4 0100 -4 1100
1100 (denary 12)
+ 0010 (denary 2) 5 0101 -3 1101
= 1110 (denary 14) 6 0110 -2 1110
7 0111 -1 1111
8 1000 0 0000
· 2s complement 9 1001 1 0001
1100 (denary -4) 10 1010 2 0010
+ 0010 (denary 2) 11 1011 3 0011
= 1110 (denary -2) OK 12 1100 4 0100
13
An adder that works for unsigned binary 1101 5 0101
14 1110
needs no modification to work for 2s complement 6 0110
15 1111 7 0111
Overflow in 2s Complement
· Overflow occurs when result cannot be represented in
available bits
· We’ll look at some 4-bit examples
· Unsigned (“pure”) binary
Number range is 0 to 15
Overflow can be detected when msb’s C
OUT=1
· 2s complement
Number range is -8 to +7
Overflow can be detected when
Input numbers both positive but output is negative
C
V
Q3 Q2 Q1 Q0
Adder with Overflow Detection
· Status flags
· C flag: msb’s COUT=1
if we interpret as unsigned then overflow occurred
· V flag:
if we interpret as 2s complement then overflow occurred
B3 A 3 B2 A 2 B1 A 1 B0 A 0
C
V
Q3 Q2 Q1 Q0
Summary
· We need to extend binary to represent negative numbers
· Standard scheme is 2s complement
· Addition with fixed number of bits can overflow:
Answer can’t be represented in available number of bits
· Status flags can be added to adder to indicate when a
problem has occurred