Chapter Eleven

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
• Contents:

• 11.1 8088 INPUT/OUTPUT INSTRUCTIONS (from

Mazidi)

• 11.2 I/O PORT ADDESS DECODING (from Barry

B. Brey)

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS

• All x86 processors, 8088 to Pentium®, can access

external devices called ports using I/O instructions.

MEMR
IOR
MEMW
IOW

http://www.talktoanit.com/A+/aplus-website/lessons-io-principles.html

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS

• All x86 processors, 8088 to

Pentium®, can access
external devices called ports
using I/O instructions.
• A port is an address for
processor.
• Data can be read from IO
ports
• Data can be written to IO port

http://www.kids-online.net/learn/click/details/ioports2.gif

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS

• All x86 processors, 8088 to Pentium®, can access

external devices called ports using I/O instructions.
• Memory can contain:
– Instructions (i.e. OPCODE )
– DATA.
• I/O ports contain only DATA
• Two instructions transfer data to and from IO
devices.
– “OUT” sends data to IO port from accumulator (AL or AX)
– “IN” brings data from IO port to accumulator (AL or AX)

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
8-bit data ports
• 8088 I/O operation is applicable to all x86 CPUs.
– The 8-bit port uses the D0–D7 data bus for I/O devices.
• Register AL is used as the source/destination
for IN/OUT instructions.
– To input or output data from any other registers,
the data must first be moved to the AL register.
• Instructions OUT and IN have the following formats:

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
how to use I/O instructions
• I/O instructions are used in programming 8- and
16-bit peripheral devices.
– Printers, hard disks, and keyboards.
• For an 8-bit port (fixed IO addressing), use immediate
addressing:

• Can address only 256 ports

• For more ports, use 16-bit port address instruction
(Variable IO addressing).

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
how to use I/O instructions
• 16-bit port address instruction using register indirect
addressing mode with register DX.
– This program toggles port address 300H continuously.

– Only DX can be used for 16-bit I/O addresses.

– Use register AL for 8-bit data.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
how to use I/O instructions
Example 11-1 Temperature Alarm

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2 I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• I/O address decoding is similar to memory address
decoding.

• The concept of address bus decoding for I/O

instructions is exactly the same as for memory.
– 1. The control signals IOR and IOW are used along
with the decoder.
– 2. For an 8-bit port address, A0–A7 is decoded. (fixed)
– 3. If the port address is 16-bit (using DX), A0–A15
is decoded (variable), mostly used in personal
computers.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Communicating with I/O devices using IN and OUT
instructions is referred to as peripheral I/O.
– Some designers also refer to it as isolated I/O.

• Some processors do not have IN & OUT instructions,

but use Memory-mapped I/O.
– A memory location is assigned as an input or output port.
– Instructions access memory locations to access I/O ports.
• Instead of IN and OUT instructions.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
Memory mapped I/O decoding Isolated I/O decoding

All address lines must be decoded. Fixed: only A7- A0 decoded

Variable: only A15 - A0 decoded

Control signals: Control Signals:

MEMR, MEMW IORC, IOWC

Programming instructions: Programming instructions:

MOV IN, OUT

All arithmetic operations possible No direct arithmetic instruction is

possible

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Decoding 8 bit I/O Port Addresses:
 Fixed I/O instructions uses 8-bit I/O port address
that appear on A15 – A0 as 0000H – 00FFH.
 Only A7 – A0 address lines are decoded and higher
lines are ignored. However, personal computers do
not used fixed I/O instructions and always use 16 –
bit I/O address line.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
In figure 11-10, it can be seen that only lower 8
address lines are used to address any I/O device.
Each Yx connection is attached to single I/O device.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Only A7-A0 address lines are connected to decoder.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• VHDL code for figure 11-11:

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Decoding 16 Bit I/O port addresses:
 PC systems typically use 16-bit I/O addresses.
 What is the main difference between decoding 8 bit
I/O addresses and 16 bit I/O addresses?
 The only difference is the number of address lines
engaged. 8-bit I/O addresses need decoding of A7-
A0 lines while 16 bit I/O addresses need decoding
of A15-A0.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• As we are decoding 16
address lines, all of them
cannot be covered through
PLD. So a small NAND
circuit can be incorporated
to cover all address lines.

• A PLD and NAND gate is

used to decode I/O ports
EFF8H – EFFFH.

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)

The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey