CH 3
CH 3
Computer Organization
and Architecture
6th Edition
Chapter 3
System Buses
Pentium Processors—Specifications
• Pentium 4 Architectures
• We have a computer!
Components
• The Control Unit and the Arithmetic and Logic
Unit constitute the Central Processing Unit
• Data and instructions need to get into the
system and results out
—Input/output
• Temporary storage of code and results is
needed
—Main memory
Computer Components:
Top Level View
Instruction Cycle
• Two steps:
—Fetch
—Execute
Fetch Cycle
• Program Counter (PC) holds address of next
instruction to fetch
• Processor fetches instruction from memory
location pointed to by PC
• Increment PC
—Unless told otherwise
• Instruction loaded into Instruction Register (IR)
• Processor interprets instruction and performs
required actions
Execute Cycle
• Processor-memory
—data transfer between CPU and main memory
• Processor I/O
—Data transfer between CPU and I/O module
• Data processing
—Some arithmetic or logical operation on data
• Control
—Alteration of sequence of operations
—e.g. jump
• Combination of above
Example of Program Execution
Instruction Cycle -
State Diagram
Interrupts
• Interrupt is a request for attention from the processor. When the
processor receives an interrupt, it suspends its current operations,
saves the status of its work, and transfers control to a special routine
known as an interrupt handler, which contains the instructions for
dealing with the particular situation that caused the interrupt.
• Mechanism by which other modules (e.g. I/O) may interrupt normal
sequence of processing
• Program
— e.g. overflow, division by zero
• Timer
— Generated by internal processor timer
— Used in pre-emptive multi-tasking
• I/O
— from I/O controller
• Hardware failure
— e.g. memory parity error
Program Flow Control
Interrupt Cycle