Chapter 03 - Introduction To Rlls
Chapter 03 - Introduction To Rlls
CONTENTS
1. PLC operation
2. PLC programming
3. Ladder logic
4. Memory and gates
1
PLC operation
A PLC has 2 modes of operation
2
Programming through standard computer
Most PLC manufacturers offer software packages
that allow a standard computer to be used as a
programming terminal
3
PLC running or scanning mode
4
Relating the program to inputs and outputs
5
PLC programming
One of the advantages of PLC is that it can be programmed by
non-specialists
Program can be written in the form of a relay ladder diagram
represented in terms of contacts and coils.
Contact: A simple input switch.
Coil: An output load, e.g., a relay or motor.
6
Ladder logic
Power supply rails drawn as parallel vertical lines on
left and right
Connection of rails implies current will flow
An output is “on” when a connection is completed and
current flows through the load’s coil
Illustration of ladder logic
Power
circuit
Control
Switch
circuit Relay
Coil
8
Ladder logic: basic notations
Simple “always on” load:
Load controlled by a single contact:
[Switch_Con = Switch]
Ladder logic: AND gate, OR gate
Boolean logic
C = (not A) also noted Ā
A contact with a slash through it is “normally
closed.”
This indicates a connection when A is NOT
triggered.
So when sensor/input A is activated, there is an
open circuit
Ladder logic: basic operations
Each rung of the ladder is a statement that is
asynchronous when implemented in relay logic,
but evaluated sequentially by the PLC.
X = (A+B).(C+D),
Y = Ā.[B+(C.D)]
Ladder logic: examples
13
Ladder logic: setting a memory
S1 Q1.1
2
Current flow (Scan 1)
Output
Q1.1
Q1.1
Switch
Current flow (Scan 2) “S1” to start 14
Setting memory elements
using AND and OR gates
S1 S2 S3 R1 Memory Unit
AND Gate for
setting
R1
S1 S3 R1 Memory Unit
OR Gate for
setting
S2
R1
15
Ladder logic: resetting a memory
S1 S2 Q1.1
S1 S2 Q1.1
Motor starter
2
Q1.1 Output
Q1.1
S1 S2 PLC
3
Input
Q1.1
Switches
“S1” to start 16
“S2” to stop
Resetting memory elements
using AND and OR gates
S1 S2 S3 R1
R1
S2 S3 S2+S3 NOT(S2+S3)
0 0 0 1 The only case for
current ON is
0 1 1 0 when (S2 is NOT
1 0 1 0 switched ON)
AND (S3 is NOT
1 1 1 0
switched ON)
17
Resetting memory elements
using AND and OR gates
S1 S2 R1
S3
R1
S2 S3 S2.S3 NOT(S2.S3)
0 0 0 1 The only case for
current OFF is
0 1 0 1 when (S2 is
1 0 0 1 switched ON)
AND (S3 is
1 1 1 0
switched ON)
18
Ladder logic: adding indicators as outputs
S1 S2 R1
R1
R1 Q1.1
R1 R
19
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