Logic Gates and Boolean Algebra

Objectives

 Basic gates: NOT,AND, OR

 Extend gates: NAND,NOR, Exclusive-OR, Exclusive-NOR
 Symbols
 Truth Tables
 Boolean Expressions
Logic Gates

 In the earliest computers, switches were opened and closed by magnetic fields produced by
energizing coils in relays. The switches in turn opened and closed the current paths.
 Later, vacuum tubes that open and close current paths electronically replaced relays.
 Today, transistors are used as electronic switches that open and close current paths.
The Inverter

 The inverter performs the Boolean NOT operation. When the input is LOW, the output is
HIGH; when the input is HIGH, the output is LOW.
 The NOT operation (complement) is shown with an overbar. Thus, the Boolean expression for
an inverter is X = A.

Input Output
A X
LOW (0) HIGH (1)
HIGH (1) LOW(0)
The Inverter

A X

Example waveforms:

A group of inverters can be used to form the 1’s complement

of a binary number: Binary number
1 0 0 0 1 1 0
1

1’s complement
AND gate
A A
X & X
B B

The AND gate produces a HIGH output when all inputs are HIGH; otherwise, the output is LOW. For a 2-input
gate, the truth table is

Inputs Output
A B X
0 0 0
0 1 0
1 0 0
1 1 1
The AND operation is usually shown with a dot between the variables but it may be implied (no dot). Thus, the
AND operation is written as X = A .B or X = AB.
AND Gate
A A
X & X
B B

Example waveforms:

The AND operation is used in computer programming as a selective mask. If you

want to retain certain bits of a binary number but reset the other bits to 0, you could
set a mask with 1’s in the position of the retained bits.

If the binary number 10100011 is ANDed with the mask

00001111, what is the result? 00000011
OR Gate

A X A ≥1 X
B B
The OR gate produces a HIGH output if any input is HIGH; if all inputs are LOW, the output is LOW. For a 2-
input gate, the truth table is

Inputs Output
A B X
0 0 0
0 1 1
1 0 1
1 1 1

The OR operation is shown with a plus sign (+) between the variables. Thus, the OR operation is written as X =
A + B.
OR Gate
A X A ≥1 X
B B
Example waveforms:

The OR operation can be used in computer programming to set certain bits of a binary number to 1.

ASCII letters have a 1 in the bit 5 position for lower case letters and a 0 in this
position for capitals. (Bit positions are numbered from right to left starting with
0.) What will be the result if you OR an ASCII letter with the 8-bit mask
00100000?
The resulting letter will be lower case.
NAND Gate
A X A & X
B B
The NAND gate produces a LOW output when all inputs are HIGH; otherwise, the output is HIGH. For a 2-
input gate, the truth table is

Inputs Output
A B X
0 0 1
0 1 1
1 0 1
1 1 0
The NAND operation is shown with a dot between the variables and an overbar covering them. Thus, the NAND
operation is written as X = A .B (Alternatively, X = AB.)
NAND Gate
A X A & X
B B
Example waveforms:

The NAND gate is particularly useful because it is a “universal” gate – all other
basic gates can be constructed from NAND gates.

How would you connect a 2-input NAND gate to form a basic inverter?
NOR Gate

The NOR Gate A X A ≥1 X

B B
The NOR gate produces a LOW output if any input is HIGH; if all inputs are HIGH, the output is LOW. For a
2-input gate, the truth table is

Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 0
The NOR operation is shown with a plus sign (+) between the variables and an overbar covering them. Thus,
the NOR operation is written as X = A + B.
NOR Gate

A X A ≥1 X
B B
Example waveforms:

The NOR operation will produce a LOW if any input is HIGH.

+5.0 V

When is the LED is ON for the circuit shown? 330 W

A
The LED will be on when any of B X
C
the four inputs are HIGH. D
XOR Gate

A X A =1 X
B B
The XOR gate produces a HIGH output only when both inputs are at opposite
logic levels. The truth table is

Inputs Output
A B X
0 0 0
0 1 1
1 0 1
1 1 0
The XOR operation is written as X = AB + AB. Alternatively, it can be written with a circled plus sign between
the variables as X = A + B.
XOR Gate

A X A =1 X
B B
Example waveforms:

Notice that the XOR gate will produce a HIGH only when exactly one
input is HIGH.
If the A and B waveforms are both inverted for the above
waveforms, how is the output affected?

There is no change in the output.

XNOR Gate

A X A =1 X
B B
The XNOR gate produces a HIGH output only when both inputs are at the same logic level. The truth table is

Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 1
The XNOR operation shown as X = AB + AB. Alternatively, the XNOR operation can be shown with a circled
dot between the variables. Thus, it can be shown as X = A . B.
XNOR Gate

A X A =1 X
B B
Example waveforms:

Notice that the XNOR gate will produce a HIGH when both inputs are the
same. This makes it useful for comparison functions.
If the A waveform is inverted but B remains the same, how is
the output affected?

The output will be inverted.

Gate Equivalence – Universal Gates
Boolean Algebra

 In 1854, George Boole, An Investigation of the Laws of Thought, on which are

Founded the Mathematical Theories of Logic and Probabilities
– The design of the following treatise is to investigate the fundamental laws of those operations
of the mind by which reasoning is performed;…to collect from the various elements of truth
brought to view in the course of these inquiries some probable intimations concerning the
nature and constitution of the human mind.
– “the operations of the mind are in a certain real sense subject to laws, and that a science of the
mind is therefore possible.”

 In 1938, Claude E. Shannon, A Symbolic Analysis of Relay and Switching

Circuits, Master thesis
– Application of Boolean Algebra in Digital Design and Analysis
Boolean Addition

In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable
can only have a value of 1 or 0.

The complement represents the inverse of a variable and is indicated with an overbar. Thus, the
complement of A is A.
A literal is a variable or its complement.
Addition is equivalent to the OR operation. The sum term is 1 if one or more if the literals are 1. The
sum term is zero only if each literal is 0.

Determine the values of A, B, and C that make the sum term of the expression A + B +
C = 0?
Each literal must = 0; therefore A = 1, B = 0 and C = 1.
Boolean Multiplication

In Boolean algebra, multiplication is equivalent to the AND operation. The product of literals forms
a product term. The product term will be 1 only if all of the literals are 1.

What are the values of the A, B and C if the product term of A.B.C = 1?

Each literal must = 1; therefore A = 1, B = 0 and C = 0.

Commutative Laws

The commutative laws are applied to addition and multiplication. For addition, the commutative
law states
In terms of the result, the order in which variables are ORed makes no difference.

A+B=B
+A

For multiplication, the commutative law states

In terms of the result, the order in which variables are ANDed makes no difference.
AB =
BA
Associative Laws

The associative laws are also applied to addition and multiplication. For addition, the associative
law states
When ORing more than two variables, the result is the same regardless of the grouping of
the variables.

A + (B +C) = (A +
B) + C
For multiplication, the associative law states
When ANDing more than two variables, the result is the same regardless of the grouping
of the variables.

A(BC) =
(AB)C
Distributive Law

The distributive law is the factoring law. A common variable can be factored from an expression
just as in ordinary algebra. That is

AB + AC =
A(B+ C)
The distributive law can be illustrated with equivalent circuits:

A
AB
B B
B+ C
C X
X A
A AC
C
A(B+ AB +
C) AC
Rules of Boolean Algebra

1. A + 0 = A 7. A . A = A
2. A + 1 = 1 8. A . A = 0
=
3. A . 0 = 0 9. A = A

4. A . 1 = A 10. A + AB = A

5. A + A = A 11. A + AB = A + B

6. A + A = 1 12. (A + B)(A + C) = A + BC
Rules of Boolean Algebra

Rules of Boolean algebra can be illustrated with Venn diagrams . The variable A is shown as an area.

The rule A + AB = A can be illustrated easily with a diagram. Add an overlapping area to represent
the variable B.
The overlap region between A and B represents AB.

A B A
AB =

The diagram visually shows that A + AB = A. Other rules can be illustrated with the diagrams as
well.
Rules of Boolean Algebra

Illustrate the rule A + AB = A + B with a Venn diagram.

This time, A is represented by the blue area and B again by the red circle.
The intersection represents AB.
Notice that A + AB = A + B

A
A BA
AB
Rules of Boolean Algebra

Rule 12, which states that (A + B)(A + C) = A + BC, can be proven by applying earlier rules as
follows:

(A + B)(A + C) = AA + AC + AB + BC
= A + AC + AB + BC
= A(1 + C + B) + BC
= A . 1 + BC
= A + BC

This rule is a little more complicated, but it can also be shown with a Venn
diagram, as given on the following slide…
 Three areas represent the variables A, B, and C.

The area representing A + B is shown in yellow.

The area representing A + C is shown in red.

The overlap of red and yellow is shown in orange.

The overlapping area between B and C represents BC.

ORing with A gives the same area as before.

A B A B
A+B
A+C = BC
C C
(A + B)(A + C) A + BC
DeMorgan’s Theorem

DeMorgan’s 1st Theorem

The complement of a product of variables is equal to the sum of the complemented variables.

AB = A + B
Applying DeMorgan’s first theorem to gates:

Inputs Output
A B AB A + B
A A
AB A+B 0 0 1 1
B B 0 1 1 1
1 0 1 1
1 1 0 0
NAND Negative-OR
DeMorgan’s Theorem

DeMorgan’s 2nd Theorem

The complement of a sum of variables is equal to the product of the complemented
variables.

A+B=A.B

Applying DeMorgan’s second theorem to gates:

Inputs Output
A A A B A + B AB
A+B AB
B B 0 0 1 1
0 1 0 0
1 0 0 0
NOR Negative-AND 1 1 0 0
DeMorgan’s Theorem

Apply DeMorgan’s theorem to remove the overbar covering both terms

from the
expression X = C + D.

To apply DeMorgan’s theorem to the expression, you can break the

overbar covering both terms and change the sign between the
terms. This results in
=
X = C . D. Deleting the double bar gives X = C . D.
Boolean Analysis of Logic Circuits

Combinational logic circuits can be analyzed by writing the expression for each gate and
combining the expressions according to the rules for Boolean algebra.

Apply Boolean algebra to derive the expression for

X.
Write the expression for each gate:
A (A + B )
B
C (A + B )
C X = C (A + B )+ D
D

Applying DeMorgan’s theorem and the distribution

law: X = C (A B) + D = A B C
+D
SOP and POS forms

 Boolean expressions can be written in the sum-of-products form (SOP) or in the

product-of-sums form (POS). These forms can simplify the implementation of
combinational logic, particularly with PLDs. In both forms, an overbar cannot
extend over more than one variable.
 An expression is in SOP form when two or more product terms are summed as in
the following examples:
ABC+AB ABC+CD CD+E
 An expression is in POS form when two or more sum terms are multiplied as in
the following examples:

(A + B)(A + C) (A + B + C)(B + D) (A + B)C

SOP Standard form

In SOP standard form, every variable in the domain must appear in each term. This form is useful
for constructing truth tables or for implementing logic in PLDs.

You can expand a nonstandard term to standard form by multiplying the term by a
term consisting of the sum of the missing variable and its complement.

Convert X = A B + A B C to standard form.

The first term does not include the variable C.
Therefore, multiply it by the (C + C), which = 1:
X = A B (C + C) + A B C
=ABC+ABC+ABC
POS Standard form

In POS standard form, every variable in the domain must appear in each sum term of the expression.

You can expand a nonstandard POS expression to standard form by adding the product of the
missing variable and its complement and applying rule 12, which states that (A + B)(A + C) = A +
BC.

Convert X = (A + B)(A + B + C) to standard form.

The first sum term does not include the variable C. Therefore, add C C and expand the result by rule
12.
X = (A + B + C C)(A + B + C)
= (A +B + C )(A + B + C)(A + B + C)
Minterms and Maxterms

NOTE:

mi  M i
Minterms and Maxterms

• Using mi to represent minterms.

Sum of minterms expression:

• Using Mi to represent maxterms.

Product of maxterms expression:
Example

• Convert the following function to

(a) Sum of minterms
(b) Product of maxterms

F ( A, B, C )  A( B  C )  B C
Converting SOP form to Truth Table

Steps:
1. List all possible combinations of binary values of the variables in
the expression.
2. Convert the SOP form to its standard form.
3. Place a 1 in the output column for each binary value that make the
standard SOP expression a 1 and place 0 for all the remaining binary
values.
Converting SOP form to Truth Table

X=A(B+CD)

Step1: List the combination of

input variable values.
 Step2: Convert to standard SOP form.

A( B  CD)  AB  ACD
 AB(C  C )( D  D )  A( B  B )CD
 ( ABC  ABC )( D  D )  ABCD  AB CD
 ABCD  ABCD  ABC D  ABC D  ABCD  AB CD
 ABCD  ABCD  ABC D  ABC D  AB CD

1111 1110 1101 1100 1011

 Inputs Output
A B C D A(B+CD)

Step3: Place 1s and 0s in 0

0
0
0
0
0
0
1
0
0

truth table. 0 0 1 0 0

0 0 1 1 0

0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1

1 1 1 1 1
Converting POS form to Truth Table

Steps:
1. List all possible combinations of binary values of the variables in the
expression.
2. Convert the POS form to its standard form.
3. Place a 0 in the output column for each binary value that make the standard
POS expression a 0 and place 1 for all the remaining binary values.
Converting POS form to Truth Table

Determine the truth table for following expression:

000 010 011 101 110

And the Truth Table on the next page…

Converting POS form to Truth Table

Determine the truth table for following

expression:

Input Output
A B C x
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
Converting Truth Table to SOP/POS standard form

Determine the SOP/POS of x:

SOP std. form:
Input Output

A B C x
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
POS std. form:
X  ( A  B  C )( A  B  C )
1 0 0 1
1 0 1 0 ( A  B  C )( A  B  C )
1 1 0 1  M 0  M1  M 2  M 5
1 1 1 1   (0,1, 2,5)
Converting Truth Table to SOP/POS standard form

Determine the SOP/POS of x:

SOP std. form:
Input Output
A B C x
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0 POS std. form:
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
Minterms and Maxterms
Logic Expressions and Truth Table

Determine the Truth Table of X

according to the std. SOP: Input
Output
A B C
ABC  ABC  ABC 0 0 0 0
(1) (2) (3) 0 0 1 1 (2)
0 1 0 1 (3)
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1 (1)
Logic Expressions and Truth Table

Determine the Truth Table of X

according to the std. SOP: Input
Output
A B C
ABC  ABC  ABC  ABC 0 0 0 1 (2)
(1) (2) (3) (4) 0 0 1 0
0 1 0 1 (3)
0 1 1 0
1 0 0 0
1 0 1 1 (1)
1 1 0 0
1 1 1 1 (4)
Logic Expressions and Truth Table

Determine the Truth Table of X

according to the POS: Input
Output
A B C
ABC  AB 0 0 0 1

0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 0
Logic Expressions and Truth Table

Determine the Truth Table of X

according to the std. POS: Input
Output
A B C
0 0 0 0 (1)
0 0 1
(1) (2) 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0 (2)
1 1 0 1
1 1 1 1
Logic Expressions and Truth Table

Determine the std. SOP of X

according to the Truth Table: ABC + ABC + ABC + ABC
Input
Output X
(1) (2) (3) (4)
A B C
0 0 0 1 (1)
0 0 1 0
0 1 0 1 (2)
0 1 1 0
1 0 0 0
1 0 1 1 (3)
1 1 0 0
1 1 1 1 (4)
Logic Expressions and Truth Table

Determine the std. POS of X

according to the Truth Table: (1) A  B  C
Input
Output X
(2) A  B  C
A B C
0 0 0 1 (3) A  B  C
0 0 1 0 (1) (4) A  B  C
0 1 0 1
0 1 1 0 (2)
1 0 0 0 (3)
1 0 1 1
1 1 0 0 (4)
1 1 1 1
Logic Simplification

 Why simplification?
– In software design, simpler logic means less program branches and simpler codes
– In hardware design, simpler logic means less gates, lower cost and less energy consumption

 Ways to simplify logic functions

– With rules in Boolean Algebra
– With Karnaugh map
Logic Simplification

Simplify the logic function below.

AB+A(B+C)+B(B+C)

AB+A(B+C)+B(B+C)
=AB+AB+AC+BB+BC
=AB+AC+B+BC
=B(A+1+C)+AC
=B+AC
Logic Simplification

 AB+A(B+C)+B(B+C)=B+AC
Logic Simplification

Simplify the logic function below.

( AB (C  BD )  AB )C
Minterms and Maxterms
Karnaugh maps

 The Karnaugh map (K-map) is a tool for simplifying combinational

logic with 3 or 4 variables. For 3 variables, 8 cells are required (2 3).

 The map shown is for three variables labeled A, B, and C. Each cell ABC ABC
represents one possible product term.
 Each cell differs from an adjacent cell by only one variable.
ABC ABC

ABC ABC

ABC ABC
Karnaugh maps and the truth table

 For any logic function F(A, B, C), its truth table is:

Input
A B C
Output F Then it has a K-map:
A
0 0 0 F(0,0,0) BC 0 1
0 0 1 F(0,0,1) 00 F (0,0,0) F (1,0,0)
0 1 0 F(0,1,0)
0 1 1 F(0,1,1) 01 F (0,0,1) F (1,0,1)
1 0 0 F(1,0,0)
11 F (0,1,1) F (1,1,1)
1 0 1 F(1,0,1)
1 1 0 F(1,1,0)
10 F (0,1,0) F (1,1,0)
1 1 1 F(1,1,1)
Karnaugh maps and the truth table

 For a logic function F(A, B, C) with truth table:

Input
A B C
Output F Then it has a K-map:
A
0 0 0 1 BC 0 1
0 0 1 1 00 1 0
0 1 0 1
0 1 1 0 01 1 1
1 0 0 0
1 0 1 1 11 0 1
1 1 0 1
10 1 1
1 1 1 1
 Karnaugh maps

 Cells are usually labeled using 0’s and 1’s to represent the variable and its complement.

C The numbers are entered in gray code, to force adjacent cells to be different
AB 0 1 by only one variable.

00
Ones are read as the true variable and zeros are read as the complemented variable.
Gray 01
code
11

10
Karnaugh maps

 Alternatively, cells can be labeled with the variable letters. This makes it simple to read, but it
takes more time preparing the map.

C C C C
Read the terms for the yellow cells. AB
AB ABC ABC
AB

The cells are ABC and ABC. AB ABC

ABC ABC
AB

ABAB ABC ABC

AB ABC ABC
ABC
Karnaugh maps

 K-maps can simplify combinational logic by grouping cells and eliminating variables that
change.

Group the 1’s on the map and read the minimum logic.

CC 00 11
AAB
B
11 1. Group the 1’s into two overlapping
00
00
B changes groups as indicated.
across this 01
01 11 11 2. Read each group by eliminating any
boundary variable that changes across a
11
boundary.
10
10 3. The vertical group is read AC.
C changes
across this 4. The horizontal group is read AB.
boundary X = AC +AB
Karnaugh maps

Simplify the logic function with K-map:

A
BC 0 1

00 1 0
+ +
01 1 1

11 0 1

10 1 1
Karnaugh maps

Simplify the logic function with K-map:

A
BC 0 1

00 1 0
+ +
01 1 1

11 0 1

10 1 1
Karnaugh maps

 A 4-variable map has an adjacent cell on each of its four boundaries as shown.

CD CD CD CD Each cell is different only by one variable from an

AB adjacent cell.
Grouping follows the rules given in the text.
AB
The following slide shows an example of reading a
AB
four variable map using binary numbers for the
AB variables…
Karnaugh maps

Group the 1’s on the map and read the minimum logic.
C changes across
outer boundary
CD
AB
00 01 11 10 1. Group the 1’s into two separate groups as indicated.
00 1 1 2. Read each group by eliminating any variable that
B changes changes across a boundary.
01 1 1

11 1 1
B changes 3. The upper (yellow) group is read as AD.
10 1 1

C changes
4. The lower (green) group is read as AD.
X X = AD +AD
Simplifying functions with don’t care terms

 Don’t Care Terms

– Some input combinations may never appear
– For example, BCD input never produce “1100”

 How to handle Don’t Care Terms

– May be treated as 1, or 0
– Often decisions are tend to result in simpler logic
Simplifying functions with don’t care terms
AB
Input
Output CD 00 01 11 10
A B C D Y

0 0 0 0 0 00 0 0 X 1
0 0 0 1 0
0 0 1 0 0
01 0 0 X 1
0 0 1 1 0
0 1 0 0 0 11 0 1 X X
0 1 0 1 0
0 1 1 0 0 10 0 0 X X
0 1 1 1 1
1 0 0 0 1
Treating the ‘X’s as
1 0 0 1 1 ‘0’s
1 0 1 0 X +
… …
Simplifying functions with don’t care terms

Input AB
Output CD
A B C D Y 00 01 11 10

0 0 0 0 0 00 0 0 X 1
0 0 0 1 0
0 0 1 0 0 01 0 0 X 1
0 0 1 1 0
0 1 0 0 0 11 0 1 X X
0 1 0 1 0
0 1 1 0 0 10 0 0 X X
0 1 1 1 1
1 0 0 0 1 Treating the ‘X’ as
‘1’s
1
1
0
0
0 1 1
1 0 X
+
… …
Hardware Description Languages (HDLs)

 A Hardware Description Language (HDL) is a tool for implementing a logic design in a PLD.
One important language is called VHDL. In VHDL, there are three approaches to describing
logic:

1. Structural Description is like a schematic (components and block diagrams).

2. Dataflow Description is equations, such as Boolean operations, and registers.

Description is specifications over time (state machines, etc.).

3. Behavioral
Hardware Description Languages (HDLs)

 The data flow method for VHDL uses Boolean-type statements. There are two-
parts to a basic data flow program: the entity and the architecture. The entity
portion describes the I/O. The architecture portion describes the logic. The
following example is a VHDL program showing the two parts. The program is
used to detect an invalid BCD code.
entity BCDInv is
port (B,C,D: in bit; X: out bit);
end entity BCDInv
architecture Invalid of BCDInv
begin
X <= (B or C) and D;
end architecture Invalid;
Hardware Description Languages (HDLs)

 Another standard HDL is Verilog. In Verilog, the I/O and the logic is described in one unit
called a module. Verilog uses specific symbols to stand for the Boolean logical operators.

 The following is the same program as in the previous slide, written for Verilog:

module BCDInv (X, B, C, D);

input B, C, D;
output X;
assign X = (B | C)&D;
endmodule