UNIT 3 Cluster 4
UNIT 3 Cluster 4
UNIT 3 Cluster 4
Cluster-4
APPLICATIONS OF OP- AMPS AND 555 TIMER: Peaking
amplifier, Summing, scaling, averaging amplifiers,
Instrumentation amplifier, Integrator and differentiator,
Comparators, Schmitt Trigger, Introduction to 555 timer,
connection diagram, Block diagram, Monostable and
Astable Operations.
The utility of an op-amp can be greatly increased by providing negative
feedback. The output in this case is not driven into saturation and the circuit
behaves in a linear manner.
1. The current drawn by either of the input terminals (Inverting and non-
Inverting) is negligible i.e input currents entering into op-amp are zero.
2. The differential input voltage Vd between non-inverting and Inverting input
terminals is essentially zero.
I1 and I2=0
Vid = 0
V1=V2
Since Inverting input terminal is at virtual ground, the effective input impedence is R1.
R1 should be kept large to avoid loading effect.
The Non – Inverting amplifier
Because node ‘a’ at voltage of Vi
I1 = =
I2 =
But I1 = I2
=
= + =[]
= [] =
= (1 + ) Vi
ACL = = (1 + )
Voltage follower or Buffer
ACL = = (1 + ) = 1
= Vi
The output voltage is equal to input voltage, both in magnitude and phase. In other words the
output voltage follows the input voltage exactly.
A circuit that amplifies the difference between two signal is called a differential amplifier.
This type of amplifier is very useful in instrumentation circuits. Since the differential voltage
at the input terminals of the op-amp is zero, nodes ‘a’ and ‘b’ are at the same potential
designated as . The nodel equation at ‘a’ is
+ =0 ---- 1
+ =0 ----2
Equating eq 1 & 2
+ = +
After simplifying we get
= -
=[ ]
+ + -----1
= -------2
+ + =
= -[ + +
The output is an inverted, weighted sum of the input signals.
When = = =
= -[ + + ] in which case the output is the inverted sum of the input signals
When = = =
Rcomp = =
Non Inverting summing amplifier
The voltage at the ( + ) input terminals be , the voltage at (-) input terminal will
also be .
+ + =0
If = = = =
Then =
Is sum of inputs.
Prob 1:
Design an amplifier with a gain of 10 using one op-amp
Sol:
Given that gain = 10
i.e gain is positive. So we can say amplifier is in non-inverting configuration.
Considering the virtual ground concept
= 0, currents at the terminals is IB+ = 0 and IB- = 0.
Voltage gain = = 1 + =
1 + = 10
= 10-1 = 9
=9
Let = 1kΩ and
= 9 kΩ
Subtractor
=[ ]
When =
=[ ]
(or)
= =- ---- 1
due to only by keeping = 0
= (1+) = (1+1)
= 2* * = ------ 2
= eq 1 + eq 2 -
-
Adder-Subtractor
Apply super position theorem
= = - ----- 1
due to
= = - --------- 2
= = =
= =
= (1+) =( 1+)
= = 3* = ------ 3
due to
= ------- 4
= eq 1+ eq 2+ eq 3+ eq 4
= + -+)
Instrumentation amplifier
For balanced bridge at some reference
condition
= =+ =+
=
=
When bridge is unbalance
= =
= -
If = = R;
Then -
==
= *
Vid = Vp-Vn
There are basically two types of comparators:
1. Non-inverting comparator
2. Inverting comparator
The major application of this comparator is to overcome the noise voltages which reduced
the problem with zero crossing detector circuit
Vo=Output voltage
As long as Vi is less than the Vut the output remains +Vsat .When ever the input voltage
exceeds the Vut the output shifts to –Vsat and remains constant till the input voltage is
greater than Vlt. When Vi become lesser than VLt then the output switches from –
Vsat to +Vsat .And goes on as mentioned above…..
If the peak-to-peak noise voltage is within the hysteresis voltage ,there will be no false
triggering .Depending on the expected noise voltage ,the hysteresis voltage can be designed
by the feedback resistors R1 and R2.
For Vref=0
Therefore a square wave of phase shift is obtained from the sine wave (input signal
).
Applications
Consider a clean signal and with noise signal crossing zero axis a number of times then the
normal zero crossing detector will not deliver the same output even though both signals are
same but of course the noise is included in other signal .But the trigger circuit reject the
interference with zero crossings and takes the crossings of Vut and VLt only .
The 555 timer IC was introduced in the year 1970 by Signetic Corporation and gave the
name SE/NE 555 timer.
It is basically a monolithic timing circuit that produces accurate and highly stable time
delays or oscillation.
When compared to the applications of an op-amp in the same areas, the 555IC is also
equally reliable and is cheap in cost.
Apart from its applications as a monostable multivibrator and astable multivibrator,
a 555 timer can also be used in dc-dc converters, digital logic probes,
waveform generators, analog frequency meters and tachometers,
temperature measurement and control devices, voltage regulators etc.
The timer IC is set up to work in either of the two modes – one-shot or monostable or as
a free-running or astable multivibrator.
The SE 555 can be used for temperature ranges between – 55°C to 125 °. The NE
555 can be used for a temperature range between 0° to 70°C.
Features of 555 Timer IC
There are two types of 555 timer based on its nomenclature – NE 555 Timer and SE
555 Timer. While NE 555 timer can be used in the temperature range from 0 to 70°C,
the SE 555 Timer can be used in the temperature range from -55°C to 125°C and has a
temperature stability of 0.005% per 0C..
It can be operated of different power supplies ranging from 5 Volts to 18 Volts.
It can be used either as a pulse generator or an oscillator by operating it in different
modes.
The name 555 comes from the fact that it contains three 5 Kilo-Ohm resistors in
series to form the voltage divider pattern.
It can drive both Transistor-Transistor Logic (TTL) due to its high output current and
CMOS logic circuits.
It has high output current and adjustable duty cycle.
555 timer can be operated in both astable and monostable modes.
The output of 555 timer can source or absorb current up to 200mA sinking or sourcing
current to the load.
It contains 24 transistors, 2 diodes and 17 resistors.
555 timer is available as an 8-Pin Dual in Line Package (DIP), 8-Pin Metal Can or 14-
Pin Dual in Line Package (DIP).
555 timer functional diagram
A simple 555 timer circuit is shown above in fig which shows the internal construction
of 555 timer. The timer contains two comparators, an RS flip flop, an Output stitch
(output buffer) and a Discharge Transistor Q1.
In addition, there are three 5kΩ resistors are connected in series with 5kΩ resistor which
first end is connected with Vcc (Pin 8 = Supply voltage) and the other end is connected
with ground (GND = Pin 1).
In the above block diagram, heart of the IC lies in the two comparator circuits. While
inverting terminal of the upper comparator is connected to a point with DC potential of
2/3 VCC (where VCC can be +5V to +18V), the non-inverting terminal is connected to
the threshold pin.
The inverting terminal of the lower comparator is connected to the external trigger input
pin whereas the non-inverting terminal is connected to the point with DC potential of 1/3
VCC.
The three 5 Kilo-Ohm resistors are connected in series to form voltage
divider circuit. Output from both the comparators is given to the R-S Flip
Flop whose state depends on the output from the two comparators.
Output from the R-S Flip-Flop is connected to the two transistors – Q 1 and
Q2. Q1 is the discharge transistor and provides discharge path to the external
capacitor, when saturated. Q2 is the reset transistor, where a pulse applied will
reset the whole timing circuit. The output from the flip-flop is amplified by
the power amplifier block.
IC Pin Configuration
555 Timer IC Pin Configuration
The 555 Timer IC is available as an 8-pin metal can, an 8-pin mini DIP (dual-in-package)
or a 14-pin DIP. This IC consists of 23 transistors, 2 diodes and 16 resistors.
The pin numbers used below refers to the 8-pin DIP and 8-pin metal can packages.
Pin 1: Grounded Terminal: All the voltages are measured with respect to the Ground
terminal.
Pin 2: Trigger Terminal: The trigger pin is used to feed the trigger input hen the 555 IC is
set up as a monostable multivibrator. This pin is an inverting input of a comparator and is
responsible for the transition of flip-flop from set to reset. The output of the timer depends
on the amplitude of the external trigger pulse applied to this pin. A negative pulse with a dc
level greater than Vcc/3 is applied to this terminal. In the negative edge, as the trigger
passes through Vcc/3, the output of the lower comparator becomes high and the
complimentary of Q becomes zero. Thus the 555 IC output gets a high voltage, and thus a
quasi stable state.
Pin 3: Output Terminal: Output of the timer is available at this pin. There are two ways in
which a load can be connected to the output terminal. One way is to connect between
output pin (pin 3) and ground pin (pin 1) or between pin 3 and supply pin (pin 8).
Pin 4: Reset Terminal: Whenever the timer IC is to be reset or disabled, a negative pulse is
applied to pin 4, and thus is named as reset terminal. A logic LOW signal at this pin resets
the Timer regardless of its input. The required reset voltage is 0.7 Volts, at current of 0.1mA.
When this pin is not to be used for reset purpose, it should be connected to + V CC to avoid
The amplitude of voltage applied to this terminal is responsible for the set state of flip-
flop. When the voltage applied in this terminal is greater than 2/3Vcc, the upper
comparator switches to +Vsat and the output gets reset.
Pin 7 : Discharge Terminal: This pin is connected internally to the collector of
transistor and mostly a capacitor is connected between this terminal and ground. It is
called discharge terminal because when transistor saturates, capacitor discharges through
the transistor. When the transistor is cut-off, the capacitor charges at a rate determined by
the external resistor and capacitor.
Pin 8: Supply Terminal: Supply voltage is provided at this terminal for timer operation.
This pin is connected to positive rail of the Power supply and is also known as Vcc. The
supply voltage can vary from +5 Volts to +18 Volts
Applications of 555 Timer
555 timer is most important integrated circuit (chip) used widely in digital electronics.
Some common uses and application of 555 timer IC are as follow:
PWM (Pulse Width Modulation) & PPM (Pulse Position Modulation)
Duty Cycle Oscillator
Lamp Dimmer
To provide Accurate time delays
As a flip-flop element
Digital logic probes
Analog frequency meters
Pulse waveform, and square wave generation
Linear ramp generation
Tachometers & temperature measurement
It can be used as monostable multivibrator and astable multivibrator
DC to DC Converters
DC Voltage Regulators
Voltage to Frequency Converter
Frequency Divider
Schmitt trigger
Monostable Multivibrator
The following figure is the schematic of IC 555 as a Monostable Multivibrator. This is the
basic mode of operation of the IC 555.
It requires only two extra components to make it work as a monostable multivibrator: a
resistor and a capacitor.
As the name specifies, a monostable multivibrator has only one stable state.
When a trigger input is applied, a pulse is produced at the output and returns
back to the stable state after a time interval.
The duration of time for which the pulse is high will depend on the timing
circuit that comprises of a resistor (R) and a capacitor (C).
Circuit Connections of Monostable Multivibrator with 555 Timer
The details of the connection are as follows.
The pins 1 and 8 are connected to ground and
supply (VCC) respectively.
We know that the voltage across the capacitor C rises exponentially. Hence the equation for
the capacitor voltage VC can be written as
VC = VCC (1 – e-t/RC)
2/3 = 1 – e-t/RC
e-t/RC = 1/3
– t/RC = ln (1/3)
– t/RC = -1.098
t = 1.098 RC
∴ t ≈ 1.1 RC
Operation of Astable Multivibrator mode of 555 timer IC
The rest of the connections are as follows: pin 8 is connected to supply voltage
(VCC). Pin 3 is the output terminal and hence the output is available at this pin. Pin
4 is the external reset pin. A momentary low on this pin will reset the timer. Hence
when not in use, pin 4 is usually tied to VCC.
The control voltage applied at pin 5 will change the threshold voltage level. But for
normal use, pin 5 is connected to ground via a capacitor (usually 0.01µF), so the
external noise from the terminal is filtered out.
Pin 1 is ground terminal. The timing circuit that determines the width of the output
pulse is made up of R1, R2 and C.
Astable Multivibrator using 555 – Design
The time during which the capacitor C charges from 1/3 VCC to 2/3 VCC is equal to the
time the output is high and is given as tc or THIGH = 0.693 (RA + RB) C, which is proved
below.
Voltage across the capacitor at any instant during charging period is given as,
Vc = VCC(1-et/RC)
t1 = 0.405RC
or t2 = RC loge 3 = 1.0986 RC
The time during which the capacitor discharges from +2/3 V CC to +1/3 VCC is equal to the
time the output is low and is given as
td or TL0W = 0.693 RB C
or td = 0.693 RBC
Overall period of oscillations,
T = THIGH + TLOW = 0.693 (RA+ 2RB) C ,
The frequency of oscillations being the reciprocal of the overall period of oscillations
T is given as
f = 1/T = 1.44/ (RA+ 2RB)C
The duty cycle, the ratio of the time tc during which the output is high to the
total time period T is given as