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Intel 30836

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30 views16 pages

Intel 30836

Uploaded by

banay.marynegeanga
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Intel 30836

By: Elvin A. Augis BSEE-3A


CONTENTS:
 INTRODUCTION
 FEATURES
 ARCHITECTURE
 PIN CONFIGURATION
 APPLICATIONS
INTRODUCTION
 The 386, also known as the Intel 80386 processor, is a
microprocessor introduced by Intel Corporation in 1985. It is
part of the x86 architecture, which is widely used in personal
computers and workstations.
 The 386 processor is a significant advancement in the Intel
processor family, offering improved performance and
capabilities compared to its predecessors.
INTRODUCTION (continue)
 The Intel 80386 processor is a 32-bit microprocessor, meaning it can work with
data and memory addresses that are 32 bits wide. This allows it to handle larger
amounts of data and perform calculations more efficiently compared to older
generation processors. It also introduces a protected mode, which provides
enhanced memory management and multitasking capabilities.

 One of the notable features of the 386 processor is its ability to run older 16-bit
software. It includes a Virtual 8086 Mode that enables it to execute software
written for the Intel 8086 processor, ensuring backward compatibility.
Additionally, the 386 processor incorporates an integrated memory management
unit (MMU) and virtual memory support, enabling efficient memory allocation
and utilization.
FEATURES
 A 32-bit microprocessor
 The chip of 80386 contains 132 pins.
 It has total 129 instructions.
 It has 32 bit data bus 32 bit address bus.
 The execution of the instructions is highly pipelined and
the processor is designed to operate in a multiuser and
multitasking.
FEATURES

 Software written for the 8088,8086,80186 and 80286will


also run on 386.
 The address bus is capable of addressing over 4gigabytes
of physical memory.
 Virtual addressing pushing this over 64 terabytes of
storage.
 • 80387 coprocessor is used.
 Paging, Max clock speed(12.5, 16, 20, 25 and 33 MHz)
FEATURES
80386DX 80386SX
 32 bit address bus  24 bit address bus
 32 bit data bus  16 bit data bus 2
 Packaged in 132 pin grid  100 pin flat pin array(PGA)
ceramic package  16 MB of Memory
 Address 4GB of memory
ARCHITECTURE
 The Internal Architecture of 80386 is divided into 3 sections.
 Central processing unit(CPU)
 Memory management unit(MMU)
 Bus interface unit(BIU)
 Central processing unit is further divided into Execution unit(EU) and
Instruction unit (IU)
 Execution unit has 8 General purpose and 8 Special purpose registers
which are either used for handling data or calculating offset addresses
ARCHITECTURE
PIN CONFIGURATION
PIN CONFIGURATION
PIN CONFIGURATION
PIN CONFIGURATION
PIN CONFIGURATION
PIN CONFIGURATION
APPLICATIONS

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