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Mayordomo Microprocessor

The Intersil 6100 is a single-chip microprocessor that implements the 12-bit PDP-8 instruction set along with peripheral support. It was produced in the mid-1970s and was known as the CMOS-PDP8 or Harris HM-6100. It has features like CMOS technology, 12-bit registers and addressing, and the PDP-8 instruction set. It has specifications like an 8 MHz clock, 12-bit CPU, and low power consumption under 100 mW. It found applications in terminals, medical devices, displays, and embedded systems.

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20 views8 pages

Mayordomo Microprocessor

The Intersil 6100 is a single-chip microprocessor that implements the 12-bit PDP-8 instruction set along with peripheral support. It was produced in the mid-1970s and was known as the CMOS-PDP8 or Harris HM-6100. It has features like CMOS technology, 12-bit registers and addressing, and the PDP-8 instruction set. It has specifications like an 8 MHz clock, 12-bit CPU, and low power consumption under 100 mW. It found applications in terminals, medical devices, displays, and embedded systems.

Uploaded by

banay.marynegeanga
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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INTERSIL 6100

ROEL MAYORDOMO BSEE-3A


Intersil 6100

The Intersil 6100 is a single-chip microprocessor


implementation of the 12-bit PDP-8 instruction set, along with a
range of peripheral support and memory ICs developed by
Intersil in the mid-1970s. It was sometimes referred to as the
CMOS-PDP8. Since it was also produced by Harris
Corporation, it was also known as the Harris HM-6100.

This relatively popular microprocessor family was manufactured


in white, purple and plastic versions by both Intersil and Harris
Semiconductor.
KEY FEATURES

CMOS Technology: Unlike most Registers: The 6100 is a 12-bit


of its contemporaries, the 6100 family CPU that has three primary
was produced using CMOS rather registers: PC (Program Counter),
than the bipolar and NMOS 12-bit AC (Accumulator), and MQ
technologies. This resulted in (Multiplier Quotient).
relatively low power consumption and
could be operated from a single
supply over a wide range of 4 – 11 V.
KEY FEATURES
Memory: Instruction Set:

The 6100 has a 12-bit The 6100 used the same


data/address bus, limiting RAM instruction set as the popular
to only 4 K words, or 6 KB. PDP-8 series of minicomputers,
Memory references are 7-bit, making it suitable for use in
offset either from address 0, or embedded systems that had
from the PC page base previously used discrete logic
address. circuits.
SPECIFICATIONS
 8 MHz clock speed  The data memory
 12-bit CPU that size is 4K words
 operated from a
closely emulates the single supply over
PDP-8. the wide range of 4–
 12-bit address bus 11 V.
 low power
 expanding memory to consumption, less
32K than 100 mW
ARCHITECHTURE
Executes PDP-8/E, Instruction Set
Direct, Indirect, and Autoindexed Memory Addressing
12-Bit Memory Accumulator ADD Instruction
IM6100 5fLsec @ +5 volts/4.0 MHz IM6100A 2.5fLsec
@ +10 volts/8.0 MHz IM6100C 6fLsec @ +5 volts/3.3
MHz
Input-Output Instruction
IM6100 IM6100A IM6100C
8.5fLsec @ +5 volts/4.0 MHz 4.25fLseC @ +10 volts/8
MHz 10.2fLsec @ +5 volts/3.3 MHz
Single-Clock, Single-Instruction Capabilityo
Interrupt
Dedicated Control Panel Features
APPLICATIONS
Intelligent Computer Instrumentation
Terminals Medical Electronics
POS Terminals Displays Traffic
Portable Terminals Control Navigation
Aerospace/Satellite
System
Automotive Systems
Remote Data
Acquisition Systems
Process Control
THANK YOU

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