COMPUTER PROGRAMMING

LABORATORY

Sub Code: 15CPL26

Department of ISE BMS Institute of Technology & Mgmt

 Laboratory Session-1
• Write-up on Functional block diagram of
Computer CPU, Buses
• Mother Board, Chip sets,
• Operating System & types of OS,
• Basics of Networking & Topology and NIC.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
Functional block diagram of Computer

Arithmetic
Input and
logic

Memory

Output Control

I/O Processor

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Information Handled by a Computer

• Instructions/machine instructions
 Commands/statements to transfer information
between I/O devices, Memory
 Specify the arithmetic and logic operations to be
performed
 Source program
• Data
 Used as operands by the instructions
• Encoded in binary code – 0 and 1

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Memory Unit
 Store programs and data
 Two classes of storage
• Primary storage
 Large number of semiconductor storage cells
 Programs must be stored in memory while they are
being executed
 Processed in words
 RAM – Random Access Memory
 Memory hierarchy – Registers, cache, main memory,
Secondary Storages
• Secondary storage – larger and cheaper
• Magnetic or Optical storages
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Arithmetic and Logic Unit (ALU)

 Most computer operations are executed in ALU of

the processor.
 Load the operands into memory – bring them to the
processor – perform operation in ALU – store the
result back to memory or retain in the processor.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Control Unit
 All computer operations are controlled by the control unit.
 The timing signals are generated by the control unit to govern
the I/O transfers
Operations of a computer:
 Accept information in the form of programs and data through
an input unit and store it in the memory
 Fetch the information stored in the memory, under program
control, into an ALU, where the information is processed
 Output the processed information through an output unit
 Control all activities inside the machine through a control unit

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Introduction to CPU

• Central processing unit is a 1 inch silicon chip called

microprocessor
• Contain tens of millions of tiny transistors
• Key components:
– Central processing unit
– Registers
– System clock
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Microprocessor Speeds
• Measure of system clock speed
– Clock Pulses per second
– Usually expressed in gigahertz (GHz)
• Billions of machine cycles per second
• Some old PCs measured in megahertz (MHz)
• CPU cycle time – inverse of clock rate

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
Department of ISE BMS Institute of Technology & Mgmt
 Actions Performed by CPU
Fetch cycle CPU:
• Fetches an instruction from primary storage
• Increments a pointer to location of next instruction
• Separates instruction into components (instruction code
and data inputs)
• Stores each component in a separate register
Execution ALU:
cycle • Retrieves instruction code from a register
• Retrieves data inputs from registers
• Passes data inputs through internal circuits to perform
data transformation
• Stores results in a register

Department of ISE BMS Institute of Technology & Mgmt

 CPU Registers

• Primary roles
– General-purpose registers: Hold data for currently
executing program that is needed frequently ()
– Special-purpose registers: Store information
about currently executing program and about
status of CPU ()

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 General-Purpose Registers

• Hold intermediate results and frequently

needed data items
• Used only by currently executing program
• Implemented within the CPU; contents can be
read or written quickly
• Limited in number -8 or 16 or 32 or 64

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Special-Purpose Registers

• Track processor and program status

• Types
– Instruction register
– Program Counter
– Program status word (PSW)
• Stores results of comparison operation
• Controls conditional branch execution
• Indicates actual or potential error conditions

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Word Size
• Number of bits a CPU can process simultaneously
• Increasing word size usually increases CPU
efficiency
• system bus and memory should also match the
word size

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 The Physical CPU
• Electrical device implemented as silicon-based
microprocessor
• Contains millions of switches, which perform
basic processing functions
• Physical implementation of switches and circuits

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Switches and Gates
• Basic building blocks of computer processing
circuits
• Electronic switches
– Control electrical current flow in a circuit
– Implemented as transistors
• Gates
– An interconnection of switches
– A circuit that can perform a processing function
on an individual binary electrical signal, or bit

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 The CPU in Action

The CPU
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt continued 18
000-209 Intro to CS. 5/Mother
 The CPU Instruction Cycle
• The CPU executes a series of instructions by
looping through an instruction cycle.

The speed of the

instruction cycle
is controlled by
the CPU's clock.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 19
000-209 Intro to CS. 5/Mother
 BUS STRUCTURE
Connecting CPU and memory
The CPU and memory are normally connected by three
groups of connections, each called a bus: data bus, address
bus and control bus

Connecting CPU and memory using three buses

Department of ISE BMS Institute of Technology & Mgmt
 BUS STRUCTURE
•Group of wires which carries information form CPU to
peripherals or vice – versa

•Single bus structure: Common bus used to

communicate between peripherals and microprocessor

INPUT MEMORY PROCESSOR OUTPUT

SINGLE Department
BUS STRUCTURE
of ISE BMS Institute of Technology & Mgmt
 BUS STRUCTURE…..
• Toimprove performance multi bus structure can
be used

•In two – bus structure : One bus can be used to

fetch instruction other can be used to fetch data,
required for execution.

•Thus improving the performance ,but cost

increases
Department of ISE BMS Institute of Technology & Mgmt
 BUS STRUCTURE…..

•Data bus: bidirectional : group of wires which carries data

information bit form processor to peripherals and vice – versa

•Control bus: bidirectional: group of wires which carries control

signals form processor to peripherals and vice – versa

•Figure below shows address, data and control bus and their
connection with peripheral and microprocessor

Department of ISE BMS Institute of Technology & Mgmt

Department of ISE BMS Institute of Technology & Mgmt
PERFORMANCE

•Time taken by the system to execute a program

•Parameters which influence the performance are

• Clock speed
• Type and number of instructions in Program
• Average time required to execute an instruction
• Memory access time
• Number of I/O devices and types of I/O devices
connected
• The data transfer capacity of the bus

Department of ISE BMS Institute of Technology & Mgmt

 MEMORY LOCATIONS AND ADDRESSES
•Main memory It consists of a collection of storage
locations, each with a unique address.

•Data is transferred to and from memory in groups of

bits called words. A word can be a group of 8 bits, 16
bits, 32 bits or 64 bits.

•If the word is 8 bits, it is referred to as a byte. The term

“byte” is so common in computer science that
sometimes a 16-bit word is referred to as a 2-byte word,
or a 32-bit word is referred to as a 4-byte word.

Department of ISE BMS Institute of Technology & Mgmt

 Main memoryBMS Institute of Technology & Mgmt
Department of ISE
 Address space

•To access a word in memory at the hardware level requires

an address.
•Although programmers use a name to identify a word (or a
collection of words),

•The total number of uniquely identifiable locations in

memory is called the address space.

Department of ISE BMS Institute of Technology & Mgmt

i
Memory addresses are defined using unsigned
binary integers.
Department of ISE BMS Institute of Technology & Mgmt
 Inside a PC
CD-ROM
Power drive
supply
Hard disk
drive
Mother
board Floppy
disk drive

Sound/network
cards
Wires and
ribbon cables

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 30
000-209 Intro to CS. 5/Mother
 The Motherboard
• The most important part of a PC is the
motherboard. It holds:
– the processor chip
– memory chips
– chips that handle input/output (I/O)
– the expansion slots for connecting
peripherals
• Some chips are soldered onto the
motherboard(permanent), and some are
removable (so they can be upgraded).
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 31
000-209 Intro to CS. 5/Mother
 Motherboard Picture

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 32
000-209 Intro to CS. 5/Mother
 Expansion Slot Types
• There are several different types of expansion
slot:
– ISA: older technology, for modems and slow
devices
– PCI: for graphics, sound, video, modem or network
cards
– AGP: for graphics cards

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 33
000-209 Intro to CS. 5/Mother
Connector Cables

Department of000-209
ISE Intro
BMS toInstitute
CS. 5/Mother
of Technology & Mgmt continued 34
Department of000-209
ISE Intro
BMS toInstitute
CS. 5/Mother
of Technology & Mgmt 35
 RAM

• Random Access Memory (RAM).

• RAM is used to hold programs while they are
being executed, and data while it is being
processed.
• RAM is volatile, meaning that information written
to RAM will disappear when the computer is
turned off.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt continued 36
000-209 Intro to CS. 5/Mother
• RAM contents can be accessed
in any (i.e. random) order i.e any word can
be accessed in same access time

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 37
000-209 Intro to CS. 5/Mother
 RAM Storage

Each RAM location

has an address and
holds one byte of
data (eight bits).
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 38
000-209 Intro to CS. 5/Mother
 How much RAM is Enough?
• Computers typically have between 1and 8 Gb
(Giga bytes) of RAM.
• RAM access speeds can be as fast as 8
nanoseconds (8 billionth of a second).

• The right amount of RAM depends on the

software you are using.
• You can install extra RAM.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 39
000-209 Intro to CS. 5/Mother
 Virtual Memory
• Virtual memory uses part of the hard disk to
simulate more memory (RAM) than actually
exists.
• It allows a computer to run more programs at
the same time.
• Virtual memory is
slower than RAM.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 40
000-209 Intro to CS. 5/Mother
 ROM

• Read-Only Memory can

be read but not changed.
• It is non-volatile storage: it remembers its
contents even when the power is turned off.

• ROM chips are used to store the instructions a

computer needs during start-up, called firmware.
• Some kinds of ROM are PROM, EPROM, EEPROM,
and CD-ROM.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 41
 CMOS Memory

• A computer needs a semi-permanent the battery

way of keeping some start-up data
– e.g. the current time, the no. of hard disks
– the data may need to be updated/changed

• CMOS memory requires (very little) power to

retain its contents.
– supplied by a battery on the motherboard

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 42
 Booting a Computer
• Booting is the sequence of computer
operations from power-up until the system is
ready for use
– this includes hardware testing, and loading the OS
– POST

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 43
000-209 Intro to CS. 5/Mother
 Other Booting Tasks

• The computer checks the CMOS memory.

• The computer loads configuration settings

from Config.sys or the Windows Registry.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 44
000-209 Intro to CS. 5/Mother
 Semiconductor Memory Types
Memory Type Category Erasure Write Mechanism Volatility

Random-access
Read-write memory Electrically, byte-level Electrically Volatile
memory (RAM)

Read-only
Masks
memory (ROM)
Read-only memory Not possible

Programmable
ROM (PROM)

Erasable PROM
UV light, chip-level
(EPROM) Nonvolatile

Electrically

Electrically Erasable Read-mostly memory

Electrically, byte-level
PROM (EEPROM)

Flash memory Electrically, block-level

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Semiconductor Memory
• RAM
– semiconductor memory is random access
– Read/Write
– Volatile
– Temporary storage
– Static or dynamic

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
Memory Cell Operation

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
Static RAM Structure

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Static RAM
• Bits stored as on/off switches
• No charges to leak
• No refreshing needed when powered
• More complex construction
• Larger Size
• More expensive
• Does not need refresh circuits
• Faster
• Cache
• Digital
– Uses flip-flops
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Static RAM Operation
• Transistor arrangement gives stable logic state
• State 1
– C1 high, C2 low
– T1 T4 off, T2 T3 on
• State 0
– C2 high, C1 low
– T2 T3 off, T1 T4 on
• Address line transistors T5 T6 is switch
• Write – apply value to B & compliment to B
• Read – value is on line B
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
Dynamic RAM Structure

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Dynamic RAM
• Bits stored as charge in capacitors
• Charges leak
• Need refreshing even when powered
• Simpler construction
• Smaller per bit
• Less expensive
• Need refresh circuits
• Slower
• Main memory
• Essentially analogue
– Level of charge determines value
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Refreshing
• Refresh circuit included on chip
• Disable chip
• Count through rows
• Read & Write back
• Takes time
• Slows down apparent performance

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 DRAM Operation
• Address line active when bit read or written
– Transistor switch closed (current flows)
• Write
– Voltage to bit line
• High for 1 low for 0
– Then signal address line
• Transfers charge to capacitor
• Read
– Address line selected
• transistor turns on
– Charge from capacitor fed via bit line to sense amplifier
• Compares with reference value to determine 0 or 1
– Capacitor charge must be restored
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 SRAM v DRAM
• Both volatile
– Power needed to preserve data
• Dynamic cell
– Simpler to build, smaller
– More dense
– Less expensive
– Needs refresh
– Larger memory units
• Static
– Faster
– Cache
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Hard Disk Drive (HDD) Components
• Electromechanical
– Rotating disks
– Arm assembly
• Electronics
– Disk controller
– Cache
– Interface controller

Department of ISE BMS Institute of Technology & Mgmt

 HDD Organization
Arm
Assembly Spindle Cylinder
Arm Head

Platter
Track

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 HDD Organization
• Typical configurations seen in disks today
– Platter diameters: 3.7”, 3.3”, 2.6”
– RPMs: 5400, 7200, 10000, 15000
• 0.5-1% variation in the RPM during operation
– Number of platters: 1-5
– Mobile disks can be as small as 0.75”
• Power proportional to: (# Platters)*(RPM)2.8(Diameter)4.6
– Tradeoff in the drive-design
• Read/write head
– Reading – Faraday’s Law
– Writing – Magnetic Induction
• Data-channel
– Encoding/decoding of data to/from magnetic phase changes

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Disk Medium Materials
• Aluminum with a deposit of magnetic material
• Some disks also use glass platters
– Eg. Newer IBM/Hitachi products
– Better surface uniformity and stiffness but harder to
deposit magnetic material
• Anti-Ferromagnetically Coupled media
– Uses two magnetic layers of opposite polarity to reinforce
the orientation.
– Can provide higher densities but at higher manufacturing
complexity

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 A Magnetic ‘Bit’
• Bit-cell composed of
magnetic grains
– 50-100 grains/bit
• ‘0’
– Region of grains of
uniform magnetic
polarity
• ‘1’
– Boundary between
regions of opposite
magnetization

Department of ISE BMS Institute of Technology & Mgmt

Source: http://www.hitachigst.com/hdd/research/storage/pm/index.html
 Storage Density
• Determines both BPI
capacity and
performance
• Density Metrics TPI
– Linear density (Bits/inch
or BPI)
– Track density
(Tracks/inch or TPI)
– Areal Density = BPIxTPI

Department of ISE BMS Institute of Technology & Mgmt

 For Reading Perpendicular Recording:

Soft underlayer (mirrors) write field

Longitudinal Recording: and allows domains to be closer.

Magnetic domains oriented in the

direction in which head travels

For Writing
Department of ISE BMS Institute of Technology & Mgmt
 New Recording Technologies
• Longitudinal Recording now expected to
extend above 100 Gb/sq-in.

• Perpendicular Recording expected to extend

to 1 Tb/sq-in

• Beyond that:
– Heat-assisted recording (HAMR)

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Tracks and Sectors
• Bits are grouped into sectors
• Typical sector-size = 512 B of data
• Sector also has overhead information
– Error Correcting Codes (ECC)
– Servo fields to properly position the head

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Optical Media
• CD – Compact Disk
• DVD
• Digital Versatile Disk
• Digital Video Disk
• Both are organized as a single spiral track
• CD – 6 kilometers
• DVD – 12.5 kilometers

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
CD Areas

Manufacturer Code

Batch Number

Spindle Hole

Clamping Ring

Stacking Ring

Data Area

Department of ISE BMS Institute of Technology & Mgmt

 Sizes
• CDs
• 5.25 “ – 120 mm
• 3.15” – 80 mm
• Business Card
• DVDs
• 5.25” - 120 mm
• Could be different
• None so far

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 CD Construction

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 CD-R Dyes

Department of ISE BMS Institute of Technology & Mgmt

 CD & DVD Types
• CD
• CD-Rom
• CD-R
• CD-RW
• DVD
• DVD-Rom
• DVD-R
• DVD+R

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Optical Storage
• CDs
• CD – R - 700 Mbytes
• CD –RW – 570 Mbytes
• DVDs
• Single layer – 4.3 Gbytes
• Two layer – 8.6 Gbytes
• Two sided - ?

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 CD Organization
• Lead in
• Container for the TOC for a CD session
• 1st has 7,500 sectors (14.65 Mbytes) for lead in
• Subsequent sessions 4,500 sectors (9 Mbytes) for lead
in
• Multi-session has pointer to next writable location
• Next pointer is either 0 or 24 binary 1s to finalize the
disc

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 CD Organization
• Lead out
• Indicates end of session
• Audio discs stop playing
• 1st session lead out is 6,750 sectors ( 13.5 Mbytes)
• 2nd and on 2,250 sectors (4 Mbytes

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 CD Organization
• Sector
• 2,048 bytes for data discs
• 2,352 bytes for audio discs
• Track
• A single (logical) collection of data on the disc
• Up to 99 tracks on a CD
• Error Detection - Error Correction Codes
• Uses Reed – Solomon EDC-ECC

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 DVD Organization
• Border Zone / RZone
• Contains the real content of the disc
• Similar to a CD track
• Manufactured DVDs have only 1 border zone
• Recordable DVDs can have multiple border zones
• DVD does not have specific TOC
• A border zone may have the information so that the
app can make a TOC

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 DVD Frame

Bytes 4 2 6 2048 4
| ID | ID ECC | copyright Management info | User data | EDC |

A 32 Kbyte ECC block

Consists of 12 frames together with ECC for the user data
Cannot access with consumer DVD Drives

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Media at 30,000x

CD DVD

Department of ISE BMS Institute of Technology & Mgmt

 Interfaces
• ATAPI or SATA
• SCSI
• USB
• 1394

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Logical Structure
• Track-at-once
• CD – data discs
• Disc-at-once
• Audio discs
• DVDs
• Packet writing
• Used with drag & Drop writing software
– Dangerous for forensic workstations
• Non-video DVDs

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 What is Flash Memory?

• Flash memory is a form of computer memory

that is programmed and erased electrically.
• It is a type of electrically erasable
programmable read-only memory (EEPROM)
chip.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 How Flash Memory Works
• There are two transistors which are separated
by a thin oxide layer. The two transistors are
known as the floating gate and the control
gate. The only way that the floating gate can
get to the word line is by passing through the
control gate. During this the cell has a value of
1. To change the value to a 0, it needs to go
through a process called Fowler-Nordheim
tunneling.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
How Flash Memory Works, Continued

• To change the placement of electrons in the

floating gate it uses tunneling. There is an
electrical charge that comes from the bit line
and is applied to the floating gate. The excited
electrons are pushed, go through, and are
trapped. They are trapped on the other side
of the thin oxide layer, which gives it a
negative charge.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
How Flash Memory Works, Continued

• The electrons, that now have a negative

charge, are between the control and floating
gates, acting as a barrier. A cell sensor
monitors how much charge is passing through
the floating gate. When the flow through the
gate is above the half way point, it has a value
of one and when it goes below the 50% spot,
it becomes a 0.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
How Flash Memory Works, Continued
• If there is a blank EEPROM, the gates are fully
open, which gives each of the cells a value of
one. For the electrons to return to a normal 1,
by using an electric field, or a higher voltage
charge. The in-circuit wiring applies the
electric field to the chip or a certain part
section, known as a block. Instead of erasing
one byte at a time, like most EEPROMs do,
flash memory erases a block or the whole
chip, and then can be rewritten. This makes it
so flash memory is faster.
Department
http://www.howstuffworks.com/flash-memory.htm
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 History Of Flash Memory
• Dr. Fujio Masuoka invented flash memory
while working for Toshiba in 1984.
• One of his colleagues came up with the name
Flash because it reminded him of a flash of
camera.
• Flash memory was presented at an invention,
which was the Integrated Electronics Devices
Meeting, in 1984 by Dr. Masuoka.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 History Of Flash Memory, Continued
• Intel saw how good this invention could
become and created the first commercial NOR
type flash chip in 1988.
• Then in 1989, Samsung and Toshiba created a
NAND flash memory.
• In 1994, Compact Flash was invented and
introduced by SanDisk.
• In 1999, the SD memory card was released by
a combination of SanDisk, Toshiba and
Matsushita.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 History of Flash Memory, Continued
• In 2001, the world’s first 1 Gigabit Compact
Flash card was introduced.
• In 2003, the next-generation 2 Gigabit NAND
flash drive was introduced by Toshiba and
SanDisk
• Also in 2003, the miniSD card was introduced.
• In 2005, SanDisk announces microSD, which is
the smallest memory card in the world.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
History Of Flash Memory, Continued

• In 2009, Toshiba said that the SDXC flash

memory cards were going to come out this
year.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Different Types of Flash Memory

• There are two main types of Flash Memory:

NOR and NAND.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 NOR Memory
• NOR flash is the faster memory, but when
having to erase and write data, it takes longer.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 NAND Memory
• The storage capacity of NAND is a lot more
than that of NOR, but the random access is
slow for it.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Types of Flash Memory
• SD Cards
• Compact Flash
Cards
• USB Drives
• Memory Sticks
• SmartMedia Cards

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
Major Manufactures of Flash Memory
• SanDisk
• Qmemory
• Kingston
• Transcend
• Sony
• Samsung
• Kingston
• Intel
• Toshiba
• Lexar
• Kingmax
• Fujifilm
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Flash Memory Information
• For you to get data, flash memory doesn’t
need a constant power supply.
• The lifespan can very from 100,000 to
100,000,000 write cycles.
• They have very fast access times, don’t use
much power, and has an immunity to severe
shock or vibration.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Keyboard

• A keyboard is the most common input device. Several kinds of

keyboards are available, but they
• resemble each other with
• minor variations. The
• keyboard in most common
• use is the QWERTY board.
• Generally standard
• keyboard has 104 keys. In
• these keyboards, the cursor
• control keys are duplicated
• to allow easier use of the
• numeric pad.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Mouse

• A mouse is an electro-mechanical, hand-held device (as shown

• It is used as a pointer. It can perform functions
• like selecting menu commands, moving icons, resizing
windows,
• starting programs, and choosing options.
• The most common mouse uses an internal, magnetically coated
• ball, to detect the movement of the mouse across a flat
surface,
• usually a desktop. Now a days Optical or laser mouse is used to
• detect the movement.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Printer
• Printer
• After a document is created on the computer, it can be sent to a
• printer for a hard copy (printout). Some printers offer special
• features such as colored and large page formats. Some of the
• most commonly used printers are:
• 1. Laser Printer
• 2. Ink Jet Printer
• 3. Dot Matrix Printer
• 4. Line Printer
• Laser Printer: A laser printer produces
• high quality print that one normally finds
• in publishing. It is extremely fast and
• quiet. Moreover, the operation of a laser
• printer is easy with automatic paper
• loading and no smudging or messing up
• of ink ribbons. The fastest laser printer
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
• can print up to 200 pages per minute in monochrome (black and
• white) and up to 100 pages per minute in colour.
• Ink-Jet Printer: An ink-jet printer
• creates an image directly on paper by
• spraying ink through as many as 64
• tiny nozzles. Although the image it
• produces is not generally quite as
• sharp as the output of a laser printer,
• the quality of ink-jet images is still high.
• In general, ink-jet printer offers an
• excellent middle ground between dot
• matrix and laser printer. Like laser printer, an ink-jet printer is
• quiet and convenient, but not particularly fast.
• Typically, an ink-jet printer is more expensive than a dot-matrix
• printer, but costs only half as much as a laser printer.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
• Dot Matrix Printer: The dot matrix
• printer was very popular at one point of
• time. It is a very versatile and inexpensive
• output device. In dot matrix printer the
• print head physically "hits" the paper
• through the ribbon and produces text (or
• images) by combinations of dots; hence
• the name dot matrix printer. Its speed is
• measured in characters per second
• (CPS). Although it is less expensive, it is
• louder, slower and produces lower print
• quality.
• Line Printer: A line printer is generally
• used with large computer systems to
• produce text based data processing
• reports. Line printers are high-speed
• printers with speeds ranging anywhere
• from 100 to about 3800 lines per minute.
• In the past, print quality on line printers
• was not high. Developments in
• technology are improving the print quality
• on line printers. These are in the cost
• range of lacs of Rupees.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
• Plotter
• A plotter is a special kind of output device that, like a printer,
• produces images on paper, but does so in a different way. Plotters
• are designed to produce large drawings or images, such as
• construction plans for buildings or blueprints for mechanical
• objects. A plotter can be connected to the port normally used by
• a printer.
• An array of different colored pens in a clip rack and a robotic arm
• is part of plotter. The instructions that a plotter receives from a
• computer consist of a color, and beginning and ending
• coordinates for a line. With that information, the plotter picks up
• the appropriate pen through its arm, positions it at the beginning
• coordinates drops the pen down to the surface of the paper and
• draws to the ending coordinates. Plotters draw curves by creating
• a sequence of very short straight lines.
• Plotters usually come in two designs:
• 1. Flat Bed: Plotters of small size to be kept on table with
• restriction of paper size.
• 2. Drum: These plotters are of big size using rolls of paper of
• unlimited length.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Networking
• Computer network A collection of computing
devices that are connected in various ways in
order to communicate and share resources
Usually, the connections between computers
in a network are made using physical wires or
cables
However, some connections are wireless, using
radio waves or infrared signals

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-101
 Networking
• The generic term node or host refers to any
device on a network
• Data transfer rate The speed with which data
is moved from one place on a network to
another
• Data transfer rate is a key issue in computer
networks

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-102
 Networking
• Computer networks have opened up an entire
frontier in the world of computing called the
client/server model

Figure 15.1 Client/Server

Department
DepartmentofofISE
ISE interaction
BMS Institute of Technology & Mgmt 15-103
 Networking
• File server A computer that stores and
manages files for multiple users on a network
• Web server A computer dedicated to
responding to requests (from the browser
client) for web pages

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-104
 Types of Networks
• Local-area network (LAN) A network that
connects a relatively small number of
machines in a relatively close geographical
area

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-105
 Types of Networks
• Various configurations, called topologies, have been
used to administer LANs
– Ring topology A configuration that connects all nodes in a
closed loop on which messages travel in one direction
– Star topology A configuration that centers around one
node to which all others are connected and through which
all messages are sent
– Bus topology All nodes are connected to a single
communication line that carries messages in both
directions

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-106
 Types of Networks

Figure 15.2 Various network topologies

• A bus technology called Ethernet has become the industry

standard for local-area networks
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-10
 Types of Networks
• Wide-area network (WAN) A network that
connects two or more local-area networks over a
potentially large geographic distance
Often one particular node on a LAN is set up to serve as a
gateway to handle all communication going between that
LAN and other networks
Communication between networks is called
internetworking
The Internet, as we know it today, is essentially the
ultimate wide-area network, spanning the entire globe

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-108
 Types of Networks

• Metropolitan-area network (MAN) The

communication infrastructures that have been
developed in and around large cities

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-109
 So, who owns the Internet?
Well, nobody does. No single person or
company owns the Internet or even controls it
entirely. As a wide-area network, it is made up
of many smaller networks. These smaller
networks are often owned and managed by a
person or organization. The Internet, then, is
really defined by how connections can be
made between these networks.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-110
 Types of Networks

Figure 15.1 Local-area networks connected across a distance to

create a wide-area network
Department of ISE BMS Institute of Technology & Mgmt 15-111
 Internet Connections
• Internet backbone A set of high-speed
networks that carry Internet traffic
These networks are provided by companies
such as AT&T, GTE, and IBM
• Internet service provider (ISP) A company
that provides other companies or individuals
with access to the Internet

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-112
 Internet Connections
• There are various technologies available that you can use to
connect a home computer to the Internet
– A phone modem converts computer data into an analog audio
signal for transfer over a telephone line, and then a modem at the
destination converts it back again into data
– A digital subscriber line (DSL) uses regular copper phone lines to
transfer digital data to and from the phone company’s central
office
– A cable modem uses the same line that your cable TV signals come
in on to transfer the data back and forth

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-113
 Internet Connections
• Broadband A connection in which transfer speeds
are faster than 128 bits per second
– DSL connections and cable modems are broadband
connections
– The speed for downloads (getting data from the Internet
to your home computer) may not be the same as uploads
(sending data from your home computer to the Internet)

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt 15-114
 RJ45 LC BNC

Wired netcard Fiber optic Coaxial

Dongles

Department of ISE BMS Institute of Technology & Mgmt

In 1973 Robert Metcalfe needed something that was fast, could connect hundreds
of computers, and span a whole building. To solve this problem, Metcalfe developed
a rudimentary form of LAN and dubbed it Ethernet. The original Ethernet sent
roughly a paragraph of data over thick coaxial cable and could handle a distance of
one kilometer.

Department of ISE BMS Institute of Technology & Mgmt

In 1975 Xerox filed a patent listing Metcalf, David Boggs, Chuck Thacker and Butler
Lampson as inventors. In 1976 Metcalf wrote a seminal paper that stated the
transfer rate was 3 Mbits/second. Metcalf left Xerox in 79 to start the company
3com.

Department of ISE BMS Institute of Technology & Mgmt

In 1981, 3COM built the first 10 Mbits/sec Ethernet adapter.

In mid 1980s, Tim Rock, Richard Bennett, Pat Thaler, and others develop
StarLAN, the basis for 1BASE5 ethernet

In late 1980s the twisted pair design started to

replace the coaxial cables.

Department of ISE BMS Institute of Technology & Mgmt

 How the NIC transfers data
• The app you are using generates the data you
would like to send to another computer.
• Your NIC accepts the data from your motherboard
and transfers it to a small buffer on the card.
• The NIC adds its address (set by the manufacturer)
plus the destination address and the type of data
to the buffer.
• Your NIC calculates the checksum, or CRC, for the
data in the buffer.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 How the NIC transfers data
• The information is arranged into a frame.
• The NIC “listens” to the network for other transmissions. If a
transmission is heard, it will wait until the transmission is
complete.
• The NIC begins to serially transmit the frame over the
network.
• The receiving NIC calculates the checksum for the received
frame, then compares it to the checksum it received.
• If there are no errors, the receiving station acknowledges the
received data.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 Translated into 5 steps
• The network application retrieves the data being
sent.
• The NIC puts the address of the other computer onto
the data.
• The NIC calculates for errors.
• The data is arranged into a packet and sent over the
network.
• The receiving card checks for errors, if there are
none, it acknowledges the data.

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
The Network interface cards use differing amounts of voltage to transport
the 1s and 0s of binary across the cable.

For fiber optic cable, different wavelengths of light are passed along.

Department of ISE BMS Institute of Technology & Mgmt

Application This layer supports application and end-user processes.
(Layer 7)

Presentation
This layer translates the data so it can be sent along the network. It is
(Layer 6)
sometimes called the syntax layer.
Session This layer establishes, manages and terminates connections between
(Layer 5) applications. The session layer sets up, coordinates, and terminates connections
at each end. It deals with session and connection coordination.

Transport This layer provides transparent transfer of data between end systems, or hosts,
(Layer 4) and is responsible for end-to-end error recovery and flow control. It ensures
complete data transfer.
This layer provides routing technologies, creating paths, known as virtual circuits,
Network for transmitting data from computer to computer. Routing and forwarding are
(Layer 3) functions of this layer, as well as addressing, internetworking, error handling,
congestion control and packet sequencing.
At this layer, data packets are encoded and decoded into bits. The data link layer
Data Link is divided into two sub layers: The Media Access Control (MAC) layer and the
Logical Link Control (LLC) layer. The MAC layer controls how a computer on the
(Layer 2)
network gains access to the data and permission to transmit it. The LLC layer
controls frame synchronization, flow control and error checking.

Physical This layer conveys the bit stream - electrical impulse, light or radio signal -- through the
network at the electrical and mechanical level. It provides the hardware means of sending
(Layer 1)
and receiving data on a carrier,
Department of ISE
including defining cables, cards and physical aspects. Fast
BMS Institute of Technology & Mgmt
Ethernet, RS232, and ATM are protocols with physical layer components.
Department of ISE BMS Institute of Technology & Mgmt
 Token Ring Process
• Phase 0 (Lobe Check) —The station checks to ensure it can receive these frames without
error.
• Phase 1 (Physical Insertion) — A station then sends a 5 volt signal to the MSAU to open the
relay.
• Phase 2 (Address Verification) — A station then transmits MAC frames with its own MAC
address in the destination address field of a token ring frame. When the frame returns and if
the address copied , the station must participate in the periodic (every 7 seconds) ring poll
process. This is where stations identify themselves on the network as part of the MAC
management functions.
• Phase 3 (Participation in ring poll) — A station learns the address of its Nearest Active
Upstream Neighbor (NAUN) and makes its address known to its nearest downstream
neighbor, leading to the creation of the ring map. Station waits until it receives an AMP or
SMP frame with the ARI and FCI bits set to 0. When it does, the station flips both bits (ARI
and FCI) to 1, if enough resources are available, and queues an SMP frame for transmission. If
no such frames are received within 18 seconds, then the station reports a failure to open and
de-inserts from the ring. If the station successfully participates in a ring poll, it proceeds into
the final phase of insertion, request initialization.
• Phase 4 (Request Initialization) — Finally a station sends out a special request to a parameter
server to obtain configuration information. This frame is sent to a special functional address,
typically a token ring bridge, which may hold timer and ring number information with which
to tell the new station abort

Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt
 How the procedure works.
Simpler than a token ring, the procedure for coaxial is as following:

• Main procedure, it states and asks

• Asks: is the frame ready for transmission.
• Is medium idle? If not, wait until it becomes ready and wait the interframe
period
• Starts transmitting.
• Asks: did a collision occur? If so, it goes to collision detected procedure.
• Resets retransmission counters and end frame transmission.
• If a collision is detected it:
• Continues the transmission until minimum packet time is reached to ensure
that all receivers detect the collision.
• Counts how many times it retransmitted
• Asks: was the maximum number of transmission attempts reached? If so,
abort transmission.
• Calculates and wait random back off period based on number of collision
• Re-enters main procedure at stage 1.
Department
DepartmentofofISE
ISE BMS Institute of Technology & Mgmt