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Chapter 7 Code Converter

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0% found this document useful (0 votes)
34 views21 pages

Chapter 7 Code Converter

Uploaded by

2021617046
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Encoders

Decoders
• Code Converter
• Encoder
• Priority Encoder
• Priority Encoder IC
• Decoder
• Decoder IC
• Decoder Application
• Display Decoder

10/9/2012 RA/Sept2012-Jan2013 2
• At the end of this chapter, students should be able
to:-
– Differentiate between encoder and decoder.
– Apply a decimal-to-BCD priority encoder in a simple
keyboard application.
– Identify a decoder application.
– Use BCD-to-7-segment decoders in display systems.

10/9/2012 RA/Sept2013-Jan2014 3
• Code conversion is a process to convert from one code
to another (eg. decimal-to-BCD, binary-to-seven-
segment display).
• For example, code conversion take place each time a
key is pressed on a computer keyboard, telephone and
microwave oven keypad or any other similar devices
where input values are entered into a system for
processing.
• It is done by a code converter circuit such as encoder
and decoder.

10/9/2012 RA/Sept2012-Jan2013 4
Example Consider the block diagram of a Simple Calculator
Translate the
binary code to a
Translate 7-segment
decimal number display
to BCD code
789
456
Encoder Processor Decoder
123
0

Keypad 7-segment
CPU performs display
operation in
binary

10/9/2012 RA/Sept2012-Jan2013 5
• Encoder is a digital circuit that converts information
to a coded form.
• Examples:

10/9/2012 RA/Sept2012-Jan2013 6
• The function of this encoder is to translate a decimal input to
a BCD number.
• It converts only one input at a time into a BCD code.

Logic Symbol

0
1
2
MSB
3 A
Decimal 4 B BCD output
input 5 C
6 D LSB
7
8
9

10/9/2012 RA/Sept2012-Jan2013 7
Example

Design a 10:4 encoder, where only one input is active at one


time.
Truth Table Input Output Boolean Expression
0 1 2 3 4 5 6 7 8 9 A B C D
1 0 0 0 0 0 0 0 0 0 0 0 0 0
A 89
0 1 0 0 0 0 0 0 0 0 0 0 0 1 B  4567
0 0 1 0 0 0 0 0 0 0 0 0 1 0 C  2  3 6  7
0 0 0 1 0 0 0 0 0 0 0 0 1 1 D  1 3  5  7  9
0 0 0 0 1 0 0 0 0 0 0 1 0 0
0 0 0 0 0 1 0 0 0 0 0 1 0 1
0 0 0 0 0 0 1 0 0 0 0 1 1 0
0 0 0 0 0 0 0 1 0 0 0 1 1 1
0 0 0 0 0 0 0 0 1 0 1 0 0 0
0 0 0 0 0 0 0 0 0 1 1 0 0 1
10/9/2012 RA/Sept2012-Jan2013 8
Logic Circuit

1 2 3 4 5 6 7 8 9

A 89
B B  4567
C  2  3 6  7
D  1 3  5  7  9
C

10/9/2012 RA/Sept2012-Jan2013 9
• Also known as 1o:4 priority encoder.
• It will produce a BCD output corressponding to the highest-
order decimal digit input that is active and will ignore any
other lower-order active inputs.
• For example, when both 3 and 6 inputs are activated, the BCD
output is 0110 (which represents decimal 6).

Logic Symbol 74147


I9
I8
I7 A3
I6 A2
I5 A1
I4 A0
I3
I2
I1

10/9/2012 RA/Sept2012-Jan2013 10
Truth Table

Input Output
0 1 2 3 4 5 6 7 8 9 A B C D
X 0 0 0 0 0 0 0 0 0 0 0 0 0
X 1 0 0 0 0 0 0 0 0 0 0 0 1
X X 1 0 0 0 0 0 0 0 0 0 1 0
X X X 1 0 0 0 0 0 0 0 0 1 1
X X X X 1 0 0 0 0 0 0 1 0 0
X X X X X 1 0 0 0 0 0 1 0 1
X X X X X X 1 0 0 0 0 1 1 0
X X X X X X X 1 0 0 0 1 1 1
X X X X X X X X 1 0 1 0 0 0
X X X X X X X X X 1 1 0 0 1

10/9/2012 RA/Sept2012-Jan2013 11
Boolean Expression

A  8.9  9
B  4.5.6.7.8.9  5.6.7.8.9  6.7.8.9  7.8.9
C  2.3.4.5.6.7.8.9  3.4.5.6.7.8.9  6.7.8.9  7.8.9
D  1.2.3.4.5.6.7.8.9  3.4.5.6.7.8.9  5.6.7.8.9  7.8.9  9
Simplified Boolean Expression

A 89
B  4.8.9  5.8.9  6.8.9  7.8.9
C  2.4.5.8.9  3.4.5.8.9  6.8.9  7.8.9
D  1.2.4.6.8  3.4.6.8.  5.6.8  7.8  9
10/9/2012 RA/Sept2012-Jan2013 12
• Decoder is a combinational logic circuit that perform
a “reverse” encoder function.
• Examples:

10/9/2012 RA/Sept2012-Jan2013 13
• BCD-to-decimal decoder converts each BCD code into one of
ten possible digit indications.
• For example, a BCD 0011 input would activate the 3 output.
• Also known as 4-line-10-line decoder or a 1-of-10 decoder.

Logic Symbol
0

2
A 3

B 4:10 4 Decimal
BCD input C Decoder 5 output
D 6

7
8

10/9/2012 RA/Sept2012-Jan2013 14
Example
Design a BCD-to-decimal decoder. Boolean Expression
Truth Table
0  A.B.C.D
Input Output
1  A.B.C.D
A B C D 0 1 2 3 4 5 6 7 8 9
0 0 0 0 1 0 0 0 0 0 0 0 0 0 2  A.B.C.D
0 0 0 1 0 1 0 0 0 0 0 0 0 0 3  A.B.C.D
0 0 1 0 0 0 1 0 0 0 0 0 0 0
4  A.B.C.D
0 0 1 1 0 0 0 1 0 0 0 0 0 0
0 1 0 0 0 0 0 0 1 0 0 0 0 0 5  A.B.C.D
0 1 0 1 0 0 0 0 0 1 0 0 0 0 6  A.B.C.D
0 1 1 0 0 0 0 0 0 0 1 0 0 0
0 1 1 1 0 0 0 0 0 0 0 1 0 0 7  A.B.C.D
1 0 0 0 0 0 0 0 0 0 0 0 1 0 8  A.B.C.D
1 0 0 1 0 0 0 0 0 0 0 0 0 1
9  A.B.C.D
10/9/2012 RA/Sept2012-Jan2013 15
A B C D

Logic Circuit A' 0

0  A.B.C.D
B'

C' 1

D'
2
1  A.B.C.D

3
2  A.B.C.D

4
3  A.B.C.D

5
4  A.B.C.D
5  A.B.C.D
6

6  A.B.C.D
7

7  A.B.C.D
8

8  A.B.C.D
9

9  A.B.C.D
10/9/2012 RA/Sept2012-Jan2013 16
• The common output display is a 7-segment display
decoder.
a
f b
g

e c
d

• The BCD-to-7-segment decoder accepts the BCD


code on its inputs and provides outputs to drive 7-
segment display devices to produce a decimal
readout.
10/9/2012 RA/Sept2012-Jan2013 17
Example

a
A
b
a
B c f b
Seven-
C d g
segment
e
D decoder f e c
g d

If the input to the decoder are 0011, the 7-


segment display device will activate segment a, b,
c, d and g to display the number 3.

10/9/2012 RA/Sept2012-Jan2013 18
Truth Table

Input Output
A B C D a b c d e f g
0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 1 1 1 1 0 0 1
0 1 0 0 0 1 1 0 0 1 1
0 1 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 1 1 1 1 1
0 1 1 1 1 1 1 0 0 0 0
1 0 0 0 1 1 1 1 1 1 1
1 0 0 1 1 1 1 1 0 1 1
10/9/2012 RA/Sept2012-Jan2013 19
• A two variable Boolean expression for Y  A.B  A.B  A.B
can be constructed using a 2:4 decoder and an OR gate.
A.B
Y  A.B  A.B  A.B 0
A.B
A 1 Y
  (3,2,0) B 2 A.B
A.B
3

• A three variable Boolean expression can be constructed using a


3:8 decoder and an OR gate.
0
Y  A.B  A.B.C  A.B.C A
1
2
B 3
 A.B(C  C)  A.B.C  A.B.C C 4 Y
5
 A.B.C  A.B.C  A.B.C  A.B.C 6
7
 (4,5,6,7)

10/9/2012 RA/Sept2012-Jan2013 20
1. Design a 4:2 priority encoder.
2. Design a 2:4 decoder.
3. Draw the following expressions using a decoder
and an OR gate.
a) Y  A.B  B(A  C)

b) Y  A.B.C.D  A.B.C.D  A.B.C.D  A.D

10/9/2012 RA/Sept2012-Jan2013 21

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